JP2002057155A - Method for producing tantalum pentoxide film - Google Patents

Abstract

(57) Abstract: A method of manufacturing a tantalum pentoxide film, which suppresses an increase in an equivalent oxide film thickness EOT associated with a processing step for improving the quality of the tantalum pentoxide film and generates plasma damage. To prevent SOLUTION: After forming a tantalum pentoxide film 2 on a semiconductor 1, a heat treatment is performed in a non-oxidizing gas atmosphere 5.
The tantalum oxide film 2 is crystallized, and then the tantalum pentoxide film 6 is oxidized in an oxidizing atmosphere 8 at a temperature lower than the crystallization temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a tantalum pentoxide film, and more particularly, to a method for manufacturing a tantalum pentoxide film having a gate length of less than 0.1 .mu.m.
The present invention relates to a method for manufacturing a tantalum pentoxide film characterized by a technique for realizing a gate insulating film having a small effective oxide film thickness compatible with an OSFET.

[0002]

2. Description of the Related Art With the recent increase in the degree of integration of semiconductor integrated circuit devices, miniaturization of semiconductor elements has been required. For example, with the miniaturization of MOSFETs, gate electrodes and gate insulating films have become thinner. I'm advancing.

In order to cope with the limitation of thinning the gate insulating film accompanying the miniaturization of the MOSFET, a tantalum pentoxide film (Ta ₂ O ₅ film) having a higher dielectric constant than SiO ₂ is used as the gate insulating film. The use of is being considered. Incidentally, the relative permittivity of SiO ₂ is about 3.9 and the relative permittivity of Ta ₂ O ₅ is about 25, although it depends on the manufacturing method.

[0004] The thickness of the gate insulating film made of this Ta ₂ O ₅ film is converted into an effective oxide film thickness converted into a film thickness of a SiO ₂ film capable of obtaining the same characteristics, that is, an oxide film equivalent film thickness EOT. (Equivalent Oxide Thic
Kness) is ideally expressed by EOT _ideal = t _Ta2O5 × 3.9 / 25.

Therefore, when a Ta ₂ O ₅ film is used as a gate insulating film of a MOSFET, the same thickness of Si
Drivability is improved and drain current can be increased as compared with a MOSFET using an O ₂ film as a gate insulating film. On the other hand, from the opposite viewpoint, it means that the physical thickness of the gate insulating film can be made larger than that of the SiO ₂ film in order to obtain the same driving characteristics, and the limit of thinning can be avoided.

Here, referring to FIG. 5, a conventional Ta ₂ O
₅ illustrating the various manufacturing steps of the gate insulating film but, Ta ₂
Only the manufacturing process of the O ₅ gate insulating film will be described, and the description of the other configurations will be omitted. In particular, each figure (b) shows the final process. Referring to FIG. 5A, first, an amorphous Ta ₂ O ₅ film 4 is formed on a silicon substrate 41 by MOCVD (metal organic chemical vapor deposition).
2 is deposited. This amorphous Ta ₂ O ₅ film 4
In 2, there are many charge traps 44 such as impurities and oxygen defects, and the threshold voltage V _th in the I _d -V _g characteristic shifts, which adversely affects the stability of the device.

The amorphous Ta ₂ O ₅ film 42 has a problem that a leak path 43 such as a pinhole is present in the amorphous Ta ₂ O ₅ film 42, resulting in poor leak current characteristics. Crystallized Ta ₂ O ₅
There is a problem that the capacity cannot be gained because the dielectric constant is lower than that of the film. Therefore, conventionally, in order to improve the film quality of the Ta ₂ O ₅ film 42, various oxidation treatment steps or crystallization heat treatment steps described below have been performed.

Referring to FIG. 5B _1, for example, the amorphous Ta ₂ O ₅ film 42 is exposed to oxygen radicals 46 generated by irradiating an oxidizing gas atmosphere such as O ₂ or O ₃ with ultraviolet rays 45. It is proposed that the charge trap 44 in the Ta ₂ O ₅ film 42 be extinguished by performing an oxidizing process (see Japanese Patent Application Laid-Open No.
See Japanese Patent No. 312663: Conventional Example).

Referring to FIG. 6, as shown in FIG. 6, when the Ta ₂ O ₅ film is exposed to oxygen radicals 46 generated by irradiating an oxidizing gas atmosphere with ultraviolet rays 45, the amount of charge trapping increases with the heat treatment temperature. It is understood that is reduced.

[0010] FIG. 5 (b ₂₎ See also the amorphous the Ta ₂ O ₅ film 42, O ₂ and O
It has been proposed to extinguish the charge traps 44 in the Ta ₂ O ₅ film 42 by irradiating a plasma 47 excited with an oxidizing gas such as ₃ (conventional example).

Referring to FIG. 5B ₃ , O ₂ or O ₂ is added to the amorphous Ta ₂ O ₅ film 42.
_By performing heat treatment at a temperature equal to or higher than the crystallization temperature of Ta ₂ O ₅ in an oxidizing gas atmosphere 49 such as ₃ or a gas atmosphere containing nitrogen such as NO or N ₂ O, crystalline Ta having a high relative dielectric constant is obtained. Conversion to a ₂ O ₅ film 50 has been proposed (conventional example). In this case, since the crystallization process is performed in an atmosphere containing oxygen, the charge traps 44 can be eliminated and the leak paths 43 can be eliminated.

Referring to FIG. 5 (b ₄ ), or as a composite process, the amorphous Ta ₂ O ₅ film 42 is irradiated with ultraviolet rays in an oxidizing gas atmosphere such as O ₂ or O ₃ as in the conventional example. Oxidation treatment is performed by exposing to the generated oxygen radicals to eliminate the charge traps 44 in the Ta ₂ O ₅ film 42, and then, in the same manner as in the conventional example, in an oxidizing gas atmosphere 49 such as O ₂ or O _3. And Ta ₂
By heat treatment at a crystallization temperature or higher of O _5, it is converted to the Ta ₂ O ₅ film 50 having a high dielectric constant crystallinity has been proposed (conventional example).

[0013] FIG. 5 (b ₅₎ See also, after performing the crystallization heat treatment in a non-oxidizing gas atmosphere such as N _2, as in the conventional example, was excited oxidizing gas such as O ₂ or O ₃ By irradiating the plasma 47,
It has been proposed to eliminate the charge traps 44 in the crystalline Ta ₂ O ₅ film 50 having a high relative dielectric constant (conventional example).

FIG. 5 (b)₆) See also N_TwoCrystallization heat treatment in a non-oxidizing gas atmosphere such as
After going, O_TwoAnd O _ThreeIn an oxidizing gas atmosphere 49 such as
By performing the heat treatment, the crystalline T having a high relative dielectric constant can be obtained.
a_TwoO_FiveEliminating charge traps 44 in film 50
(If necessary, see JP-A-62-2529.)
No. 61 publication: conventional example).

Referring again to FIG. 6, as shown in FIG. 6, when the heat treatment is performed in an oxidizing gas atmosphere 49, although the effect is inferior to that in the processing in oxygen radicals, the charge trap 44 is lowered as the temperature rises. It is understood that

FIG. 5 (b ₇ ) It is also proposed that after performing an oxidation treatment in an oxidizing gas atmosphere, a crystallization heat treatment is performed to convert the film into a crystalline Ta ₂ O ₅ film 50 having a high relative dielectric constant. (If necessary, see JP-A-10-247723: conventional example).

As shown in FIG. 5 (b ₈ ), both the heat treatment in an oxygen gas atmosphere heated to 600 to 700 ° C. and the crystallization heat treatment in Ar gas are performed to eliminate the charge trap 44 and to provide a relative dielectric constant. Conversion to a highly crystalline Ta ₂ O ₅ film 50 (see JP-A-7-169917, if necessary: conventional example).

[0018]

However, each of the above-mentioned prior arts
There are three problems in technology. That is, the first is
In the case of treatment in oxygen radical as in the conventional example
Is Ta _TwoO_FiveAt a temperature lower than the crystallization temperature of
, So Ta_TwoO_FiveThe film remains amorphous
FIG. 5 (b)₁), The leak path 43 remains.
There is a problem of doing. Also, the relative dielectric constant remains low.
There is also a problem that.

Second, when a heat treatment is performed at a high temperature in an oxidizing gas atmosphere as in the conventional examples 1 to 4, the interface of the silicon substrate 41 is oxidized to form the SiO ₂ film 51, which is effective. The problem is that the typical gate oxide film thickness increases and the capacitance is reduced.

Referring again to FIG. 6, as is apparent from the figure, the increase in the thickness of the SiO ₂ film depends on the processing temperature, and at 500 ° C. or higher, a remarkable increase in the film thickness is observed. The increase in the thickness of the SiO ₂ film is as follows.
It does not depend much on the type of the oxidizing gas atmosphere, and greatly affects the processing temperature.

For example, when the thickness of the Ta ₂ O ₅ film 50 is t
_{Ta2 O5,} if the film thickness of the SiO ₂ film 51 was set to t _sio2, oxide film capacitance equivalent thickness EOT _conv of such _{MOSFET.
Is, EOT conv. = T Ta2O5 ×} 3.9 / 25 + t sio2 next, since t _sio2 film by increasing the thickness of the SiO ₂ film 51 can not be ignored, can not be reduced beyond a certain oxide film equivalent oxide thickness EOT There is a problem.

In particular, in the conventional example, the heat treatment is performed in an oxidizing gas atmosphere in the amorphous state. However, in the amorphous state, the oxygen diffusion coefficient is smaller than that in the crystalline state. However, there is a problem that a part of the charge trap 44 remains in the Ta ₂ O ₅ film 50 after crystallization.

Further, in the conventional example, the heat treatment in oxygen gas is performed in a range of 600 to 70 to activate oxygen.
Although it is performed at a relatively high temperature of 0 ° C., as is apparent from FIG. 6 described above, at 600 ° C. or more, the thickness of the SiO ₂ film 51 increases significantly.

Third, as in the conventional example, the oxidizing gas
When plasma treatment using plasma with excited
In the case of FIG._Two) And FIG._Five), Ta
_TwoO _FiveFilm 42 or Ta_TwoO_FivePlasma damage in film 50
Page 48, that is, charge damage is introduced and electrical
There is a problem that the characteristics become unstable.

Accordingly, an object of the present invention is to suppress an increase in the oxide film equivalent thickness EOT associated with a processing step for improving the film quality of a tantalum pentoxide film, and to prevent the occurrence of plasma damage.

[0026]

FIG. 1 is an explanatory view of the principle configuration of the present invention. Referring to FIG. 1, means for solving the problems in the present invention will be described. 1 (a) to 1 (c) In order to achieve the above object, in the present invention, a tantalum pentoxide film 2 is formed on a semiconductor 1 by a metal organic chemical vapor deposition method, and then a nitrogen gas or an Ar gas is formed. The tantalum pentoxide film 2 is crystallized by performing a heat treatment at a temperature of 700 ° C. or more in a non-oxidizing gas atmosphere 5 such as the above, and then the oxygen gas or the ozone gas is irradiated with ultraviolet rays 7 at a temperature lower than the crystallization temperature. The tantalum pentoxide film 6 is oxidized in an oxidizing atmosphere 8 generated as described above.

After the amorphous tantalum pentoxide film 2 is deposited as described above, the film is heated in a non-oxidizing gas atmosphere 5 such as nitrogen gas or Ar gas at a temperature higher than the crystallization temperature, for example, 700 ° C. or higher. By crystallizing by heat treatment at a temperature, the leak path 4 in the tantalum pentoxide film 6 can be eliminated, and the relative dielectric constant can be increased.

Further, since the oxidation treatment is performed after the crystallization, the diffusion coefficient of oxygen in the tantalum pentoxide film 6 is increased, and the charge traps 3 such as oxygen defects can be efficiently embedded with oxygen. Variation in threshold voltage _Vth can be prevented.

The oxidation treatment is performed by irradiating an oxygen gas or an ozone gas with ultraviolet rays 7 to generate an oxidizing atmosphere 8.
Since the oxidation treatment is performed at a relatively low temperature without performing plasma treatment, plasma damage is not introduced, and the thickness of the oxide film generated at the interface of the semiconductor 1 is reduced as much as possible. be able to.

As a method of depositing the tantalum pentoxide film 2, from the viewpoint of the uniformity of the film thickness and the like, a metal organic chemical vapor deposition (MOCVD) method using pentaethoxy Ta as a Ta source is used.
Method) is preferred.

The main object of application of the present invention is MO
SFETs and DRAMs (Dynamic Random Access Memory), the “semiconductor” when used as a gate insulating film of a MOSFET is a semiconductor substrate such as a silicon substrate or an epitaxial layer grown on the substrate. A “semiconductor” when applied to a capacitor insulating film of a DRAM is a polycrystalline semiconductor layer such as a polycrystalline silicon storage electrode.

From the viewpoint of the stability of the interface and the like, it is preferable to interpose an insulating film containing Si as a main component at the interface between the semiconductor 1 and the tantalum pentoxide film 2, for example, a chemical oxide (Chemical oxide). Oxide), SiO ₂ film, SiN film, SiON film, or SiO ₂
An ON film in which a part of the film is nitrided is preferable.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIGS. 2 and 3, an n-channel MOSF according to a first embodiment of the present invention will be described.
The ET manufacturing process will be described. Referring to FIG. 2A, first, a p-type silicon substrate 11 is selectively oxidized to form an element isolation oxide film 12, and then a channel is formed by ion-implanting B (boron) into the surface of the p-type silicon substrate. A doped region 13 is formed.

Next, referring to FIG. 2B, the surface of the p-type silicon substrate 11 is cleaned with HCl + H ₂ O.
By performing a pretreatment while heating the solution composed of ₂ + H ₂ O to form a chemical oxide film 14 of about 1 nm on the surface, pentaethoxy Ta and O ₂
For example, at a film formation temperature of 480 ° C., a thickness of 3 to 15 nm, for example, 5 n
Then, a Ta ₂ O ₅ film 15 is deposited. Ta _{2 in} this case
Since the O ₅ film 15 is amorphous, the Ta ₂ O ₅ film 1
In FIG. 5, there are a charge trap 16 such as an oxygen defect and a leak path 17 caused by a pinhole or the like.

Next, as shown in FIG. 2C, a rapid temperature rising / falling process (RTP: Rapid Therapy) is performed.
Annealed at a temperature of 700 to 900 ° C., for example, 750 ° C. for 30 seconds in a nitrogen gas atmosphere 18 by using a thermal process apparatus, thereby forming an amorphous Ta ₂ O ₅ film 1.
5 is converted to a crystalline Ta ₂ O ₅ film 19.

In this annealing step, the crystallized T
The leak path 17 disappears in the a ₂ O ₅ film 19. Since this annealing step is performed in a non-oxidizing gas atmosphere, no new SiO ₂ film is formed on the interface of the p-type silicon substrate 11 with the annealing.

Next, after the substrate temperature is lowered to, for example, 400 ° C., the gas in the RTP apparatus is switched to O ₂ gas. After about one minute, the O ₂ gas is irradiated with ultraviolet rays 20. Oxygen radical 2
1 is generated, and the Ta ₂ O ₅ film 19 is exposed to the oxygen radicals 21 to perform an oxidation process for 2 minutes, for example.

In this oxidation treatment step, Ta_TwoO_Fivefilm
19 has a large oxygen diffusion coefficient because it is crystallized, and
First, the use of oxygen radicals increases reactivity,
Ta _TwoO_FiveThe charge trap 16 in the film 19 can be extinguished.
Can be.

Since the oxidation treatment in this case is performed at a relatively low temperature of about 400 ° C., as apparent from FIG. 6 described above, the SiO ₂ film (at the interface of the p-type silicon substrate 11) is formed. (Not shown) can be set to 1 nm or less.

Therefore, the oxide film equivalent thickness EOT in this case is: EOT = t _Ta2O5 × 3.9 / 25 + t _SiO2 <5 × 3.9
/ 25 + _{2 (} nm) ≒ 2.8 (nm), which is equivalent to the characteristics when a SiO ₂ film of 3 nm or less is used as the gate insulating film.

Next, as shown in FIG. 3E, a TiN film 2 having a thickness of, for example, 150 nm is formed by sputtering to form a gate electrode.
2 is deposited. The difference, Δφ, between the work function φ _{TiN of TiN} and the work function φ _Si of silicon is about の of the forbidden band width E _g of silicon, and the conduction band edge of TiN is almost halfway between the band gap of silicon. , Both the n-channel type and the p-channel type MOSFET
It can be formed by an N gate electrode.

Next, as shown in FIG. 3F, a gate electrode 24 and a gate insulating film 23 having a gate length of 0.1 μm are formed by patterning in a photolithography process. By injecting, an n ^- type LDD (Lightly Doped D
(rain) region 25 is formed.

Next, after depositing a SiO ₂ film on the entire surface, the gate electrode 2 is anisotropically etched.
4 and the gate insulating film 23, side walls 26 are formed, and then using the side walls 26 as a mask, As ions are again ion-implanted to form n ⁺ -type source / drain regions 27. The basic configuration is completed.

As described above, in the first embodiment of the present invention, since the crystallization heat treatment is performed in a non-oxidizing gas atmosphere prior to the oxidation treatment step, the thickness of the SiO ₂ film at the interface is increased. In a state where the increase in the density is suppressed as much as possible, the leak path and the like can be eliminated and the relative dielectric constant can be increased.

Further, since the oxidation treatment step is performed after the crystallization step and using oxygen radicals generated by ultraviolet irradiation, the treatment can be performed at a relatively low temperature, as is apparent from FIG. In addition, the effect of reducing the amount of charge trapping is greater than that of a heat treatment in a normal oxidizing gas atmosphere, and an increase in the thickness of the SiO ₂ film can be suppressed.

Further, since no plasma process is involved in the oxidation process, no plasma damage is introduced into the Ta ₂ O ₅ film 19, and therefore, the device characteristics do not deteriorate.

Next, a DRAM according to a second embodiment of the present invention will be described with reference to FIG.
Since the process of forming the FET is exactly the same as that of the first embodiment, the description is omitted. Referring to FIG. 4, first, Ta crystallized in the same manner as in the first embodiment described above.
After forming an n-channel MOSFET using the ₂ O ₅ film as the gate insulating film 24, a non-doped SiO ₂ film 28 having a thickness of 0.1 to 0.5 μm, for example, 0.2 μm, is formed by CVD. the so deposited as an interlayer insulating film covering the gate electrode 24 as a word line, then, SiO ₂
After providing a contact hole for the n ⁺ type source region in the film 28, a polysilicon layer having a thickness of 0.2 μm is deposited on the entire surface and patterned to form a bit line 29 also serving as a source electrode.

Next, SiH ₄ (silane), B ₂
H ₆ (diborane), PH ₃ (phosphine) and O
_The thickness is 0.2 to 0.25 μm, for example, 0.2
After depositing a BPSG film 30 of μm and flattening it by a reflow process, a contact hole for an n ⁺ -type drain region is provided, and then n-type polycrystalline silicon containing As is deposited by a CVD method so as to fill the contact hole. Then, the polycrystalline silicon plug 31 is formed by etching back using RIE (reactive ion etching).

Next, similarly, a thickness of 30 to
A 100 nm, for example, 50 nm, n-type polycrystalline silicon is deposited and patterned to form a polycrystalline silicon storage electrode 32 constituting a capacitor.
A step of forming a Ta ₂ O ₅ film constituting the gate insulating film 23,
That is, the crystalline Ta ₂ O ₅ film 33 in which charge traps and leak paths have been eliminated is formed by, for example, thickening by performing the pretreatment process of FIG. 2B to the oxidation process of FIG. The dielectric film of the storage capacitor is formed to a thickness of 3 to 15 nm, for example, 5 nm.

Then, again, the entire surface containing As
100 to 300 nm, for example, 200 nm n-type polycrystalline silicon
By depositing silicon and patterning appropriately,
The cell plate electrode 34 serving as a common electrode was thus formed.
And again, the entire surface_Four, B _TwoH₆, PH_Three,as well as,
O_TwoThickness as a source gas by CVD method
0.5 to 2.0 μm, for example, 0.6 μm BPSG film
After depositing 35, 800-950 ° C., for example, 8
Heat treatment at 50 ° C. for 10 to 30 minutes, for example, 20 minutes
Memory cell by flattening by the reflow method
Part is completed.

In the second embodiment, the DRA
The dielectric film of the storage capacitor constituting the M memory cell is formed by Ta ₂ O ₅ formed in the same process as in the first embodiment.
Since it is a film, a desired capacity can be secured by a small and thin film capacitor.

The embodiments of the present invention have been described above. However, the present invention is not limited to the configurations and conditions described in the embodiments, and various changes can be made. For example, although the crystallization process is performed in a nitrogen gas atmosphere, the present invention is not limited to the nitrogen gas atmosphere, but may be any non-oxidizing gas atmosphere, for example, an Ar gas atmosphere. .

In each of the above embodiments, T
Although conducted using oxygen radicals generated by the oxidation of a ₂ O ₅ film is irradiated with ultraviolet rays O ₂ gas, using O ₃ gas, to generate oxygen radicals by irradiating ultraviolet rays to the O ₃ gas The oxidation treatment may be carried out.

In each of the above embodiments, the Ta ₂ O ₅ film is formed on the surface of the silicon substrate from the viewpoint of stability through the chemical oxide film formed by the chemical solution treatment. The oxide film is not always necessary, and the Ta film is directly formed on the surface of the silicon substrate.
_{A 2} O ₅ film may be formed.

Further, the chemical oxide film may be replaced with a thermal oxide film.
It may be replaced with an insulating film containing Si as a main component such as an iON film or an ON film.

In each of the above embodiments, TiN is used as the gate electrode. However, the present invention is not limited to TiN, and other conductors such as WSi ₂ may be used. What is necessary is just to select suitably according to the gate characteristic or process to be made.

In the second embodiment, the Ta ₂ O ₅ film is used as the gate insulating film. However, another dielectric film may be used as the gate insulating film. .

Although the first embodiment has been described as a process for manufacturing an n-channel MOSFET, the present invention is also applied to a process for manufacturing a p-channel MOSFET. When forming a channel dope region, As may be implanted with ions.

The silicon region for forming the MOSFET may be the silicon substrate itself, a silicon growth layer epitaxially grown on the silicon substrate, or a silicon layer provided on the surface of the SOI substrate or the SOS substrate. Good, and not limited to a pure silicon layer,
This also applies to layers.

In each of the above embodiments, M
Although the manufacturing process of the gate insulating film of the OSFET or the manufacturing process of the dielectric film of the capacitor of the DRAM has been described, the present invention is not limited to the gate insulating film or the dielectric film. The present invention is also applied to a manufacturing process of a capacitor or the like.

Here, with reference to FIG. 1 again, additional notes of the present invention will be described. 1 again (Appendix 1) After depositing the tantalum pentoxide film 2 on the semiconductor 1, heat treatment is performed in a non-oxidizing gas atmosphere 5 to crystallize the tantalum pentoxide film 2, and then the crystallization temperature A method for producing a tantalum pentoxide film, comprising oxidizing the tantalum pentoxide film 6 in an oxidizing atmosphere 8 at a lower temperature. (Supplementary Note 2) The semiconductor 1 is a silicon substrate or
The method for producing a tantalum pentoxide film 2 according to claim 1, wherein the method is any one of a polycrystalline silicon layer. (Supplementary Note 3) The method for producing a tantalum pentoxide film according to Supplementary note 1 or 2, wherein the tantalum pentoxide film 2 is deposited by a metal organic chemical vapor deposition method. (Supplementary Note 4) The method for producing a tantalum pentoxide film according to any one of Supplementary notes 1 to 3, wherein the non-oxidizing gas atmosphere 5 is one of a nitrogen gas atmosphere and an Ar gas atmosphere. (Supplementary Note 5) The heat treatment temperature in the non-oxidizing gas atmosphere 5 is 700 ° C. or higher.
5. The method for producing a tantalum pentoxide film according to any one of items 1 to 4. (Supplementary Note 6) The oxidizing atmosphere 8 is an oxidizing atmosphere 8 generated by irradiating ultraviolet rays 7 to either oxygen gas or ozone gas, according to any one of supplementary notes 1 to 5. A method for producing a tantalum pentoxide film. (Supplementary note 7) The tantalum pentoxide film according to any one of supplementary notes 1 to 6, wherein the tantalum pentoxide film 2 is deposited on the semiconductor 1 via an insulating film containing Si as a main component. Manufacturing method. (Supplementary Note 8) The insulating film containing Si as a main component is made of SiO
Any one of supplementary notes 1 to 7, characterized in that it is any one of _two films, a SiN film, a SiON film, and an ON film.
3. The method for producing a tantalum pentoxide film according to item 1.

[0062]

According to the present invention, the Ta ₂ O ₅ film is first densified in a non-oxidizing gas atmosphere and then oxidized at a relatively low temperature using oxygen radicals in order to densify the Ta ₂ O ₅ film. Since the treatment is performed, the film quality of the Ta ₂ O ₅ film can be improved with the increase in the thickness of the SiO ₂ film being suppressed as much as possible, and no plasma damage is introduced. Is not deteriorated, and the oxide film equivalent thickness EOT can be set to a film thickness corresponding to a gate length of 0.1 μm or less, thereby realizing a fine MOSFET having excellent drivability. This greatly contributes to further miniaturization and higher performance of the highly integrated semiconductor integrated circuit device.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a basic configuration of the present invention.

FIG. 2 is an explanatory diagram of a manufacturing process partway through the first embodiment of the present invention.

FIG. 3 is an explanatory view of a manufacturing process of the first embodiment of the present invention after FIG. 2;

FIG. 4 is a schematic sectional view of a DRAM according to a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of a manufacturing process of a conventional Ta ₂ O ₅ gate insulating film.

FIG. 6 is an explanatory diagram of the temperature dependence of an increase in the thickness of a SiO ₂ film and a decrease in the amount of charge traps due to oxidation and heat treatment.

DESCRIPTION OF SYMBOLS 1 semiconductor 2 5 tantalum oxide film 3 charge trap 4 leak path 5 non-oxidizing gas atmosphere 6 5 tantalum oxide film 7 ultraviolet ray 8 oxidizing atmosphere 11 p-type silicon substrate 12 element isolation oxide film 13 channel doping region 14 chemical Oxide film 15 Ta ₂ O ₅ film 16 charge trap 17 leak path 18 nitrogen gas atmosphere 19 Ta ₂ O ₅ film 20 ultraviolet ray 21 oxygen radical 22 TiN film 23 gate oxide film 24 gate electrode 25 n ⁺ type LDD region 26 side wall 27 n ⁺ Type source / drain region 28 SiO ₂ film 29 Bit line 30 BPSG film 31 Polycrystalline silicon plug 32 Polycrystalline silicon storage electrode 33 Ta ₂ O ₅ film 34 Cell plate electrode 35 BPSG film 41 Silicon substrate 42 Ta ₂ O ₅ film 43 Leak path 44 Charge Wrap 45 ultraviolet ray 46 oxygen radical 47 plasma 48 plasma damage 49 oxidizing gas atmosphere 50 Ta ₂ O ₅ film 51 SiO ₂ film

Continued on the front page F term (reference) 4K030 AA11 AA14 BA42 CA04 DA09 FA10 JA10 LA15 5F058 BA11 BA20 BC03 BC20 BF06 BF27 BF29 BH03 BH04 BH17 BJ01 5F083 AD21 AD49 GA06 JA06 MA06 MA17 PR12 PR16 PR21

Claims (5)

[Claims] 1. After depositing a tantalum pentoxide film on a semiconductor, heat treatment is performed in a non-oxidizing gas atmosphere to crystallize the tantalum pentoxide film, and then, at a temperature lower than the crystallization temperature, A method for producing a tantalum pentoxide film, comprising oxidizing the tantalum pentoxide film in an atmosphere. 2. The method for producing a tantalum pentoxide film according to claim 1, wherein the non-oxidizing gas atmosphere is one of a nitrogen gas atmosphere and an Ar gas atmosphere. 3. The method for producing a tantalum pentoxide film according to claim 1, wherein a heat treatment temperature in the non-oxidizing gas atmosphere is 700 ° C. or higher. 4. The oxidizing atmosphere according to claim 1, wherein the oxidizing atmosphere is an oxidizing atmosphere generated by irradiating either oxygen gas or ozone gas with ultraviolet rays. A method for producing a tantalum pentoxide film. 5. The tantalum pentoxide film according to claim 1, wherein the tantalum pentoxide film is deposited on the semiconductor via an insulating film containing Si as a main component. Manufacturing method of membrane.