JP2002056504A - Magneto-resistance element amplifier circuit and disk device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform the high speed reading operation by reducing the stabilizing time of the amplifying operation at the time of starting the read-out. SOLUTION: The magneto-resistance element amplifier circuit 1 is provided with NPN transistors Q1, Q2 for amplifying signals outputted respectively from both ends of a magneto-resistance element MR1 supplied with the bias current, and in this circuit, a switch SW1 for switching the amplifying operation of the signals made by the NPN transistors Q1, Q2, a switch SW2 for turning OFF/ON respectively in accordance with the ON/OFF of the switch SW1, a base current drawing out circuit 2 for drawing out the base current flowing into the NPN transistors Q1, Q2 when the switch SW1 is in the ON state, at the time of the ON state of the switch SW2, and a base current correcting circuit for correcting the base current values of the NPN transistors Q1, Q2, are furnished.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetoresistive element amplifier circuit for amplifying a signal generated at both ends of a magnetoresistive element by supplying a bias current and reading information on a storage medium, and a disk device using the same. Things.

[0002]

2. Description of the Related Art In recent years, a magnetoresistive (magnetoresistive) element has been widely used as a head element of a magnetic storage medium used in a hard disk drive or a floppy (registered trademark) disk drive. This is because a head using this magnetoresistive element has a higher reproduction output than a head using a conventional thin-film element, and can greatly improve the areal recording density on a magnetic storage medium. The magnetoresistive element means an element exhibiting a magnetoresistive effect in which the resistance changes when an external magnetic field is applied, and includes, for example, a GMR (giant magnetoresistive) element and a TMR (tunneling magnetoresistive) element.

FIG. 4 is a circuit diagram showing a configuration of a conventional magnetoresistive element amplifier circuit. In FIG. 4, the magnetoresistive element M
The voltage between terminals of the magnetoresistive element MR1 changes due to the magnetoresistance change due to the magnetic change applied to R1. In the NPN transistors Q1 and Q2, each of the magnetoresistive elements MR1 draws a base current from both ends of the magnetoresistive element MR1, amplifies a voltage between the terminals of the magnetoresistive element MR1, and a terminal T
1 and T2, respectively. Here, an error occurs in the current flowing through both ends of the magnetoresistive element MR1 due to the base currents of the NPN transistors Q1 and Q2. Therefore, the base current correction circuit 101 corrects the base current of the NPN transistors Q1 and Q2. The base current correction circuit 101 includes current sources I3, NP
It has N transistors Q3, Q6, Q7 and PNP transistors Q4, Q5.

On the other hand, an amplifier including NPN transistors Q1 and Q2 is turned on and off by a switch SW1. The ON state is a state in which information on a recording medium (not shown) is read by the magnetoresistive element MR1.
The OFF state is a state in which information is read onto a recording medium (not shown) by a write head (not shown) or a stopped state in which reading / writing is not performed. In this case, the current sources I1 and I2 connected to the emitters of the NPN transistors Q1 and Q2 are connected to the switch SW1, and the current source I3 of the base current correction circuit 101 is connected to the switch SW1. Therefore, when the switch SW1 is on, the magnetoresistive element MR1 is turned on, that is, in the operating state, and the switch S1 is turned on.
When W1 is off, the magnetoresistive element MR1 is off, that is, inactive.

[0005]

The switch S
When W1 shifts from the on state to the off state, the potential of the loop that sets the intermediate potential of the current flowing through the magnetoresistive element MR1, that is, the potential between the resistors R1 and R2 is changed. As a result, when the switch SW1 shifts from the OFF state to the ON state again, it is necessary to recharge the capacitors C1 and C2, it takes time to stabilize the intermediate potential between the resistors R1 and R2, and the read operation can be restarted at high speed. There was a problem that can not be performed.

[0006] The present invention has been made in view of the above,
An object of the present invention is to provide a magnetoresistive element amplifier circuit capable of performing a high-speed reading operation by shortening the stabilization time of the amplification operation at the start of reading and a disk device using the same.

[0007]

In order to achieve the above object, a magnetoresistive element amplifier circuit according to the present invention comprises a first amplifier for amplifying signals output from both ends of a magnetoresistive element to which a bias current is supplied. In a magnetoresistive element amplifier circuit having a transistor and a second transistor,
A first switch that switches an operation of amplifying the signal by the first transistor and the second transistor, a second switch that turns off and on in response to on and off of the first switch, When the first switch is turned on, the base current flowing into the first transistor and the second transistor is supplied to the second transistor.
A base current extracting means for extracting when the switch is on,
And a base current correcting means for correcting base current values of the first transistor and the second transistor.

According to the present invention, when the first switch for switching the signal amplification operation by the first transistor and the second transistor is on,
The second switch is turned off and performs only the signal amplification operation. When the first switch is turned off, the second switch is turned on and the signal amplification operation is not performed and the base current is not increased. When the extraction circuit extracts a base current component when the first transistor and the second transistor are performing an amplification operation, eliminates a voltage change between both ends of the magnetoresistive element, and restarts the signal amplification operation. The stabilization time of the amplification operation is shortened.

[0009] In the magnetoresistive element amplifier circuit according to the next invention, in the above-mentioned invention, the base current correction means may include:
A current source is provided, and the current source corrects the base current value independently of a switching operation of the first switch and the second switch.

According to the present invention, the base currents of the first transistor and the second transistor always flow, and the current source of the base current correction means is independent of the switching operation of the first switch and the second switch. Thus, since the base current value is corrected, voltage fluctuations at both ends of the magnetoresistive element can be eliminated.

According to a second aspect of the present invention, in the above-mentioned invention, the base current extracting means comprises:
A third transistor connected to the base of the first transistor, a fourth transistor connected to the base of the second transistor, and a current mirror for the third transistor and the fourth transistor And a fifth transistor that forms

According to this invention, the third transistor is connected to the base of the first transistor to extract the base current, and the fourth transistor is connected to the base of the second transistor to extract the base current. But,
At this time, the third transistor and the fourth transistor form a current mirror with the fifth transistor so that the same base current as in the amplification operation is drawn.

A disk device according to the next invention comprises a magnetoresistive element amplifying circuit having a first transistor and a second transistor for amplifying signals respectively output from both ends of a magnetoresistive element to which a bias current is supplied. In a disk device for reading at least information stored on a magnetic recording medium, the magnetoresistive element amplifier circuit includes a first switch for switching an operation of amplifying the signal by the first transistor and the second transistor. A second switch that is turned off and on in response to the on and off of the first switch, and a base current that flows into the first transistor and the second transistor when the first switch is turned on. Base current extracting means for extracting when the second switch is turned on, and the first transistor. Characterized in that a base current correction means for correcting the base current value of data and the second transistor.

According to the present invention, when the first switch for switching the signal amplification operation by the first transistor and the second transistor is on,
The second switch is turned off and performs only the signal amplification operation. When the first switch is turned off, the second switch is turned on and the signal amplification operation is not performed and the base current is not increased. When the extraction circuit extracts a base current component when the first transistor and the second transistor are performing an amplification operation, eliminates a voltage change between both ends of the magnetoresistive element, and restarts the signal amplification operation. The stabilization time of the amplification operation is shortened.

In the disk apparatus according to the next invention, in the above invention, the base current correction means has a current source, and the current source performs a switching operation of the first switch and the second switch. It is characterized in that the base current value is corrected independently.

According to the present invention, the base currents of the first transistor and the second transistor always flow, and the current source of the base current correction means is independent of the switching operation of the first switch and the second switch. Thus, the base current value is corrected, so that voltage fluctuations at both ends of the magnetoresistive element are eliminated.

In the disk device according to the next invention, in the above-mentioned invention, the base current extracting means includes the first current extracting means.
A third transistor connected to the base of the second transistor, a fourth transistor connected to the base of the second transistor, and a current mirror for the third transistor and the fourth transistor. A fifth transistor.

According to the present invention, the third transistor is connected to the base of the first transistor to extract the base current, and the fourth transistor is connected to the base of the second transistor to extract the base current. But,
At this time, the third transistor and the fourth transistor form a current mirror with the fifth transistor so that the same base current as in the amplification operation is drawn.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a magnetoresistive element amplifier circuit and a disk device using the same according to the present invention will be described below in detail with reference to the accompanying drawings.

Embodiment 1 FIG. 1 is a circuit diagram showing a configuration of a magnetoresistive element amplifier circuit according to Embodiment 1 of the present invention. In FIG. 1, the configuration of the magnetoresistive element amplifier circuit 1 is different from the conventional magnetoresistive element amplifier circuit shown in FIG.
A base current extraction circuit 2 is further provided, and the downstream side of the current source I3 is connected to the power supply Vee. That is, the current source I3
Is connected to the downstream side of the switch SW1. The other configuration is the same as that of the conventional magnetoresistive element amplifier circuit shown in FIG. 4, and the same components are denoted by the same reference numerals.

In the base current extracting circuit 2, the collectors of the NPN transistors Q10 and Q11
The transistors are connected to the bases of N-transistors Q1 and Q2, respectively, and are current-mirror-connected to NPN transistor Q12. A current is supplied to the NPN transistor Q12 from the collector of the PNP transistor Q13 via the switch SW2 such that the collectors of the NPN transistors Q10 and Q11 flow a current having the same magnitude as the base current of the NPN transistors Q1 and Q2. Is done.

The circuit excluding the base current extracting circuit 2 is a circuit having a function of setting a bias current flowing through the magnetoresistive element MR1. One end of the resistor R6 is connected to the voltage source VCC, and the other end is grounded via the current source I4. The connection point between the current source I4 and the resistor R6 is connected to the positive input terminal of the transconductance amplifier Amp1, and the output terminal of the transconductance amplifier Amp1 is connected to the gate of the NMOS transistor Q8 and one end of the capacitor C1. The other end of the capacitor C1 is grounded. NMOS
The drain of the transistor Q8 is connected to the voltage source VCC via the resistor R3 and to the negative input terminal of the transconductance amplifier Amp1.

The source of the NMOS transistor Q8 is connected to one end of the magnetoresistive element MR1 via the resistor R4. The other end of the magnetoresistive element MR1 is connected to P via a resistor R5.
Connected to the source of MOS transistor Q9. The connection point between the magnetoresistive element MR1 and the resistor R4 is connected to the other end of the magnetoresistive element MR1 via resistors R1 and R2 connected in series. That is, the resistors R1 and R2 and the magnetoresistive element MR1 are connected in parallel.

The resistors R1 and R2 have the same resistance value, and the connection point of the resistors R1 and R2 is connected to the negative input terminal of the transconductance amplifier Amp2. The output terminal of the transconductance amplifier Amp2 is a PMO
Connected to the gate of S transistor Q9 and the other end of capacitor C2. The other end of the capacitor C2 is grounded.

Here, the setting of the bias current for the magnetoresistive element MR1 will be described. The setting of the bias current is first performed by the current source I4. A voltage of (R6 × I4) is generated at both ends of the resistor R6, and the transconductance amplifier Amp1 performs feedback so that the voltage at both ends of the resistor R6 is equal to the voltage at both ends of the resistor R3. As a result, the current IMR flowing through the resistor R3 is set to a value represented by the following equation. That is, IMR = R6 × I4 / R3 is set. Since the values of the resistors R1 and R2 are set to be larger than the resistance value of the magnetoresistive element MR1, the current IMR flowing through the resistor R3 has substantially the same value as the current flowing through the magnetoresistive element MR1. Here, the resistance values of the resistors R1 and R2 are equal, and the midpoint between the resistance values R1 and R2 is connected to the negative input terminal of the transconductance amplifier Amp2.
Since the positive input terminal of the transconductance amplifier Amp2 is grounded, the transconductance amplifier Amp2 performs feedback so that the midpoint potential of the resistors R1 and R2 has the same value as the ground voltage. As a result, the midpoint potential of magnetoresistive element MR1 is set to the ground voltage level.

The operation of the magnetoresistive element amplifier circuit 1 in the state where the bias current for the magnetoresistive element MR1 is set as described above will be described with reference to the timing charts of the switches SW1 and SW2 shown in FIGS. . The switching control circuit C sets the switch SW2 to the off state when the switch SW1 is in the on state, that is, in the reading state.

When the switch SW1 is on, the NPN
The transistors Q1 and Q2, that is, the amplifier, amplify the signal of the voltage between both ends of the magnetoresistive element MR1. In this case, as described above, the voltage across the magnetoresistive element MR1 is equal to the resistance R
1 and the voltage from the midpoint potential of R2. When the switch SW1 is on, the NPN transistor Q
1, Q2 will consume the base current. Also,
When the switch SW1 is on, a current R3 / R6 times the current value of the current sources I1 and I2 flows through the current source I3, and this current flows through the NPN transistors Q3, Q6, Q
7 and a resistor R via PNP transistors Q4 and Q5.
Flowed to 6. By the current flowing through the resistor R6, N
The base current of the PN transistor Q1 is supplied from the drain of the NMOS transistor Q8 via the resistor R4. The base current of the NPN transistor Q2 is N
It is supplied from the drain of the MOS transistor Q8 via the resistor R4 and the magnetoresistive element MR1.

On the other hand, the switch SW1 is turned off, and N
When the PN transistors Q1 and Q2, that is, the amplifiers are not operated, the switch SW2 is turned on. In this case, NPN transistors Q1 and Q2 do not consume the base current. The NPN transistors Q10 to Q12 in the base current extracting circuit 2
10 and Q11 are set so that a current of ((R3 / R6) / hfe times) of the current value of the current sources I1 and I2 flows, where "hfe" is the current amplification factor of the NPN transistor. The NPN transistor Q10
The current supply to the current mirror circuit of Q12 to Q12 is P
It is taken out by the NP transistor Q13.

Therefore, when the switch SW1 is turned off and the switch SW2 is turned on, the switch S1 is turned on.
The base current consumed by the NPN transistor Q1 when the W1 is in the ON state is supplied from the drain of the NMOS transistor Q8 through the resistor R4 to the NPN transistor Q1.
Pulled out by 10. Further, the base current consumed by the NPN transistor Q2 when the switch SW1 is in the ON state is supplied from the drain of the NMOS transistor Q8 to the NP through the resistor R4 and the magnetoresistive element MR1.
It will be pulled out by the N transistor Q11.

As a result, the transistor Q as an amplifier
1, Q2 before and after turning on and off, the magnetoresistive element M
When the DC voltage value generated at both ends of R1 does not fluctuate and the transistors Q1 and Q2 are turned on from the off state,
The time required for the amplified output output from the transistors Q1 and Q2 to the terminals T1 and T2 to stabilize is reduced. Thereby, the reading operation by the magnetoresistive element MR1 can be performed at high speed.

In the first embodiment, the operation of the current source I3 is made independent of the on / off operation of the switch SW1, and when the switch SW1 for turning on / off the amplification operation is in the off state, the NPN by the base current extracting circuit 2 is turned off. By turning on the switch SW2 for operating the base current extraction of the transistors Q1 and Q2, the magnetoresistive element M
Voltage fluctuations generated at both ends of R1 can be eliminated, and the stabilization time of the amplifier output when the switch SW1 switches from the off state to the on state can be shortened.
The reading operation by R1 can be performed at high speed.

Embodiment 2 FIG. Next, a second embodiment of the present invention will be described. In the second embodiment, the magnetoresistive element amplifier circuit 1 according to the first embodiment is applied to a hard disk drive 10.

FIG. 3 is a block diagram showing a configuration of a hard disk drive according to a second embodiment of the present invention. 3, the magnetoresistive element amplifier circuit 1 shown in FIG.
Used as 3.

The hard disk drive 10 is connected to a personal computer 20. The hard disk drive device 10 has a microcomputer 21. The microcomputer 21 transmits and receives the control signal S1 to and from the personal computer 20. The microcomputer 21 controls writing or reading of data in the storage medium 29 based on a control signal S1 from the personal computer 20.

When writing data, the microcomputer 21 sends a control signal S to the read channel 22.
2 and the write information D1, and the read channel 22
Changes the write signal D2 based on the write information D1 into the preamplifier 2
3, and is sent as a write signal D3 to a write head (not shown) of the arm 28, and is written on the recording medium 29. At this time, the microcomputer 21 controls the motor driver 24 by the control signal S3, and
Controls the spindle motor 25 that drives the recording medium 29 to rotate by the control signal S5. Further, the microcomputer 21 controls the servo IC 2 by the control signal S4.
6, the servo IC 26 controls the drive of a servo motor 27 that drives the arm 28. As a result, the write signal D3 is written at a desired position on the recording medium.

On the other hand, when reading data, the microcomputer 21 sends a control signal S 2 to the read channel 22. Further, the microcomputer 21
Controls the motor driver 24 by the control signal S3, and controls the spindle motor 25 that rotates the recording medium 29 by the control signal S5, as in the case of writing. Further, the microcomputer 21 controls the servo IC 26 with the control signal S4, and the servo IC 26 controls the driving of the servo motor 27 that drives the arm 28. This allows the arm 28
The magnetoresistive element MR1 which is a read head of the recording medium 2
9 to the desired reading position.

The read signal D11 read by the magnetoresistive element MR1 is amplified by the preamplifier 23,
The amplified read signal D12 is output to the read channel 22. The read channel 22 outputs the read signal D12 to the microcomputer 21 as read information D13 under the control signal S2,
Transfers the read information D13 to the personal computer 20 side.

Here, the read / write IC (R / WI)
The preamplifier 23 realized by C) has the magnetoresistive element amplifier circuit 1 shown in FIG.
Is obtained as a read signal D11 (base current), and the read signal D11 is amplified and output.

The preamplifier 23 amplifies the voltage between both ends of the magnetoresistive element MR1 by using the magnetoresistive element amplifier circuit 1 shown in FIG. 1. When the SW1 shifts from the OFF state to the ON state, the SW2 turns ON. As a result, the base current is pulled out, and the voltage across the magnetoresistive element MR1 is kept from fluctuating. Therefore, the stabilization time of the amplified output is shortened, high-speed reading operation is enabled, and the transition from writing to reading is performed. The time is shortened, the transition time when the writing / reading operation is repeated is shortened, and an efficient writing / reading operation can be performed.

In the second embodiment, the hard disk drive is described as an example. However, the present invention is not limited to this, and the present invention can be applied to a disk drive such as a floppy disk drive using the magnetoresistive element MR1.

According to the second embodiment, the first embodiment
Is used as the preamplifier 23, the transition time from writing to reading is shortened, and high-speed reading operation and high-speed writing / reading operation can be realized.

[0042]

As described above, according to the present invention, the first transistor for switching the amplifying operation of the signal by the first transistor and the second transistor.
When the switch is on, the second switch is off and performs only the signal amplifying operation. When the first switch is off, the second switch is on and the signal amplifies. The operation is not performed, and the base current extracting circuit extracts the base current when the first transistor and the second transistor are performing the amplifying operation, eliminates the voltage fluctuation between both ends of the magnetoresistive element, and removes the signal of the signal. When the amplifying operation is restarted, the stabilizing time of the amplifying operation is shortened, so that a high-speed reading operation can be realized.

According to the next invention, the base currents of the first transistor and the second transistor always flow, and the current source of the base current correction means determines the switching operation of the first switch and the second switch. Since the base current value is independently corrected and the voltage fluctuation at both ends of the magnetoresistive element can be eliminated, there is an effect that a high-speed reading operation can be realized.

According to the next invention, the third transistor is connected to the base of the first transistor to extract the base current, and the fourth transistor is connected to the base of the second transistor to extract the base current. At this time, the third transistor and the fourth transistor form a current mirror with the fifth transistor so as to extract the same base current as in the amplification operation. This has the effect that the operation can be realized.

According to the next invention, when the first switch for switching the operation of amplifying the signal by the first transistor and the second transistor is on, the second switch is off and the second switch is off. Only the signal amplification operation is performed, and when the first switch is off, the second
Is turned on, the signal amplifying operation is not performed, and the base current extracting circuit extracts the base current component when the first transistor and the second transistor are performing the amplifying operation, and the magnetoresistive Since the voltage fluctuations at both ends of the element are eliminated and the stabilization time of the amplifying operation is shortened when the amplifying operation of the signal is restarted, a high-speed reading operation and a high-speed writing / reading operation can be realized. It works.

According to the next invention, the base currents of the first transistor and the second transistor always flow, and the current source of the base current correcting means determines the switching operation of the first switch and the second switch. Since the base current value is independently corrected, voltage fluctuations at both ends of the magnetoresistive element are eliminated.
There is an effect that a high-speed reading operation can be realized.

According to the next invention, the third transistor is connected to the base of the first transistor to extract the base current, and the fourth transistor is connected to the base of the second transistor to extract the base current. At this time, the third transistor and the fourth transistor form a current mirror with the fifth transistor so as to extract the same base current as in the amplification operation. This has the effect that the operation can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a magnetoresistive element amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing a switching operation of switches SW1 and SW2 of the magnetoresistive element amplifier circuit shown in FIG.

FIG. 3 is a block diagram illustrating a configuration of a hard disk drive device according to a second embodiment of the present invention;

FIG. 4 is a circuit diagram showing a configuration of a conventional magnetoresistive element amplifier circuit.

[Explanation of symbols]

1 Magnetoresistance element amplification circuit, 2 base current extraction circuit,
Reference Signs List 10 hard disk drive device, 20 personal computer, 21 microcomputer, 22 read channel, 23 preamplifier, 24 motor driver, 25 spindle motor, 26 servo IC, 27
Servo motor, 28 arms, 29 recording media, Amp
1, Amp2 transconductance amplifier, C switching control circuit, C1, C2 capacitors, I1 to I3 current sources, MR1 magnetoresistive element, SW1, SW2 switches, Q1 to Q3, Q6, Q7, Q10 to Q12 NPN
Transistors, Q4, Q5, Q13 PNP transistors, Q8 NMOS transistors, Q9 PMOS transistors, R1-R6 resistors, VCC, Vee power supply.

Claims (6)

[Claims] 1. A magnetoresistive element amplifier circuit having a first transistor and a second transistor for amplifying signals respectively output from both ends of a magnetoresistive element to which a bias current is supplied, wherein: A first switch that switches an operation of amplifying the signal by the second transistor; a second switch that turns off and on in response to on and off of the first switch; A base current extracting means for extracting a base current flowing into the first transistor and the second transistor when the second switch is turned on, and a base current value of the first transistor and the second transistor when the second switch is turned on; And a base current correction means for correcting the following. 2. The base current correction unit includes a current source, wherein the current source corrects the base current value independently of a switching operation of the first switch and the second switch. The magnetoresistive element amplifier circuit according to claim 1, wherein: 3. The base current extracting means includes: a third transistor connected to a base of the first transistor; a fourth transistor connected to a base of the second transistor; The magnetoresistive element amplifier circuit according to claim 1, further comprising: a transistor and a fifth transistor forming a current mirror with respect to the fourth transistor. 4. A magnetic recording medium using at least a magnetic recording medium using a magnetoresistive element amplifier circuit having a first transistor and a second transistor for amplifying signals output from both ends of a magnetoresistive element to which a bias current is supplied. In a disk device for reading stored information, the magnetoresistive element amplifier circuit includes: a first switch for switching an operation of amplifying the signal by the first transistor and the second transistor; A second switch that is turned off and on in response to on and off, respectively, a base current that flows into the first transistor and the second transistor when the first switch is turned on, Base current extracting means for extracting when the transistor is turned on, the first transistor and the second transistor Disk apparatus characterized by comprising a base current correction means for correcting the base current value of. 5. The base current correction unit includes a current source, wherein the current source corrects the base current value independently of a switching operation of the first switch and the second switch. 5. The disk device according to claim 4, wherein: 6. The base current extracting means includes: a third transistor connected to a base of the first transistor; a fourth transistor connected to a base of the second transistor; The disk device according to claim 4, further comprising: a transistor; and a fifth transistor that forms a current mirror with respect to the fourth transistor.