JP2002053399A - Method for manufacturing nitride semiconductor substrate and nitride semiconductor substrate - Google Patents
Method for manufacturing nitride semiconductor substrate and nitride semiconductor substrateInfo
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- JP2002053399A JP2002053399A JP2001149892A JP2001149892A JP2002053399A JP 2002053399 A JP2002053399 A JP 2002053399A JP 2001149892 A JP2001149892 A JP 2001149892A JP 2001149892 A JP2001149892 A JP 2001149892A JP 2002053399 A JP2002053399 A JP 2002053399A
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- nitride semiconductor
- substrate
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は窒化物半導体(InXA
lYGa1-X-YN、0≦X、0≦Y、X+Y≦1)よりなる基
板の製造方法に関する。The present invention relates to a nitride semiconductor (In XA).
l Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, a method of manufacturing a substrate made of X + Y ≦ 1).
【0002】[0002]
【従来の技術】一般に半導体を基板上に成長させる際、
その成長させる半導体と格子整合した基板を用いると半
導体の結晶欠陥が少なくなって結晶性が向上することが
知られている。しかし、窒化物半導体は格子整合する基
板が現在世の中に存在しないことから、一般にサファイ
ア、スピネル、炭化ケイ素のような窒化物半導体と格子
整合しない基板の上に成長されている。2. Description of the Related Art Generally, when a semiconductor is grown on a substrate,
It is known that using a substrate lattice-matched with the semiconductor to be grown reduces crystal defects of the semiconductor and improves crystallinity. However, nitride semiconductors are generally grown on substrates that do not lattice match with nitride semiconductors, such as sapphire, spinel, and silicon carbide, because there are no substrates that lattice match in the world.
【0003】GaNバルク結晶を作製する試みは、様々
な研究機関において成されているが、未だに数ミリ程度
のものしか得られたという報告しかされておらず、実用
化には程遠い状態である。Attempts to produce a GaN bulk crystal have been made by various research institutions, but only reports of a few millimeters have been obtained, and it is far from practical use.
【0004】GaN基板を作製する技術として、例えば
特開平7−202265号公報、特開平7−16549
8号に、サファイア基板の上にZnOよりなるバッファ
層を形成して、そのバッファ層の上に窒化物半導体を成
長させた後、バッファ層を溶解除去する技術が記載され
ている。As a technique for manufacturing a GaN substrate, for example, Japanese Patent Application Laid-Open No. 7-202265 and Japanese Patent Application Laid-Open
No. 8 discloses a technique of forming a buffer layer made of ZnO on a sapphire substrate, growing a nitride semiconductor on the buffer layer, and then dissolving and removing the buffer layer.
【0005】しかしながらサファイア基板の上に成長さ
れるZnOバッファ層の結晶性は悪く、そのバッファ層
の上に窒化物半導体を成長させても良質の窒化物半導体
を得ることは難しい。さらに、薄膜のZnOよりなるバ
ッファ層を溶解除去するのは非常に長時間を要し実用は
難しい。However, the crystallinity of a ZnO buffer layer grown on a sapphire substrate is poor, and it is difficult to obtain a good quality nitride semiconductor even if a nitride semiconductor is grown on the buffer layer. Furthermore, it takes a very long time to dissolve and remove the thin-film buffer layer made of ZnO, and it is practically difficult.
【0006】[0006]
【発明が解決しようとする課題】本発明はこのような事
情を鑑みて成されたものであって、その目的とするとこ
ろは、発光効率や受光効率の高い窒化物半導体素子が作
製できる 結晶性の良い窒化物半導体からなる基板を提
供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and an object of the present invention is to provide a nitride semiconductor device having high luminous efficiency and high light receiving efficiency. It is an object of the present invention to provide a substrate made of a nitride semiconductor having a good quality.
【0007】[0007]
【課題を解決するための手段】本発明の窒化物半導体基
板は少なくとも2層構造を有する窒化物半導体よりなる
基板であって、それら窒化物半導体層のキャリア濃度が
互いに異なることを特徴とする。The nitride semiconductor substrate of the present invention is a substrate made of a nitride semiconductor having at least a two-layer structure, wherein the nitride semiconductor layers have different carrier concentrations.
【0008】さらに、本発明の窒化物半導体基板は、前
記窒化物半導体層は、ノンドープ、若しくはn型不純物
を1×1019/cm3以下でドープしたものであるこ
とを特徴とする。Further, the nitride semiconductor substrate of the present invention is characterized in that the nitride semiconductor layer is non-doped or doped with an n-type impurity at 1 × 10 19 / cm 3 or less.
【0009】また本発明の窒化物半導体基板において、
前記n型不純物はSi、Ge、Sn、Sの中から選択さ
れる少なくとも一種であることを特徴とする。さらに、
前記窒化物半導体層は、2軸結晶法によるX線ロッキン
グカーブの半値幅が15分以下であることを特徴とす
る。Further, in the nitride semiconductor substrate of the present invention,
The n-type impurity is at least one selected from Si, Ge, Sn, and S. further,
The nitride semiconductor layer is characterized in that a half width of an X-ray rocking curve by a biaxial crystal method is 15 minutes or less.
【0010】[0010]
【発明の実施の形態】本発明の製造方法において、窒化
物半導体を成長させる第1の基板、及び第2の基板に
は、従来提案されている窒化物半導体が成長できる基板
であって、窒化物半導体よりなる基板を除いた基板であ
ればどのような基板を使用しても良く、例えばサファイ
ア、スピネル、SiC等が多用され、その他、ZnO、
GaAs、Si、GaP等があり、また特開平2−22
9475公報に記載される窒化物半導体に格子整合した
酸化物基板を用いることができる。BEST MODE FOR CARRYING OUT THE INVENTION In the manufacturing method of the present invention, a first substrate on which a nitride semiconductor is grown and a second substrate on which a conventionally proposed nitride semiconductor can be grown are provided. Any substrate may be used as long as it is a substrate other than a substrate made of a semiconductor. For example, sapphire, spinel, SiC, etc. are frequently used.
There are GaAs, Si, GaP and the like.
An oxide substrate lattice-matched to a nitride semiconductor described in 9475 can be used.
【0011】窒化物半導体を成長させるには、例えばM
OVPE(有機金属気相成長法)、MBE(分子線気相
成長法)、HVPE(ハライド気相成長法)等の従来よ
り知られている気相成長法を用いることができる。In order to grow a nitride semiconductor, for example, M
Conventionally known vapor deposition methods such as OVPE (metal organic chemical vapor deposition), MBE (molecular beam vapor deposition), and HVPE (halide vapor deposition) can be used.
【0012】基板上に窒化物半導体を成長させるには、
まず基板に接して、0.1μm以下の膜厚でGaN、A
lN、AlGaN等のバッファ層を成長させることが望
ましい。バッファ層は例えば特開平4−297023号
公報において詳説されている。In order to grow a nitride semiconductor on a substrate,
First, in contact with the substrate, GaN, A
It is desirable to grow a buffer layer such as 1N or AlGaN. The buffer layer is described in detail in, for example, Japanese Patent Application Laid-Open No. H4-297023.
【0013】次に基板上に成長させる窒化物半導体は最
も好ましくはノンドープ、若しくはn型不純物を1×1
019/cm3以下でドープしたGaNを成長させる。n型
不純物はSi、Ge、Sn、S等の第4族元素の内の少
なくとも一種を選択し、特に好ましくはSi、Geを用
いる。窒化物半導体の膜厚は50μm以上、さらに好ま
しくは80μm以上、最も好ましくは100μm以上で
成長させる。上限については特に限定しないが200μ
m以下が望ましい。またn型不純物のドープ量が1×1
019/cm3を超えると基板となる結晶性の良い窒化物半
導体が成長させにくい。なお結晶性が良いとは、例えば
2軸結晶法によるX線ロッキングカーブの半値幅が15
分以下の窒化物半導体を指す。Next, the nitride semiconductor to be grown on the substrate is most preferably non-doped, or 1 × 1
GaN doped at 0 19 / cm 3 or less is grown. As the n-type impurity, at least one of Group 4 elements such as Si, Ge, Sn, and S is selected, and Si and Ge are particularly preferably used. The nitride semiconductor is grown with a thickness of 50 μm or more, more preferably 80 μm or more, and most preferably 100 μm or more. The upper limit is not particularly limited, but is 200 μm.
m or less is desirable. Further, the doping amount of the n-type impurity is 1 × 1
If it exceeds 0 19 / cm 3 , it is difficult to grow a nitride semiconductor having good crystallinity as a substrate. It is to be noted that good crystallinity means that the half width of the X-ray rocking curve by the biaxial crystallization method is 15%, for example.
Min. Or less.
【0014】次に2枚の基板上にそれぞれ成長された窒
化物半導体を接着するには、例えばウェーハ接着の方法
を用いることが望ましい。ウェーハ接着とは、成長され
た窒化物半導体の表面をエッチング、研磨等の手法によ
り、鏡面で、平坦な面とした後、その平坦な面同士を張
り合わせて、加圧及び加熱によって接着する技術であ
る。加圧は適当な治具を用いて固定すれば達成できる。
このようにウェーハ接着すると窒化物半導体層と、対向
する窒化物半導体層との界面には他の物質が介在しない
ので、両窒化物半導体のキャリア濃度、移動度、抵抗率
等が同じであれば、それらの特性の均一な基板が得られ
やすい。また後に述べるように、意図的にキャリア濃度
等の異なる基板を作製しても良い。Next, in order to bond the nitride semiconductors respectively grown on the two substrates, it is desirable to use, for example, a wafer bonding method. Wafer bonding is a technology in which the surface of a grown nitride semiconductor is mirror-finished and flattened by a technique such as etching or polishing, and then the flat surfaces are bonded to each other and bonded by pressing and heating. is there. Pressing can be achieved by fixing using a suitable jig.
When the wafers are bonded in this manner, no other substance is present at the interface between the nitride semiconductor layer and the opposing nitride semiconductor layer, so that both nitride semiconductors have the same carrier concentration, mobility, resistivity, and the like. Thus, it is easy to obtain a substrate having uniform characteristics. Further, as described later, substrates having different carrier concentrations or the like may be intentionally manufactured.
【0015】特に好ましくは接着する工程は、窒化物半
導体の分解圧以上に加圧された窒素雰囲気中でウェーハ
を加熱することが望ましい。加熱温度は600℃以上、
さらに好ましくは800℃以上で加熱する。GaNの場
合、GaNの分解圧は800℃で約0.01気圧、10
00℃で約1気圧、1100℃で約10気圧程度であ
る。そのため窒素雰囲気中で、GaNの分解圧以上で加
圧しながら加熱すると、GaN中からNが抜けるのを防
止するとともに、接着状態の良い基板を提供することが
できる。Particularly preferably, in the bonding step, it is desirable to heat the wafer in a nitrogen atmosphere pressurized to a pressure higher than the decomposition pressure of the nitride semiconductor. Heating temperature is over 600 ° C,
More preferably, the heating is performed at 800 ° C. or higher. In the case of GaN, the decomposition pressure of GaN is about 0.01 atm at 800 ° C.,
The pressure is about 1 atm at 00 ° C and about 10 atm at 1100 ° C. Therefore, when heating is performed in a nitrogen atmosphere while applying a pressure equal to or higher than the decomposition pressure of GaN, N can be prevented from falling out of GaN, and a substrate with a good adhesion can be provided.
【0016】[0016]
【実施例】以下実施例で本発明を詳説する。図1乃至図
3は本発明の方法を説明するためのウェーハの構造を示
す模式断面図であり、実施例における本発明の各工程を
説明するものである。The present invention will be described in detail with reference to the following examples. FIGS. 1 to 3 are schematic cross-sectional views showing the structure of a wafer for explaining the method of the present invention, and illustrate the steps of the present invention in Examples.
【0017】[実施例1]図1に示すようにサファイア
基板1、1’上にGaNよりなるバッファ層2、2’を
200オングストロームの膜厚で成長させ、その上に窒
化物半導体層3、3’を成長させた第1のウェーハ
(a)、第2のウェーハ(b)とを用意する。窒化物半
導体は以下のようにしてMOVPE法により成長させ
た。[Embodiment 1] As shown in FIG. 1, buffer layers 2 and 2 'made of GaN are grown on a sapphire substrate 1 and 1' to a thickness of 200 angstroms, and a nitride semiconductor layer 3 and A first wafer (a) and a second wafer (b) on which 3 ′ has been grown are prepared. The nitride semiconductor was grown by MOVPE as follows.
【0018】2インチφ、厚さ400μmのサファイア
(C面)よりなる基板1を反応容器内にセットし、容器
内を水素で十分置換した後、水素を流しながら、基板の
温度を1050℃まで上昇させ、基板のクリーニングを
行う。A substrate 1 made of sapphire (C plane) having a diameter of 2 inches and a thickness of 400 μm is set in a reaction vessel, and the inside of the vessel is sufficiently replaced with hydrogen. Then, the temperature of the substrate is raised to 1050 ° C. while flowing hydrogen. Then, the substrate is cleaned.
【0019】続いて、温度を510℃まで下げ、キャリ
アガスに水素、原料ガスにアンモニアとTMG(トリメ
チルガリウム)とを用い、基板上にGaNよりなるバッ
ファ層2を200オングストロームの膜厚で成長させ
る。Subsequently, the temperature is lowered to 510 ° C., and a buffer layer 2 made of GaN is grown to a thickness of 200 Å on the substrate using hydrogen as a carrier gas, ammonia and TMG (trimethylgallium) as a source gas. .
【0020】続いて温度を1050℃まで上昇させ、1
050℃になったら、同じく原料ガスにTMG、アンモ
ニアガスを用い、キャリア濃度1×1018/cm3のノン
ドープGaNよりなる窒化物半導体層3を150μmの
膜厚で成長させる。成長後温度を室温まで戻し、ウェー
ハを反応容器から取り出し、これを第1のウェーハ
(a)とする。次に、サファイア基板1’に対しても同
様の操作を行い、さらにSiドープでキャリア濃度5×
1018/cm3として、膜厚を120μmとする。こ
れを第2のウェーハ(b)とする。Subsequently, the temperature is increased to 1050 ° C.
When the temperature reaches 050 ° C., a nitride semiconductor layer 3 made of non-doped GaN having a carrier concentration of 1 × 10 18 / cm 3 is grown to a thickness of 150 μm using TMG and ammonia gas as source gases. After the growth, the temperature is returned to room temperature, the wafer is taken out of the reaction vessel, and this is used as a first wafer (a). Next, the same operation is performed on the sapphire substrate 1 ′, and the carrier concentration is 5 × by Si doping.
At 10 18 / cm 3 , the film thickness is 120 μm. This is referred to as a second wafer (b).
【0021】次に第1のウェーハ(a)と第2のウェー
ハ(b)とを研磨装置に移送し、GaNの表面を数百オ
ングストローム、ポリシングして鏡面状とする。Next, the first wafer (a) and the second wafer (b) are transferred to a polishing apparatus, and the surface of GaN is polished to a mirror surface by several hundred angstroms.
【0022】ポリシング後、図2に示すように第1のウ
ェーハGaN層3と、第2のウェーハのGaN層3’と
を張り合わせ、耐熱性の治具で強く固定した状態で、ア
ニール装置に移送する。そして窒素雰囲気中20気圧、
1100℃において、10分間アニーリングを行う。After polishing, the GaN layer 3 of the first wafer and the GaN layer 3 'of the second wafer are bonded to each other as shown in FIG. 2 and transferred to an annealing apparatus while being strongly fixed by a heat-resistant jig. I do. And 20 atmospheres in a nitrogen atmosphere,
Anneal at 1100 ° C. for 10 minutes.
【0023】そして、それらのGaN3、3’層を張り
合わせてアニーリングした後、膜厚の薄いGaN層3’
を成長させたサファイア基板1’側を先に研磨して除去
する。このように異なる膜厚の窒化物半導体層を成長さ
せた場合、薄い膜厚の窒化物半導体を有する基板側を先
に研磨すると、研磨途中でウェーハが割れることが少な
い傾向にあるので好ましい。除去後の窒化物半導体層の
構造が図3である。なお、バッファ層2は低温で成長さ
せた多結晶層を含む層であるので、研磨時にサファイア
基板と同様にラッピング除去する。除去後、露出した両
方の基板面をポリシングして鏡面状とする。After the GaN layers 3 and 3 'are bonded and annealed, the GaN layer 3' having a small thickness is formed.
Is first polished and removed. In the case where nitride semiconductor layers having different thicknesses are thus grown, it is preferable to polish the substrate side having the thin nitride semiconductor first because the wafer is less likely to break during polishing. FIG. 3 shows the structure of the nitride semiconductor layer after the removal. Since the buffer layer 2 is a layer including a polycrystalline layer grown at a low temperature, the buffer layer 2 is removed by lapping during polishing in the same manner as the sapphire substrate. After removal, both exposed substrate surfaces are polished to mirror surfaces.
【0024】また、異なる膜厚の窒化物半導体層を成長
させて、意図的にキャリア濃度の異なる基板を作製して
も良い。キャリア濃度の異なる基板が作製できると、例
えばキャリア濃度の高いn+層をn電極形成面として、
低いn−層をクラッド層とすると、発光効率、受光効率
の高い窒化物半導体素子が作製できる。Further, substrates having different carrier concentrations may be intentionally produced by growing nitride semiconductor layers having different thicknesses. When substrates having different carrier concentrations can be manufactured, for example, an n + layer having a high carrier concentration is used as an n-electrode formation surface.
When the low n− layer is used as the cladding layer, a nitride semiconductor device having high light emitting efficiency and high light receiving efficiency can be manufactured.
【0025】[0025]
【発明の効果】以上説明したように、本発明の方法によ
ると非常に簡単な操作で結晶性の良いGaN基板を得る
ことができる。GaN基板が得られ、この基板の上にp
−n接合を有する窒化物半導体層を積層して、例えばL
ED、LDのような発光素子を実現すると、従来のよう
に同一面側から同一面側から、p電極、n電極を取り出
す必要が無く、GaAs、GaP等の半導体素子のよう
に基板側から一方の電極が取り出せるので、チップサイ
ズを小さくできる。さらに基板が窒化物半導体と格子整
合しているため、格子欠陥が少ない結晶性の良い窒化物
半導体が成長しやすくなるので、LDでは素子の寿命が
向上する。さらに、従来では絶縁性基板と窒化物半導体
の格子不整合を緩和するために、バッファ層を成長させ
ていたが、GaN基板ができるとバッファ層を成長させ
る必要が無くなる可能性もある。キャリア濃度の異なる
基板を作製することで、例えばキャリア濃度の高いn+
層をn電極形成面として、低いn−層をクラッド層とす
ると、発光効率や受光効率の高い窒化物半導体素子が作
製できる結晶性の良い窒化物半導体からなる基板を提供
するができる。As described above, according to the method of the present invention, a GaN substrate having good crystallinity can be obtained by a very simple operation. A GaN substrate is obtained, and p
-Stacking a nitride semiconductor layer having an -n junction, for example, L
When a light emitting element such as an ED or LD is realized, it is not necessary to take out a p-electrode and an n-electrode from the same surface side from the same surface side as in the conventional case. Since the electrodes can be taken out, the chip size can be reduced. Further, since the substrate is lattice-matched with the nitride semiconductor, a nitride semiconductor having few lattice defects and good crystallinity can be easily grown, so that the lifetime of the LD is improved. Further, conventionally, a buffer layer was grown to alleviate lattice mismatch between the insulating substrate and the nitride semiconductor. However, if a GaN substrate is formed, there is a possibility that the buffer layer does not need to be grown. By manufacturing substrates having different carrier concentrations, for example, n + having a high carrier concentration can be obtained.
When the layer is used as an n-electrode forming surface and the low n− layer is used as a cladding layer, a substrate made of a nitride semiconductor having good crystallinity, which can produce a nitride semiconductor element having high light emission efficiency and high light reception efficiency, can be provided.
【図面の簡単な説明】[Brief description of the drawings]
【図1】 本発明の方法の一工程において得られるウェ
ーハの構造を示す模式断面図。FIG. 1 is a schematic sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
【図2】 本発明の方法の一工程において得られるウェ
ーハの構造を示す模式断面図。FIG. 2 is a schematic sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
【図3】 本発明の方法の一工程において得られるウェ
ーハの構造を示す模式断面図。FIG. 3 is a schematic sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
1、1’・・・・基板 2、2’・・・・バッファ層 3、3’・・・・GaN層 1, 1 '... substrate 2, 2' ... buffer layer 3, 3 '... GaN layer
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4G077 AA03 AB01 AB08 BE15 DB01 EB01 FF07 FJ03 TB03 TB05 TC14 TC15 TC16 5F041 AA40 CA40 CA46 CA49 CA56 CA57 CA65 CA77 5F045 AA04 AB14 AC08 AC12 AD09 AD14 AF09 BB12 BB16 CA10 CA12 DA53 HA16 5F073 CA02 CA07 CB05 CB19 DA05 DA16 DA35 EA29 ──────────────────────────────────────────────────続 き Continued on front page F term (reference) 4G077 AA03 AB01 AB08 BE15 DB01 EB01 FF07 FJ03 TB03 TB05 TC14 TC15 TC16 5F041 AA40 CA40 CA46 CA49 CA56 CA57 CA65 CA77 5F045 AA04 AB14 AC08 AC12 AD09 AD14 AF09 BB12 BB16 CA10 CA12 DA12 CA02 CA07 CB05 CB19 DA05 DA16 DA35 EA29
Claims (4)
体よりなる基板であって、それら窒化物半導体層のキャ
リア濃度が互いに異なることを特徴とする窒化物半導体
基板。1. A nitride semiconductor substrate comprising a nitride semiconductor having at least a two-layer structure, wherein the nitride semiconductor layers have different carrier concentrations.
しくはn型不純物を1×1019/cm3以下でドープ
したものであることを特徴とする請求項1に記載の窒化
物半導体基板。2. The nitride semiconductor substrate according to claim 1, wherein the nitride semiconductor layer is non-doped or doped with an n-type impurity at 1 × 10 19 / cm 3 or less.
の中から選択される少なくとも一種であることを特徴と
する請求項2に記載の窒化物半導体基板。3. The method according to claim 1, wherein the n-type impurities are Si, Ge, Sn, S
The nitride semiconductor substrate according to claim 2, wherein the nitride semiconductor substrate is at least one selected from the group consisting of:
るX線ロッキングカーブの半値幅が15分以下であるこ
とを特徴とする請求項1乃至3に記載の窒化物半導体基
板。4. The nitride semiconductor substrate according to claim 1, wherein the nitride semiconductor layer has a half-width of an X-ray rocking curve by a biaxial crystal method of 15 minutes or less.
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