JP2002026303A - Method for manufacturing solid-state imaging device - Google Patents

Abstract

(57) [Problem] To perform ion implantation using only an electrode as a mask, the thickness of the electrode is determined from other characteristics and processes of the element, and the injection blocking ability by the thickness (thinness) is determined. The low voltage significantly limits the acceleration voltage for ion implantation. A photoelectric conversion element includes a step of forming an electrode material on a semiconductor substrate, a step of processing the electrode material, and ion implantation of impurities into the substrate using the electrode material and a resist on the electrode mask as a mask. And forming 7
The impurity concentration maximum in the substrate depth direction is inside the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a solid-state imaging device.

[0002]

2. Description of the Related Art In recent years, solid-state imaging devices using a charge transfer device represented by a charge-coupled device (hereinafter, referred to as a CCD) have been widely used because of their low noise characteristics and the like. I have. Hereinafter, a structure used in a conventional solid-state imaging device will be described with reference to the drawings.

FIG. 24 is a plan view of a so-called CCD type solid-state imaging device. The solid-state imaging device includes a photoelectric conversion element unit 1, a vertical CCD transfer electrode unit 2, a horizontal CCD transfer electrode unit 3, and an output unit 4. When light emitted from a subject enters the photoelectric conversion element 1, the light generates electron-hole pairs in the photoelectric conversion element 1. The electrons generated in this manner are sent from the photoelectric conversion element unit 1 to the vertical CCD transfer electrode unit 2. The vertical CCD transfer electrode section 2 has a vertical CC
Electrons of each photoelectric conversion element unit 1 arranged in the longitudinal direction of the D transfer electrode unit 2 are simultaneously sent. In addition, vertical CCD
The electrons extracted to the transfer electrode unit 2 are sent to the horizontal CCD transfer electrode unit 3. The electrons of the vertical CCD transfer electrodes 2 arranged perpendicular to the longitudinal direction of the horizontal CCD transfer electrode unit 3 are simultaneously sent to the horizontal CCD transfer electrode unit 3.

[0004] The electrons thus taken out by the horizontal CCD transfer electrode section 3 are output through an output section 4. This output signal is output as an image of a subject from an output medium such as a display through an image reproducing circuit.

FIG. 25 shows a photoelectric conversion element section 1 and a vertical CCD.
FIG. 3 is a cross-sectional view of the solid-state imaging device taken along line AA ′ passing through the transfer electrode unit 2. There is a p-layer 6 having a predetermined range of depth and concentration formed on the n-type substrate 5. An n-layer photoelectric conversion element is formed in a predetermined region inside the p-layer 6. Also, the p layer 6
, A high concentration p layer 8 is formed at a position separated from the n layer 7. An n-layer 9 serving as a transfer channel which is a vertical CCD is provided in the p-layer 8.

The signal charges stored in the n-layer 7 are read out to the n-layer 9, and the signal charges are transferred in the n-layer 9 in a direction perpendicular to the plane of the drawing. High concentration p layer 10 formed on n layer 7
Are formed in order to prevent generation of dark current due to the interface state of Si—SiO ₂ .

Between the p layer 6 and the substrate 5, a positive potential is applied to the substrate,
A reverse bias voltage Vsub which becomes a negative potential is applied to the layer 6 by the power supply 11.
Is applied. That is, a reverse bias voltage Vsub is applied between the p layer 8 and the substrate 5. Therefore, the p layer 6 below the photoelectric conversion element formed by the n layer 7 is depleted. When the p-layer 6 is depleted, the charge that has become excessive in the amount of charge that can be accumulated in the n-layer 7 is discharged to the substrate 5 side. Thus, the blooming phenomenon is prevented. Further, by applying a pulse voltage to the n-type substrate 5, it is possible to perform a so-called electronic shutter operation of discharging all the signal charges in the n-layer 7 to the substrate 5 side.

An insulating film 12 such as SiO ₂ is formed on the surface of the substrate 5. On the insulating film 12, the vertical CCD transfer electrodes 13 are formed on the p layer 8 and the n layer 9 constituting the vertical CCD transfer electrode section 2 and on the region including the gap region between the n layer 7 and the p layer 8. ing. Further, an insulating film 12 is formed on the side wall and the upper surface of the transfer electrode 13 to protect the solid-state imaging device from physical impact. Vertical CCD transfer electrode 1
Reference numeral 3 functions as an electrode for reading electrons accumulated in the n-layer 7 to the p-layer 8 or the n-layer 9 serving as a vertical CCD transfer channel.

As described above, in order to prevent the blooming phenomenon and perform the electronic shutter operation, it is necessary that the p layer 6 has a concentration and a depth within a predetermined range.

FIG. 26 shows an impurity concentration distribution along the line BB 'passing through the photoelectric conversion element portion 1 of FIG. FIG. 27 shows the net value of the impurity concentration in FIG. In both figures, the vertical axis indicates the impurity concentration. The horizontal axis indicates the distance from the substrate surface. The upper side of the vertical axis indicates the concentration of p-type impurity atoms, and the lower side of the vertical axis indicates the concentration of n-type impurity atoms. 26 indicate the impurity concentrations of the p-layer 10, the p-layer 6, the substrate 5, and the n-layer 7 of FIG. 25, respectively. The solid line 18 in FIG. 27 indicates the net value of each impurity concentration in FIG. The hatched area 19 is the net impurity distribution of the n-layer 7 of the photoelectric conversion element, and indicates the total amount of effective donors accumulated in the n-layer.

The impurity concentration of the n-layer 7 as the photoelectric conversion element is 1
7 has the highest concentration on the surface of the substrate 5, and the concentration decreases toward the inside of the substrate 5. Above the n-layer 7, a p-layer 10 is formed to reduce dark current. The impurity concentration 14 of the p layer 10 is higher than that of the n
Little spread inside. Therefore, the n layer 7 becomes the net impurity 19. Although the p-layer 6 has a low impurity concentration, its distribution state is widely distributed. That is, the concentration gradually decreases as the surface of the substrate 5 reaches the inside of the substrate 5 with the maximum concentration point.

In the solid-state image pickup device, after the electrons accumulated in the photoelectric conversion element are read out to the vertical CCD transfer electrode portion, the n-layer 7 of the photoelectric conversion element needs to be almost completely depleted so as not to cause an afterimage phenomenon. is there. For this reason, it is necessary that the total amount of effective donors indicated by the net impurity concentration 19 is set to the upper limit of the amount of charges that can be accumulated in the n-layer 7. That is, the total amount of effective donors determines the upper limit of the saturation characteristics of the photoelectric conversion element.

The net impurity concentration 19 is obtained by subtracting the impurity concentration 14 of the p layer 10 and the impurity concentration 15 of the p layer 6 from the value obtained by adding the impurity concentration 16 of the substrate 5 to the impurity concentration 17. The net impurity concentration 19 is determined by the impurity concentration 14 and the impurity concentration 17 from each process restriction. The impurity concentration 17 has the highest concentration on the surface of the substrate 5. The portion having the highest concentration is compensated by the impurity concentration 14 of the p-type layer 10 of the opposite conductivity type.

[0014]

However, such a conventional solid-state imaging device has the following disadvantages.

The impurity concentration 17 has the highest concentration on the surface of the substrate 5, and the portion having the highest concentration is compensated by the impurity concentration 14 of the p-type layer 10 of the opposite conductivity type. Therefore, of the impurity concentration 17 of the n-layer 7 introduced as a photoelectric conversion element, a region having a relatively low concentration is used as the photoelectric conversion element. That is, in a photoelectric conversion element having a low concentration, the total amount of effective donors that can be accumulated therein is small, and the saturated charge amount cannot be sufficiently increased. For this reason, the amount of impurities introduced into the impurity concentration 17 is increased. Further, the volume of the photoelectric conversion element is increased by diffusing the introduced impurities into a deep portion of the substrate by high-temperature heat treatment.

However, when the high-temperature heat treatment is performed, the impurity concentration 17 spreads in a direction perpendicular to the surface of the substrate 5. For this reason, it also diffuses into the gap between the p layer 8 and the n layer 7 and the n layer 9 which is a vertical CCD transfer channel. perpendicular to end of n-layer 7
The positional relationship with the D transfer electrode 2 is determined by the mask positioning accuracy in the exposure step performed when the transfer electrode 2 is formed and the diffusion region of the n layer 7 formed by diffusion. For this reason, it is extremely difficult to control the position formed by the thermal diffusion at a high temperature. If the controllability of the position between the end of the n-layer 7 and the vertical CCD transfer electrode 2 is poor, electrons that become signals are left in the photoelectric conversion element when reading out from the photoelectric conversion element to the vertical CCD transfer channel. Is more likely to occur. The electrons left behind in this manner cause an afterimage phenomenon, and significantly degrade image quality.

In the case of ion implantation using only the electrode as a mask, the thickness of the electrode is determined from other characteristics and processes of the device. Is significantly limited. This is because, if the ions are implanted at an acceleration voltage higher than that, ions are also implanted under the electrodes, and the device does not operate normally. Therefore, the acceleration voltage is extremely limited to a low acceleration region. That is, the n-layer 7 cannot be formed at a deep position.

On the other hand, by supplementing the concentration compensated by the p layer 10, when the introduction amount of the n layer 7 is increased in order to enhance the saturation characteristics, defects at the time of ion implantation increase, and so-called white scratches are reduced. To increase. For this reason, the yield decreases.
This is a serious problem in manufacturing technology.

[0019]

In order to solve the above-mentioned problems, a method of manufacturing a solid-state imaging device according to the present invention comprises the steps of: forming an electrode material on a semiconductor substrate; processing the electrode material; Ion-implanting impurities into the substrate using an electrode material and a resist on the electrode material as a mask to form a photoelectric conversion element, wherein the concentration maximum of the impurities in the substrate depth direction is within the substrate. Is characterized in that:

According to the method of manufacturing a solid-state imaging device of the present invention, a step of forming an electrode material on a semiconductor substrate; a step of forming a first resist pattern on the electrode material;
Removing the electrode material using the resist pattern as a mask; implanting impurities into the substrate using the first resist pattern and the electrode material as a mask to form a photoelectric conversion element; Removing the resist pattern, forming a second resist pattern on the electrode material, and removing the electrode material using the second resist pattern as a mask to form an electrode. It is characterized by.

As described above, in the solid-state imaging device according to the present invention, the n-layer serving as the photoelectric conversion element is realized by ion implantation with high acceleration energy. You can have.
For this reason, the total amount of effective donors that can be stored in the photoelectric conversion element increases, and the saturation charge amount can be sufficiently increased.

Since the photoelectric conversion element is formed by ion implantation, the positional relationship between the end of the photoelectric conversion element and the vertical CCD transfer electrode depends on the mask alignment accuracy in the exposure step performed when the transfer electrode 2 is formed. Is determined. Therefore, it is not necessary to control the thermal fluctuation of the position caused by the thermal diffusion at a high temperature, and the controllability of the position between the end of the photoelectric conversion element and the vertical CCD transfer electrode is high. This makes it difficult for the solid-state imaging device to cause an afterimage phenomenon, and can prevent image quality from deteriorating.

Further, in the impurity concentration distribution of the n-layer forming the photoelectric conversion element by ion implantation, the maximum value of the concentration can be inside the substrate. Therefore, the total amount of effective donors accumulated in the photoelectric conversion element increases. Therefore, it is possible to obtain a solid-state imaging device including a photoelectric conversion element having high saturation characteristics.

A p-layer for preventing dark current is formed on the n-layer of the photoelectric conversion element. A maximum value of the concentration of the n-layer serving as a photoelectric conversion element is formed inside the substrate by ion implantation. For this reason, the net value of the impurity concentration of the p-layer on the substrate surface can be made higher than the concentration of the p-layer of the conventional solid-state imaging device even when the same concentration of the p-layer impurity is introduced. Therefore, a solid-state imaging device having a photoelectric conversion element having low dark current characteristics can be obtained. When the introduction amount of the p-layer impurity is large, so-called white flaws increase by itself, and it is very useful to effectively obtain a high net value with a small introduction amount.

In the method of manufacturing a solid-state imaging device according to the present invention, the impurity concentration of the photoelectric conversion element is highest at the deep portion of the substrate. Therefore, it is not necessary to increase the amount of impurities introduced into the photoelectric conversion element, which has been conventionally performed. In order to increase the introduction amount, a considerable time loss is caused. Therefore, the throughput when forming the solid-state imaging device does not decrease. Further, a decrease in yield due to white spots can be prevented.

Further, it is not necessary to diffuse the introduced impurities into the deep portion of the substrate by high-temperature heat treatment to increase the volume of the photoelectric conversion element. Therefore, defects in the substrate caused by the high-temperature heat treatment do not occur. Further, the impurity is diffused from the other diffusion layers, and there is no need to control to have a desired impurity concentration. In addition, by performing the high-temperature heat treatment, the photoelectric conversion element is not diffused and spread, and does not diffuse to the vertical CCD transfer channel or the gap between the transfer channel and the photoelectric conversion element.

Further, the positional relationship between the end of the photoelectric conversion element and the end of the vertical CCD transfer electrode does not become difficult to control the position of the diffusion layer by performing a high-temperature heat treatment. Therefore, a favorable positional relationship between the two can be easily obtained. This can prevent blooming and an afterimage phenomenon of the solid-state imaging device from occurring, and can suppress deterioration in image quality.

An object of the present invention is to prevent a blooming phenomenon or an afterimage phenomenon from occurring, and to prevent deterioration in image quality. Another object of the present invention is to provide a method for manufacturing a solid-state imaging device capable of forming the solid-state imaging device by an easy process.

In the present invention, since the photoelectric conversion element is formed by ion-implanting impurities into the substrate using the electrode material and the resist on the electrode material as a mask, even if the impurities are implanted deep into the substrate at a high accelerating voltage, the electrode It is possible to manufacture a solid-state imaging device having stable characteristics without introducing impurities under a material.

[0030]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a solid-state imaging device according to a first embodiment of the present invention. An embodiment of the present invention is shown in FIG.
Has a configuration similar to the conventional solid-state imaging device shown in FIG. n
There is a p-layer 6 having a predetermined range of depth and concentration formed on the mold substrate 5. An n-layer photoelectric conversion element is formed in a predetermined region inside the p-layer 6. A high concentration p layer 8 is formed in the p layer 6 at a position separated from the n layer 7.
An n-layer 9 serving as a transfer channel which is a vertical CCD is provided in the p-layer 8. The signal charge stored in the n-layer 7 is n
The signal charges are read out to the layer 9 and the signal charges are transferred in the direction perpendicular to the plane of the drawing within the n-layer 9. A high concentration p layer 10 is formed on n layer 7 and on the surface of substrate 5. The p layer 10
It is formed in order to prevent the generation of dark current due to the Si-SiO ₂ interface state.

On the surface of the substrate 5, an insulating film 12 such as SiO ₂ is formed. On the insulating film 12, the vertical CCD transfer electrodes 13 are formed on the p layer 8 and the n layer 9 constituting the vertical CCD section 2 and on the region including the gap region between the n layer 7 and the p layer 8. . Further, an insulating film 12 is formed on the side wall and the upper surface of the transfer electrode 13 to protect the solid-state imaging device from physical impact. The vertical CCD transfer electrode 13
The electrons accumulated in the n-layer 7 are transferred to the vertical CCD via the p-layer 8.
It also functions as an electrode for reading out to the n-layer 9 serving as a transfer channel.

FIG. 2 shows the impurity concentration distribution in the substrate along the line AA 'passing through the p-layer 10 and the n-layer 7, the p-layer 6 and the substrate 5 of the photoelectric conversion element shown in FIG. Also, in FIG.
3 shows a net impurity distribution of the impurity concentration distribution of FIG. In the present invention, as shown in FIG. 1, the cross-sectional shape of the solid-state imaging device is exactly the same as that of the conventional one, but the impurity concentration distribution of the formed impurity layer is different. This will be described in more detail. In both figures, the vertical axis indicates the impurity concentration. The horizontal axis indicates the distance from the substrate 5 surface. Above the horizontal axis, that is, above the vertical axis, the concentration of the p-type impurity is shown, and below the horizontal axis, that is, below the vertical axis, the concentration of the n-type impurity is shown.

The broken lines 21, 22, 23, and 24 in FIG. 2 indicate the impurity concentrations of the p-layer 6, the substrate 5, the n-layer 7, and the p-layer 10 of FIG. A solid line 25 in FIG. 3 indicates a value obtained by combining the respective impurity concentrations in FIG. 2 (hereinafter, referred to as a net value). The shaded area 26 indicates the net impurity concentration of the n-layer 7 of the photoelectric conversion element. The total amount of effective donors stored in the n-layer 7 is shown.

The impurity concentration 2 of the n-layer 7 as a photoelectric conversion element
No. 3 has a point where the highest concentration, that is, the highest concentration, exists inside the substrate 5. On the surface of the substrate 5, the impurity concentration of the n-layer 7 is low, and the concentration increases toward the inside of the substrate 5.
As described above, the maximum value of the impurity concentration of the n-layer 7 exists inside the substrate 5, and the impurity concentration of the n-layer 7 decreases further toward the inside of the substrate than the depth at which the maximum value is obtained. In the conventional solid-state imaging device, the impurity concentration of the n-layer 7 is formed so as to have a maximum region in a region as shallow as the impurity concentration of the surface of the substrate 5 or the p-layer 10 for reducing dark current is distributed. Have been. The impurity concentration 24 of the p layer 10 is higher than the concentration of the n layer 7 and is formed so as to be less spread into the substrate 5.

Further, the p-layer 6 is formed inside the substrate 5 so as to at least overlap the end of the n-layer 7 of the photoelectric conversion element which is deep inside the substrate 5. The impurity concentration 21 starts to increase from a portion overlapping with the n-layer 7 and is distributed so as to have a maximum value in a deep portion of the substrate 5. In the conventional solid-state imaging device, the impurity concentration of the p layer 6 is
It is formed so as to have a maximum region in a region as shallow as the depth where the impurity concentration of the p-layer 10 for reducing the dark current is distributed on the surface of the substrate 5. The distribution of the impurity concentration is low and extends to a considerably deep portion of the substrate 5.

The difference in the distribution of the impurity concentration between the solid-state imaging device of the present invention and the conventional solid-state imaging device causes a large difference in the total amount of effective donors accumulated in the photoelectric conversion element. That is, the total amount of effective donors represented by the net impurity concentration 26 is obtained as follows. It is obtained from a value obtained by subtracting the impurity concentration 24 of the p layer 10 and the impurity concentration 21 of the p layer 6 from the value obtained by adding the impurity concentration 22 of the substrate 5 to the impurity concentration 23.

In the conventional solid-state imaging device, the impurity concentration of the n-layer 7 of the photoelectric conversion element is maximized in a shallow region of about the depth where the impurity concentration of the surface of the substrate 5 or the p-layer 10 for reducing dark current is distributed. Is formed. Therefore, the region having the highest impurity concentration in the n-layer 7 serving as the photoelectric conversion element is canceled by the high-concentration, shallow p-layer 10 formed on the surface of the substrate 5. Therefore, the absolute amount of effective donors stored in the photoelectric conversion element decreases. Further, although the impurity concentration of the p-layer 6 is low, it is distributed deeply to the deep portion of the substrate 5, so that the concentration of the n-layer 7 of the photoelectric conversion element is reduced as a whole. Therefore, the absolute amount of effective donors stored in the photoelectric conversion element decreases.

On the other hand, in the solid-state imaging device according to the present invention, the n-layer 7 serving as a photoelectric conversion element is formed on the surface of the substrate 5 or in a region as shallow as the depth where the impurity concentration of the p-layer 10 for reducing dark current is distributed. The impurity concentration is formed to be low. For this reason, the n-layer 7 serving as a photoelectric conversion element has almost no problem with the high impurity concentration 24 formed on the surface of the substrate 5, that is, the concentration that is canceled out by the shallow p-layer 10 in the distribution state. For this reason, the absolute amount of the effective donor accumulated in the photoelectric conversion element only decreases to a level that does not cause a problem as compared with the conventional case.

Further, the impurity concentration 21 of the p layer 6 is formed in a deep part of the substrate 5. The end of the impurity concentration 21 is distributed so as to overlap the end of the n-layer 7 of the photoelectric conversion element. Also here, in the region of the impurity concentration 23 overlapping with the impurity concentration 21, the n-type impurity concentration is formed to be low. For this reason, the concentration at which the n-layer 7 serving as the photoelectric conversion element is canceled by the impurity concentration 21 is such that there is almost no problem. For this reason, the absolute amount of the effective donor accumulated in the photoelectric conversion element only decreases to a level that does not cause a problem as compared with the conventional case. As described above, when the p layer 6 and the n layer 7 are overlapped, the impurity concentration 21 is restricted as follows. First, when there is no overlap, FIG.
The solid line 25 of the net impurity concentration indicated by the symbol has a shape as shown in FIG. The area where effective donors are accumulated is the substrate 5
A protruding region is formed in a deep part. In the photoelectric conversion element having such a shape, since the net impurity concentration 26 is not canceled by the impurity concentration 21, the net net impurity concentration 26 is substantially increased. As the net impurity concentration 26 increases, the total effective donor amount increases.

When the overlapping region is shallow, the concentration of the maximum value a of the impurity concentration 21 in the overlapping region must be higher than the impurity concentration b of the substrate 5. That is, the concentration of a indicates the concentration of the p-layer 6 at the end of the impurity concentration distribution of the n-layer 7. If the value of a is smaller than the value of b, the solid line 2 of the net impurity concentration shown in FIG.
As shown in FIG. 5, the impurity concentration has a protruding shape at the deep portion of the substrate 5.

Conversely, when the value of a is extremely larger than the value of b, the wall of the solid line 25 on the p-side is raised. That is, the potential barrier formed between n layer 7 and substrate 5 is increased. If the potential barrier is high, the blooming phenomenon can be prevented by increasing the voltage to be applied to the substrate 5.

However, when the distribution of the impurity concentration 21 is steep, the region where the n layer 7 and the p layer 6 overlap is shallow, the value of a is extremely larger than the value of b, and the thickness of the p layer 6 is thin. The net impurity concentration 26 is reduced by the amount by which the net impurity concentration 26 is canceled by the impurity concentration 25.
Will be higher. Therefore, the total amount of effective donors becomes large. Further, a sufficient effect can be obtained even if the voltage to be applied to the substrate 5 is low.

The maximum point of the impurity concentration 23 of the n-layer 7 is located in a region which does not completely overlap the impurity concentrations 21 and 24 of the p-layer 6 and the p-layer 10. By forming the impurity concentration 23 in this manner, the total amount of effective donors can be increased. As described above, the impurity concentration 23 of the n-layer 7 overlaps the impurity concentrations 21 and 24 of the p-layer 6 and the p-layer 10 only at the respective ends. That is, the impurity concentration of the p layer 10 is 2
4 and the impurity concentration 21 of the p layer 6 do not overlap with each other, and both are continued by the impurity concentration 23 of the n layer 7. By forming such an impurity concentration distribution, the total amount of effective donors accumulated in the n-layer 7 of the photoelectric conversion element can be significantly increased.

On the other hand, at the net impurity concentration 25, the area of the diagonal line 26 indicating the total effective donor amount accumulated in the n-layer 7 of the photoelectric conversion element is larger than the area of the diagonal line 19 indicating the conventional total amount. For this reason, the upper limit of the saturation characteristic of the photoelectric conversion element becomes larger than that of the conventional one, and the saturation charge amount of the solid-state imaging device, that is, the dynamic range can be significantly improved. Here, the concentration of the substrate 5 is about 1
0 ¹⁵ cm ^-3 . The concentration of the p layer 10 is 10 ¹⁸ to 10 ¹⁹
At cm ^-3 , its diffusion length is 0.5 microns. Also,
The concentration of the p layer 6 is about 10 ¹⁵ cm ⁻³ ,
From 1.5 microns from the surface to a diffusion length of 3.0 microns. The concentration of the n-layer 7 is 10 ¹⁶ to 10 ¹⁷ cm ⁻³ , and its diffusion length is 1.8 μm. Therefore, the area where the n-layer 7 and the p-layer 6 overlap is 0.3 μm.

FIG. 5 shows the impurity concentration in the solid-state imaging device according to the second embodiment of the present invention. Specifically, FIG.
2 shows the impurity concentration in the substrate along the line AA ′ passing through the p layer 10, the n layer 7, the p layer 6, and the substrate 5 of the photoelectric conversion element. FIG. 6 shows the net value of the impurity concentration in FIG. In the present invention, as shown in FIG. 1, the cross-sectional shape of the solid-state imaging device is exactly the same as that of the conventional one, but the impurity concentration distribution of the formed impurity layer is different. This will be described in more detail.

In both figures, the ordinate and abscissa show exactly the same as in FIGS. Dashed lines 27, 28, 29, 3 in FIG.
0 denotes the p layer 6, the substrate 5, the n layer 7, and the p layer 10 of FIG.
Is shown. The solid line 31 in FIG. 6 indicates the net value of each impurity concentration in FIG. The shaded region 32 indicates the net impurity concentration of the n-layer 7 of the photoelectric conversion element. The total amount of effective donors stored in the n-layer 7 is shown.

The impurity concentration 2 of the n-layer 7 as the photoelectric conversion element
No. 9 has the highest concentration inside the substrate 5, that is, the point where the concentration is maximum. On the surface of the substrate 5, the impurity concentration of the n-layer 7 is low, and the concentration increases toward the inside of the substrate 5.
As described above, the maximum value of the impurity concentration of the n-layer 7 exists inside the substrate 5, and the impurity concentration of the n-layer 7 decreases further toward the inside of the substrate than the depth at which the maximum value is obtained. As described above, n
The distribution of the impurity concentration of the layer 7 is the same as that of the first embodiment of the present invention. A p-layer 10 is formed on the n-layer 7 to reduce dark current. As in the first embodiment of the present invention, the impurity concentration 30 of the p layer 10 is higher than the concentration of the n layer 7 and formed so as to be less spread inside the substrate 5.

What is different from the first embodiment of the present invention is that
The point is that the p layer 6 is formed at a low concentration from the surface of the substrate 5 to the deep portion of the substrate 5 as in the case of the impurity concentration 15 of the conventional solid-state imaging device. That is, the impurity concentration 6 is
It has a maximum concentration on the surface. In addition, the distribution state is
Spread deep. The diffusion depth of the p layer 6 is formed deeper than the diffusion depth of the n layer 7.

The difference in the distribution of the impurity concentration between the solid-state imaging device of the present invention and the conventional solid-state imaging device greatly changes the total amount of effective donors accumulated in the photoelectric conversion element. That is,
The total amount of effective donors represented by the net impurity concentration 32 is
It is determined as follows. It is obtained from a value obtained by subtracting the impurity concentration 30 of the p layer 10 and the impurity concentration 27 of the p layer 6 from the value obtained by adding the impurity concentration 28 of the substrate 5 to the impurity concentration 29.

In the conventional solid-state imaging device, the impurity concentration of the n-layer 7 of the photoelectric conversion element is maximized in a shallow region of about the depth where the impurity concentration of the surface of the substrate 5 or the p-layer 10 for reducing dark current is distributed. Is formed. Therefore, the region having the highest impurity concentration in the n-layer 7 serving as the photoelectric conversion element is canceled by the high-concentration, shallow p-layer 10 formed on the surface of the substrate 5. Therefore, the absolute amount of effective donors stored in the photoelectric conversion element decreases. Further, although the impurity concentration of the p-layer 6 is low, it is distributed deeply to the deep portion of the substrate 5, so that the concentration of the n-layer 7 of the photoelectric conversion element is reduced as a whole. Therefore, the absolute amount of effective donors stored in the photoelectric conversion element decreases.

On the other hand, in the solid-state imaging device of the present invention, the n-layer 7 serving as a photoelectric conversion element is formed on the surface of the substrate 5 or in a region as shallow as the depth where the impurity concentration of the p-layer 10 for reducing dark current is distributed. The impurity concentration is formed to be low. For this reason, the n-layer 7 serving as the photoelectric conversion element has a concentration that is negligible by the high impurity concentration 30 formed on the surface of the substrate 5, that is, the concentration that is canceled out by the shallow p-layer 10 in the distribution state. For this reason, the absolute amount of the effective donor accumulated in the photoelectric conversion element only decreases to a level that does not cause a problem as compared with the conventional case.

However, in the first embodiment of the present invention, the impurity concentration 21 of the p layer 6 is formed in a deep part of the substrate 5. The end of the impurity concentration 21 is distributed so as to overlap the end of the n-layer 7 of the photoelectric conversion element. For this reason, the concentration at which the n-layer 7 serving as the photoelectric conversion element is canceled by the impurity concentration 27 is such that there is almost no problem. In comparison with this, the second embodiment of the present invention is the same as the conventional solid-state imaging device in that the p layer 6 is formed by diffusing from the surface of the substrate 5. For this reason, the absolute amount of effective donors stored in the photoelectric conversion element is smaller than in the first embodiment of the present invention. Compared with the conventional case, the total amount of effective donors is reduced to such an extent that even the second embodiment of the present invention does not matter.

In the second embodiment of the present invention, only the n-layer 7 is different from the conventional solid-state imaging device. In the first embodiment of the present invention, the region where the n-layer 7 and the p-layer 6 overlap is a problem, but in the second embodiment of the present invention, it can be easily formed by a conventional process. Also,
At the net impurity concentration 31, the n-layer 7 of the photoelectric conversion element
The area of the oblique line 32 indicating the total amount of effective donors accumulated in
It is larger than the area of the oblique line 19 indicating the conventional total amount. For this reason, the upper limit of the saturation characteristic of the photoelectric conversion element is larger than that of the conventional one, and the saturation charge amount of the solid-state imaging device can be increased.

Here, the concentration of the substrate 5 is 10 ¹⁵ cm ⁻³ . The concentration of the p layer 10 is 10 ¹⁸ to 10 ¹⁹ cm ⁻³ , and the diffusion length is 0.5 μm. The concentration of the p layer 6 is about 2 × 10 ¹⁴ cm ⁻³ , and the region has a diffusion length of 5.5 μm from the surface of the substrate 5. The concentration of the n-layer 7 is 10 ¹⁶
At 〜１０10 ¹⁷ cm ^-3 , its diffusion length is 1.8 microns. Therefore, the area where the n layer 7 and the p layer 6 overlap is 1.8 microns. When a solid-state imaging device is formed under the above conditions, the saturation charge amount of the conventional solid-state imaging device is 4 ×
Although about 10 ⁴ / pixel, a value of about 1.2 × 10 ⁵ / pixel is obtained.

FIG. 7 shows a sectional structure of a solid-state imaging device according to a first embodiment of the present invention. This figure is a prior art FIG.
FIG. 6 is a cross-sectional view of a region corresponding to the solid-state imaging device shown in FIG.

A p-layer 33 having a predetermined range of depth and concentration is formed on the n-type substrate 5. A partial region of the n-layer photoelectric conversion element 7 is formed in the p-layer 33.
A high concentration p layer 8 is formed on the p layer 33, and the p layer 8
An n layer 9 serving as a vertical CCD transfer channel is provided therein. Further, a p-layer 34 having a high concentration and a small thickness is formed in contact with the bottom of the photoelectric conversion element 7. p layer 34
It is formed on an n-type substrate 5 sandwiched between a layer 33 and a p-layer 33 adjacent thereto. A high concentration p layer 10 is formed on the photoelectric conversion element 7. Further, the p layer 8 is formed by the n layer 7 and the p layer
It is formed separately from the layer 10.

On the n-type substrate 5, at least a photoelectric conversion element
SiO 2 is formed in a region except a predetermined region of the child 7. _TwoInsulating film 12 such as
A vertical CCD transfer electrode 13 is formed therebetween. Photoelectric
The n-layer 7 of the conversion element has a low-concentration thick p-layer 33 and a high-concentration
It is formed on two regions of the thin p-layer 34.
The signal charges stored in the n-layer 7 of the photoelectric conversion element are transferred to the n-layer 9
The signal is read out, and the signal is
Charge is transferred. Formed on the n-layer 7 of the photoelectric conversion element
The high-concentration p layer 10 is made of Si-SiO_TwoDue to the interface state of
It is formed in order to prevent generation of dark current.

As described above, in the solid-state imaging device of the present invention,
A configuration different from the conventional solid-state imaging device is that the n-layer 7 of the photoelectric conversion element is formed at least on two regions of a low-concentration thick p-layer 33 and a high-concentration thin p-layer 34. It is a point. Here, a substrate 5 having a concentration of 10 ¹⁵ cm ⁻³ was used. The concentration of the p layer 33 is 10 ¹⁵ cm.
^{At -3} , its diffusion length is 3 microns. The concentration of the n-layer 7 is 10 ¹⁶ to 10 ¹⁷ cm ⁻³ , and the diffusion length is 1.8 μm. The concentration of the p layer 10 is 10 ¹⁸ to 10 ¹⁹ cm ^-3.
The diffusion length is 0.5 microns. The concentration of the p-layer 8 is 3 × 10 ¹⁷ cm ⁻³ and its diffusion length is 1.2 μm. The concentration of the n-layer 9 is 5 × 10 ¹⁶ cm ⁻³ and its diffusion length is 0.8 μm. The concentration of the p layer 34 is 4 × 10 ¹⁵
At cm ^-3 , its diffusion length is 1.5 microns.

The p-layer 34 is formed at a position distant from the n-layer 9 which is a vertical CCD transfer section of the n-layer 7 which is a photoelectric conversion element. The p layer 34 is formed along the long side of the n layer 7 of the photoelectric conversion element. The length in the long side direction of the p layer 34 is 3
Micron. If this length is longer and formed along the long side of the n-layer 7 of the photoelectric conversion element, the applied voltage for operating the electronic shutter can be reduced.
That is, the pulse voltage to be applied to the substrate 5 to discharge all the signal charges accumulated in the n-layer 7 to the substrate 5 can be reduced.

The n-layer 7 and the p-layer 34 of the photoelectric conversion element
The end farthest from the n-layer 9 which is the vertical CCD transfer unit coincides with the embodiment of the present invention. The same effect can be obtained even when the end of the p layer 34 extends from the end of the n layer 7 to the adjacent p layer 33. As described above, since there is a margin in the positional relationship for forming the end portion, a margin in manufacturing is increased. On the other hand, if the end of the p layer 34 is shorter than the end of the n layer 7, the n layer 7 comes into direct contact with the substrate 5 and no signal charges can be stored in the n layer 7.

Further, the thickness of the p layer 34 in the depth direction of the substrate 5 is 1.5 μm. This thickness affects the value of the pulse voltage to be applied to the n-layer 7 when operating the electronic shutter of the solid-state imaging device. That is, when the thickness is smaller than this thickness, the potential barrier generated between n layer 7 and substrate 5 becomes low. Therefore, the voltage to be applied to the substrate 5 can be reduced. If the thickness is larger than this thickness, the potential barrier generated between n layer 7 and substrate 5 becomes higher. Therefore, it is necessary to increase the voltage to be applied to the substrate 5. Between the p-layer 33 and the n-type substrate 5, a reverse bias voltage Vsub, which is a positive potential to the n-type substrate 5 and a negative potential to the p-layer 33, is applied.

When a positive voltage Vsub is applied to the n-type substrate 5 in order to prevent the blooming phenomenon, the potential distribution along the lines CC ′ and DD ′ shown in FIG. 7 is shown in FIG. , 9. FIG. 8 is a diagram for explaining in detail that the solid-state imaging device of the present invention is effective in reducing the blooming phenomenon. 8 indicates the potential distribution along the line CC ′ shown in FIG. 7, and the solid line 37 indicates the potential distribution along the line DD ′. Regions 10, 7, 33, and 5 indicate the high-concentration p-layer 10, the n-layer 7 of the photoelectric conversion element, the low-concentration and thick p-layer 33, and the thickness of the n-type substrate 5 in the depth direction, respectively. Vs
When the potential ub is applied, the value of the minimum potential 38 in the low-concentration thick p-layer 33 is higher than the value of the minimum potential 39 in the high-concentration thin p-layer 34.

In the n-layer 7 of the photoelectric conversion element, a potential well is formed. Therefore, the charges generated in the n-layer 7 and the periphery thereof move along the potential forming the well of this potential. As a result, charges are accumulated in the potential well. Further, the accumulated electric charge increases, and the minimum potential 38
When an electric charge having a potential exceeding the above occurs, it becomes an excess electric charge and moves along the electric potential distribution of the p layer 33. As a result, excess charges are discharged to the n-type substrate 5.

The blooming phenomenon is a phenomenon that occurs when high-luminance light enters the n-layer 7 of the photoelectric conversion element. That is, a large amount of electrons are instantaneously generated in the photoelectric conversion element by the incident light. Only a certain amount of electrons can be stored in the photoelectric conversion element. Therefore, when the amount of electrons generated instantaneously is larger than the capacity stored in the photoelectric conversion element, it is caused by excessive electrons flowing into the transfer channel of the adjacent vertical CCD. Such a phenomenon is called a blooming phenomenon.

From FIG. 8, the potential distribution in the photoelectric conversion element is
FIG. 9 shows two types of distributions shown by a broken line 36 and a solid line 37 shown in FIG. 8. The electrons formed in the n-layer 7 of the photoelectric conversion element are
The potential is accumulated in the well. When the accumulation amount increases, electrons flow to the p-layer 33 from the lower potential portion of the two distribution shapes of the n-layer 7 of the photoelectric conversion element. The minimum potential 38 in the distribution state indicated by the solid line 37
Is lower than the minimum potential 39 of the dashed line 36, so that electrons flow from the region having the potential distribution of the solid line 37 to the p-layer 33 first.

FIG. 9 is a diagram for explaining in detail that the solid-state imaging device of the present invention has a configuration effective for performing the operation of the electronic shutter. The electronic shutter discharges all signal charges accumulated in the n-layer 7 of the photoelectric conversion element to the n-type substrate 5. FIG. 9 shows a potential distribution in the substrate 5 when the operation of the electronic shutter is performed. That is, the operation of the electronic shutter is to discharge all the electrons accumulated in the n-layer 7 of the photoelectric conversion element to the substrate 5. If the stored electrons are not completely discharged, when the electronic shutter is operated, a different amount of electric charge is accumulated (remaining) inside each photoelectric conversion element. Therefore, a fixed pattern is generated by the remaining charges. A positive voltage Vsub higher than that in FIG. 8 is applied to the n-type substrate 5 to operate the electronic shutter.

FIG. 9 shows a line CC ′ and a line DD ′ in FIG.
The potential distribution along the line is shown by a broken line 40 and a solid line 41, respectively. The regions 10, 7, 33, and 5 in FIG.
3 shows the thickness of the n-type substrate 5 in the depth direction. Vsu
When the potential b is applied, the p layer 34 having a high concentration and a small thickness is formed.
Is the minimum potential 43 of the thick p-layer 33 with a low concentration.
And the minimum potential 42 is lower than the potential 44 of the n-layer 7. For this reason, the signal charges stored in the n-layer 7 of the photoelectric conversion element are indicated by broken lines 42 having a low potential.
Move along. At this time, since the potential indicated by the broken line 42 is lower than the minimum potential 44 in the n-layer 7 of the photoelectric conversion element, all signal charges accumulated in the photoelectric conversion element are discharged to the n-type substrate 5.

FIG. 10 is a diagram showing the relationship between the potential and Vsub for explaining the reason for this. Figure 1
The solid line 45 and the dashed line 46 in FIG.
The Vsub voltage dependence of the minimum potential in the layer 33 and the p-layer 34 having a high concentration and a small thickness is shown.

The solid line 45 indicates that the minimum potential in the p-layer 33 gradually increases as the Vsub potential increases. On the other hand, the broken line 46 indicates that the minimum potential in the p layer 34 sharply increases as the Vsub potential increases. This difference is due to the fact that when the p layer 33 and the p layer 34 are compared, the impurity concentration of the p layer 33 is
Is lower than the impurity concentration and the thickness thereof is thicker. That is, the p-layer 34 has a high impurity concentration and a small thickness.

Therefore, the dependence of the amount of charge stored in the n-layer 7 of the photoelectric conversion element on the Vsub potential is indicated by the solid line 45 below the intersection 47 and the broken line 46 above the intersection 47 in FIG.
Is determined. That is, the amount of charge stored in the photoelectric conversion element has Vsub potential dependence as shown in FIG. The state shown in FIG. 8 during accumulation in the photoelectric conversion element, that is, the state shown in FIG. 8 corresponds to the region 48 in FIG.

When discharging the signal charge by operating the electronic shutter, the electronic shutter is operated in the state shown in FIG. 9, that is, in the state where the voltage is higher than the solid line shown in FIG. By doing so, the operation of the electronic shutter can be performed with the pulse voltage that causes the photoelectric conversion element having a high saturated charge amount to have a low Vsub. Thus, in order to prevent the occurrence of blooming, it is preferable to make the change in the maximum accumulated charge amount in the Vsub potential-dependent region where the change in the maximum accumulated charge amount is gentle relative to the Vsub potential, as in the region 48. The use in such a region facilitates Vsub potential adjustment of the camera-integrated VTR. Further, by using such a Vsub potential region, a decrease in the maximum accumulated charge amount of the photoelectric conversion element can be reduced.

On the other hand, when the electronic shutter is operated, the change in the maximum accumulated charge amount is Vsub as in the region 49.
Is preferably used in a region having a sharp Vsub dependency with respect to Because the potential for operating the electronic shutter is
This is achieved by adding a clock voltage to the potential applied when preventing blooming from occurring.

In the solid-state imaging device of the present invention, when operating the electronic shutter in the conventional solid-state imaging device, the electronic shutter can be operated at a voltage lower than the applied clock voltage. That is, when operating the electronic shutter in the conventional solid-state imaging device, the applied clock voltage is 3
In contrast to 0 volts, the solid-state imaging device according to the embodiment of the present invention can operate the electronic shutter at a voltage as low as 18 volts.

By forming the low-concentration thick p-layer 33 and the high-concentration thin p-layer 34 in contact with the n-layer 7 of the photoelectric conversion element, the Vsub of the video camera for preventing blooming is formed. The potential can be easily adjusted, and the maximum accumulated charge amount (saturated charge amount) of the photoelectric conversion element can be increased. Further, it can be realized with a low clock voltage for operating the electronic shutter.

Further, a high-concentration and shallow p-layer 34 is formed so as to partially overlap the n-layer 7 of the photoelectric conversion element as shown by a broken line 35 in FIG. That is, by forming the n-layer 7 at the position shown by the broken line 35, the thickness of the n-layer 7 in contact with the high-concentration and thin p-layer 34 is substantially reduced. Therefore, when the signal charges of the photoelectric conversion element are read, the n-layer 7 of the photoelectric conversion element is in a depleted state. Therefore, the potential distribution generated there becomes deeper on the reading side, and it becomes easier to prevent the occurrence of an afterimage.

Next, a solid-state imaging device according to a second embodiment of the present invention will be described with reference to FIG. The cross-sectional view of FIG. 12 is a cross-sectional view along the line AA ′ of the conventional technique (FIG. 24). A p-layer 33 having a predetermined range of depth and concentration is formed on the n-type substrate 5. A partial region of the photoelectric conversion element of the n-layer 7 is formed in the p-layer 33. Also, p
In the layer 33, a high concentration p layer 8 is formed, and in the p layer 8, an n layer 9 serving as a transfer channel which is a vertical CCD is provided. Further, a p-layer 34 having a high concentration and a small thickness is formed in contact with a part of the bottom of the n-layer 7 of the photoelectric conversion element. p
The layer 34 is an n layer sandwiched between the p layer 33 and the p layer 33 adjacent thereto.
Formed on the mold substrate 5. A high concentration p layer 10 is formed on n layer 7 of the photoelectric conversion element. Also, the p layer 8
Are formed separately from the p-layer 7 and the p-layer 10.

On the n-type substrate 5, a transfer electrode 13 of a vertical CCD is formed at least in a region excluding a predetermined region of the n-layer 7 of the photoelectric conversion element via an insulating film 12 such as SiO ₂ . Here, the different points from the first embodiment of the present invention are as follows.
That is, a p-layer 34 having a high concentration and a small thickness is formed on the reading side of the p-layer 8 serving as a vertical CCD transfer channel. In other words, the portion of the n-layer 7 of the photoelectric conversion element that is in contact with the high-concentration and thin p-layer 34 is formed slightly deeper than the portion that is in contact with the low-concentration and thick p-layer 33. The shape of the n-layer 7 of the photoelectric conversion element is a key shape, and a p-layer 34 is formed at the tip of the short side. Thus, when the n-layer 7 of the photoelectric conversion element is depleted, the potential on the read side of the photoelectric conversion element increases. For this reason, the charge of the photoelectric conversion element can easily move at the time of reading. Therefore, it is easier to prevent the occurrence of an afterimage.

Here, the driving method of the solid-state imaging device of FIG. 7 will be described with reference to FIGS. In FIG. 7, the p layer 8 is electrically grounded. A positive voltage is applied to the substrate 5. Therefore, the p-layers 8, 33, 34
There is a reverse bias state between the substrate and the substrate 5. The potential distribution during the signal charge accumulation period at this time is shown by CC ′ in FIG.
FIG. 8 shows the potential distribution along the line and the line DD ′ as described above. In this period, the minimum potential 38 of the p layer 33 is deeper than the minimum potential 39 of the p layer 34. Therefore, the electrons that have become excessively charged in the n-layer 7 of the photoelectric conversion element must move along the minimum potential 38 and be discharged to the substrate 5. For this purpose, a predetermined voltage may be applied to the substrate 5.

On the other hand, FIG. 9 shows the potential distribution along the line CC ′ and line DD ′ in FIG. 7 during the period in which the operation of the electronic shutter is performed, as described above. . In this period, it is necessary to apply a higher voltage to the substrate 5 than in the signal charge accumulation period. A higher voltage is applied to the substrate 5
, All the signal charges accumulated in the n-layer 7 can be discharged to the n-type substrate 5. For this purpose, the minimum potential 42 of the p layer 34 needs to be higher than the maximum potential 44 of the n layer 7.

By forming the p-layer 33 at a low concentration and increasing the thickness of the distribution and forming the p-layer 34 at a high concentration and deep, the electronic shutter can be operated at a lower voltage than in the conventional case. At this time, the potential of the minimum potential 43 of the p layer 33 is lower than the minimum potential 42 of the p layer 34. That is, as the Vsub potential applied to the substrate 5 is increased, the minimum potential 43 of the p-layer 33 becomes
Can overtake. In this way, the electronic shutter can be operated even when the potential applied to the substrate 5 is low.

Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 13 is a cross-sectional view of the prior art (FIG. 24).
FIG. 7 is a cross-sectional view taken along line BB ′ of FIG. A p-layer 33 having a predetermined range of depth and concentration is formed on the n-type substrate 5. The region sandwiched between the p layer 33 and the adjacent p layer 33 is the n-type substrate 5. The p-layer 34 is formed on the n-type substrate 5 sandwiched between the p-layer 33 adjacent to the p-layer 33. p
The n-layer 7 of the photoelectric conversion element is formed continuously in a part of each of the layer 33 and the p-layer 34. A p-layer 52 for isolation is formed between adjacent photoelectric conversion elements.

When the present invention is compared with the first and second embodiments of the present invention, the p layer 8 in the p layer 33 and the p layer 8
In this configuration, the n-layer 9 serving as a transfer channel is not provided. Further, a p-layer 34 having a high concentration and a small thickness is formed in contact with a part of the bottom of the n-layer 7 of the photoelectric conversion element. A high concentration p layer 10 is formed on n layer 7 of the photoelectric conversion element. On the n-type substrate 5, a transfer electrode 50 of a vertical CCD is formed at least in a region other than a predetermined region of the n-layer 7 of the photoelectric conversion element via an insulating film 12 such as SiO ₂ . Further, the transfer electrode 51 of the vertical CCD is provided with the insulating film 12.
Is formed through. High concentration and thin p layer 34
Are formed in a separation portion between a photoelectric conversion element and an adjacent photoelectric conversion element. That is, the p layer 34 is formed in common for the two photoelectric conversion elements. By doing so, the number of p-layers 34 having a high concentration and a small thickness can be reduced to half of the number of photoelectric conversion elements. Further, since the area of the high-concentration and thin p-layer 34 in contact with the photoelectric conversion element can be reduced, blooming can be easily prevented.

FIG. 14 is a sectional view taken along line CC ′ of FIG.
It is an impurity atom concentration distribution in the depth direction along the line. 5
3, 54, 55, 56 and 57 are high-concentration p layers 1 respectively.
0, n layer 7 of photoelectric conversion element, p layer 3 with high concentration and small thickness
4, the impurity concentration of the low-concentration thick p-layer 33 and the n-type substrate 5. In order to form the p-layer 34 with a high concentration and an impurity concentration 55 which is a thin layer, the n-layer 7 of the photoelectric conversion element is required.
Is formed so as to have a maximum value of the impurity atom concentration in the substrate rather than the surface of the substrate 5. With such a structure, a decrease in the net impurity concentration in the n-layer 7 of the photoelectric conversion element can be reduced. Therefore, the characteristics of the photoelectric conversion element do not deteriorate. At this time, low concentration and thick p
The impurity concentration 56 of the layer 33 is also high concentration and the thickness of the p layer 34 is small.
In the same manner as described above, the structure having the maximum value of the impurity atom concentration distribution inside the substrate rather than the substrate surface allows the impurity concentration 55 of the low-concentration thick p-layer 33 and the high-concentration p-layer 34 to be thin. The independence is easily maintained, and the control of the impurity concentration becomes easier. The above-described structure can be realized by implanting an impurity such as boron at an acceleration energy of 200 KeV or more when forming the p-layer 34 with a high concentration and a small thickness.

FIG. 15 shows the net impurity concentration distribution around the photoelectric conversion element thus formed. 58,5
Reference numerals 9, 60 and 61 denote a high-concentration p layer 10, an n-layer 7 of a photoelectric conversion element, a high-concentration and thin p-layer 34, and an n-type substrate 5, respectively.
Shows the net impurity concentration. Reference numerals 62 and 63 denote the low impurity concentration of the p layer 33 and the net impurity concentration of the n-type substrate 5, respectively. At this time, the impurity concentration distribution can be more easily controlled by implanting the low-concentration thick p-layer 33 at an acceleration energy of 200 KeV or more, similarly to the high-concentration and thin p-layer 34.

FIGS. 16 to 19 show a first embodiment of the present invention.
FIG. 3 is a sectional process view of the solid-state imaging device according to the embodiment. 20 Ohm
P-type impurities are present on almost the entire main surface of the n-type substrate 5 which is
Ion is implanted with boron as a substance. Where boron ion
The injection amount is about 5 × 10 ¹¹/ Cm^TwoPerform in. this
Boron is introduced into the surface of the substrate 5 by ion implantation.
Thereafter, the substrate 5 is heat-treated to form the p-layer 6
I do.

In the solid-state imaging device according to the second embodiment of the present invention, ions are introduced into the surface of the substrate 5 and thermally diffused so that the impurity concentration is distributed over a wide range. That is, by heat-treating the substrate 5 at a high temperature, the ion-implanted boron is diffused to form the p-layer 6. The p layer 6
Although ions are introduced into the substrate surface, the ions are diffused over a wide range by high-temperature heat treatment.
Are formed so as to be distributed over a wide range within the region.

After that, a resist pattern is formed by using ordinary photolithography in a region other than a region serving as a vertical CCD transfer channel. Using the resist pattern as a mask, boron is ion-implanted to form a p-layer 8. Thereafter, the previous resist pattern is removed by dry etching using an oxygen-based gas. Further, the n-layer 9 in the p-layer 8 serving as a vertical CCD transfer channel is again formed by using photolithography.
A resist pattern is formed in a region other than the region in which is formed. Using the resist pattern as a mask, phosphorus is ion-implanted to form an n-layer 9. Thereafter, the resist pattern is removed by using oxygen-based dry etching.

Next, an insulating film 12 is formed on the main surface of the substrate 5 by thermal oxidation. Here, an oxide film is used as the insulating film 12. Further, the vertical CCD transfer electrode 1 is formed on the insulating film 12.
An electrode material to be No. 3 is formed. Further, a resist is applied on the electrode material (FIG. 16). Next, the resist in a region other than the region wider than the region serving as the transfer electrode 13, that is, the region where the n-layer 7 serving as the photoelectric conversion element is to be formed is removed using photolithography, and the resist is removed. The pattern 20 is formed. Dry etching is performed on the electrode material using the resist pattern 20 as a mask until the insulating film 12 is exposed.

Next, using the resist pattern 20 and the electrode material as a mask, phosphorus ions are implanted using the insulating film 12 as a protective film. By this ion implantation, an n-layer 7 serving as a photoelectric conversion element is formed (FIG. 17). Here, phosphorus ion implantation is performed at an acceleration energy of 360 to 800 keV and an implantation amount of 1.2 × 10 ^{12 to} 3.4 × 10 ¹² / cm ² . From the above, it is not necessary to increase the amount of impurities introduced into the photoelectric conversion element as in the related art. In order to increase the introduction amount, a considerable time loss is caused. Therefore, the throughput when forming the solid-state imaging device does not decrease.

Further, it is not necessary to diffuse the introduced impurities into the deep portion of the substrate by high-temperature heat treatment to increase the volume of the photoelectric conversion element. Therefore, defects in the substrate caused by the high-temperature heat treatment do not occur. Further, the impurity is diffused from the other diffusion layers, and there is no need to control to have a desired impurity concentration. In addition, by performing the high-temperature heat treatment, the photoelectric conversion elements are diffused and spread, and are not diffused into the vertical CCD transfer channel or the gap between the transfer channel and the photoelectric conversion element.

Further, regarding the positional relationship between the end of the photoelectric conversion element and the end of the vertical CCD transfer electrode, it is not difficult to control the position of the diffusion layer by performing a high-temperature heat treatment. Therefore, the positional relationship between the two can be easily obtained. This can prevent the blooming phenomenon and the afterimage phenomenon of the solid-state imaging device from occurring, and can suppress the deterioration of the image quality due to the decrease in the saturation characteristic.

After that, the resist pattern 20 is removed. On the surface of the substrate 5, an electrode material in a region wider than the insulating film 12 and the transfer electrode 13 is formed. Next, the transfer electrode 13
A resist pattern is formed in a region to be formed, and the electrode material is dry-etched using the resist pattern as a mask.
Through the above steps, the transfer electrode 13 is formed (FIG. 18). At this time, the transfer electrode 1 is placed on the gap between the n-layer 7 and the p-layer 8 where electrons are read out from the photoelectric conversion element to the vertical CCD transfer channel.
3 are provided. For this reason, in the dry etching at the time of forming the transfer electrode 13, the side wall end of the n-layer 7 originally serving as the photoelectric conversion element and the side wall end of the transfer electrode 13 match, so that one side wall end of the transfer electrode 13 is shortened. It is formed to a predetermined length.

Next, an insulating film 12 is deposited on the main surface of the substrate 5. Using the transfer electrode 13 and the resist pattern as a mask, boron ions are implanted. As a result, a p-layer 10 for preventing dark current is formed on the n-layer 7 (FIG. 19).

Although the description here has been made with reference to the example of the n-type photoelectric conversion element, it is needless to say that the same effect can be obtained in the case of the p-type photoelectric conversion element. It is needless to say that the same effect can be obtained even if the polarity of the applied voltage is reversed by reversing the polarity of the conductivity type. It is needless to say that the ion species to be implanted need not be limited to those listed here.

FIGS. 20 to 23 show sectional process views of the solid-state imaging device according to the first embodiment of the present invention. n-type substrate 5
A resist pattern is formed in a region other than the region serving as the p-layer 33 on the main surface of FIG. That is, a resist pattern is formed on the substrate 5 in the region of the high-concentration and thin p-layer 34 formed below the photoelectric conversion element. Next, boron as a p-type impurity is ion-implanted into the entire surface of the substrate 5 using the resist pattern as a mask. Thereafter, the resist pattern is removed by using oxygen-based dry etching.

Next, a new resist pattern 64 is formed in a region to be the p layer 33. That is, the resist pattern 64 is formed on the substrate 5 other than the region of the high concentration and thin p layer 34 formed under the photoelectric conversion element. Next, using the resist pattern 64 as a mask, boron, which is a p-type impurity, is ion-implanted into the n-type substrate 5 (FIG. 20). Thereafter, the resist pattern 64 is removed using oxygen-based dry etching.

In the above two boron ion implantation steps,
The order of the injections may be changed. At this time, p
When the end portions of the diffusion layer of the layer 33 and the p-layer 34 overlap, the impurity concentration in the overlapped portion increases, and the thickness thereof also increases. For this reason, the overlapped portion does not contribute to discharging signal charges to the substrate. Further, if the end portions of the diffusion layers of the p layer 33 and the p layer 34 are formed without overlapping,
The p-type impurity concentration in the portion of the gap that does not overlap decreases. For this reason, the saturated charge amount decreases, or the Vsub voltage to be applied decreases.

Thereafter, a resist pattern is formed using photolithography in a region other than a region to be a vertical CCD transfer channel. Using the resist pattern as a mask, boron is ion-implanted to form a p-layer 8. Thereafter, the resist pattern is removed by dry etching using an oxygen-based gas. Further, a resist pattern is formed again by photolithography in a region other than the region where the n-layer 9 is formed in the p-layer 8 serving as a vertical CCD transfer channel. Using the resist pattern as a mask, phosphorus is ion-implanted to form n-layer 9. Thereafter, the resist pattern is removed by using oxygen-based dry etching.

Next, an insulating film 12 is formed on the main surface of the substrate 5 by thermal oxidation. Here, an oxide film is used as the insulating film 12. Since the thickness of this oxide film is used as a mask for ion implantation of a photoelectric conversion element formed in a later step, the thickness must be controlled with high precision. Further, an electrode material to be the vertical CCD transfer electrode 13 is formed on the insulating film 12. Further, a resist pattern 65 is formed on the electrode material using photolithography in a region other than a region wider than a region to be the transfer electrode 13. The electrode material is dry-etched using the resist pattern 65 as a mask until the insulating film 12 is exposed (FIG. 2).
1).

Next, phosphorus ions are implanted using the resist pattern 65 and the electrode material as a mask and using the insulating film 12 as a protective film. By this ion implantation, an n-layer 7 serving as a photoelectric conversion element is formed. The distribution of the impurity concentration of the n-layer 7 is high in the region formed on the substrate 5 and low in the region formed on the p-layer 33. That is, the n-layer 7 of the photoelectric conversion element formed on the substrate 5 is determined by the sum of the n-type impurity concentration of the substrate 5 and the ion-implanted n-type impurity concentration. On the other hand, the n-layer 7 of the photoelectric conversion element formed in the p-layer 33 is determined by the sum of the p-type impurity concentration of the p-layer 33 and the ion-implanted n-type impurity concentration. Thus, 1
Regions having different impurity concentrations are formed in n layer 7 of one photoelectric conversion element. Further, the high concentration thin p-layer 34 is controlled so as to be formed at the bottom of the diffusion layer of the n-layer 7 serving as a photoelectric conversion element.

In the second embodiment of the other solid-state imaging device described above, the high concentration and thin p-layer 34 is
Formed on the side. Also in this case, in the region where the p layer 34 and the n layer 7 overlap, the impurity concentration is the sum of the impurity concentrations of the n layer 7 and the p layer 34. Here, the n-layer 7 of the photoelectric conversion element is formed so that a portion in contact with the high-concentration and thin p-layer 34 is slightly deeper than a portion in contact with the low-concentration and thick p-layer 33. The shape of the n-layer 7 of the photoelectric conversion element is a key shape, and a p-layer 34 is formed at the tip of the short side. Thus, when the n-layer 7 of the photoelectric conversion element is depleted, the potential on the read side of the photoelectric conversion element increases. For this reason, the charge of the photoelectric conversion element can be easily moved at the time of reading.

As described above, the key type n layer is formed such that the junction surface between the p layer 34 and the n layer 7 is deeper than the junction surface between the p layer 33 and the n layer 7. That is, when the p-layer 34 is formed, the acceleration energy of boron to be ion-implanted is
The ion implantation is performed at a higher acceleration energy than the ion implantation for forming the p-layer 33. Therefore, by increasing the thickness of the n-layer 7 in the depth direction of the substrate 5, the potential at that portion increases.

As described above, it is not necessary to increase the amount of impurities introduced into the photoelectric conversion element as in the related art. In order to increase the introduction amount, a considerable time loss is caused. Therefore, the throughput does not decrease when the solid-state imaging device is formed. Further, it is not necessary to diffuse the introduced impurities into the deep part of the substrate by high-temperature heat treatment to increase the volume of the photoelectric conversion element. Therefore, defects in the substrate caused by the high-temperature heat treatment do not occur. Further, the impurity is diffused from the other diffusion layers, and there is no need to control to have a desired impurity concentration. Also,
By performing the high-temperature heat treatment, the photoelectric conversion element is diffused and spread, and does not diffuse to the vertical CCD transfer channel or the gap between the transfer channel and the photoelectric conversion element.

Further, regarding the positional relationship between the end of the photoelectric conversion element and the end of the vertical CCD transfer electrode, it is not difficult to control the position of the diffusion layer by performing a high-temperature heat treatment. Therefore, the positional relationship between the two can be easily obtained. This can prevent the blooming phenomenon and the afterimage phenomenon of the solid-state imaging device from occurring, and can suppress the deterioration of the image quality.

Thereafter, the resist pattern 65 is removed. On the surface of the substrate 5, an electrode material in a region wider than the insulating film 12 and the transfer electrode 13 is formed. Next, the transfer electrode 13
A resist pattern is formed in a region to be formed, and the electrode material is dry-etched using the resist pattern as a mask.
Through the above steps, the transfer electrode 13 is formed (FIG. 22). At this time, the transfer electrode 1 is placed on the gap between the n-layer 7 and the p-layer 8 where electrons are read out from the photoelectric conversion element to the vertical CCD transfer channel.
3 must be provided. For this reason, in the dry etching at the time of forming the transfer electrode 13, the side wall end of the n-layer 7 originally serving as the photoelectric conversion element and the side wall end of the transfer electrode 13 match, so that one side wall end of the transfer electrode 13 is shortened. It is formed to a predetermined length.

Next, an insulating film 12 is deposited on the main surface of the substrate 5. Using the transfer electrode 13 and the resist pattern as a mask, boron ions are implanted. Thus, a p-layer 10 for preventing dark current is formed on n-layer 7 (FIG. 23).

As described above, in the method of manufacturing a solid-state imaging device according to the present invention, since the n-layer serving as the photoelectric conversion element is realized by ion implantation with high acceleration energy, the impurity concentration distribution is the highest in the substrate. High area can be provided. For this reason, the total amount of effective donors that can be stored in the photoelectric conversion element increases, and the saturation charge amount can be sufficiently increased.

Since the photoelectric conversion element is formed by ion implantation, the positional relationship between the end of the photoelectric conversion element and the vertical CCD transfer electrode depends on the mask alignment accuracy in the exposure step performed when the transfer electrode 13 is formed. Is determined. Therefore, there is no need to control the position formed by thermal diffusion at a high temperature, and the controllability of the position between the end of the photoelectric conversion element and the vertical CCD transfer electrode is high. This makes it difficult for the solid-state imaging device to cause an afterimage phenomenon, and can prevent image quality from deteriorating.

In the impurity concentration distribution of the n-layer forming the photoelectric conversion element by ion implantation, the maximum value of the concentration can be formed inside the substrate. Therefore, the total amount of effective donors accumulated in the photoelectric conversion element increases. Therefore, it is possible to obtain a solid-state imaging device including a photoelectric conversion element having high saturation characteristics.

Further, a p-layer for preventing dark current is formed on the n-layer of the photoelectric conversion element. A maximum value of the concentration of the n-layer serving as a photoelectric conversion element is formed inside the substrate by ion implantation. Therefore, the net value of the impurity concentration of the p-layer on the substrate surface can be made higher than the concentration of the p-layer of the conventional solid-state imaging device. Therefore, a solid-state imaging device having a photoelectric conversion element having low dark current characteristics can be obtained.

In the method of manufacturing a solid-state imaging device according to the present invention, the impurity concentration of the photoelectric conversion element is highest at the deep portion of the substrate. Therefore, it is not necessary to increase the amount of impurities introduced into the photoelectric conversion element, which has been conventionally performed. In order to increase the introduction amount, a considerable time loss is caused. Therefore, the throughput when forming the solid-state imaging device does not decrease. Further, a decrease in yield due to white spots can be prevented.

Further, it is not necessary to diffuse the introduced impurities into the deep part of the substrate by the high-temperature heat treatment to increase the area of the photoelectric conversion element. Therefore, defects in the substrate caused by the high-temperature heat treatment do not occur. Further, the impurity is diffused from the other diffusion layers, and there is no need to control to have a desired impurity concentration. In addition, by performing the high-temperature heat treatment, the photoelectric conversion elements are diffused and spread, and are not diffused into the vertical CCD transfer channel or the gap between the transfer channel and the photoelectric conversion element.

Although the description here has been made of the example of the n-type photoelectric conversion element, the p-type photoelectric conversion element has the same effect.

[0115]

According to the present invention, impurities are ion-implanted into a substrate using an electrode material and a resist on the electrode material as a mask to form a photoelectric conversion element. Also, a solid-state imaging device having stable characteristics can be manufactured without introducing impurities under the electrode material.

[Brief description of the drawings]

FIG. 1 is a sectional view for explaining a solid-state imaging device according to a first embodiment of the present invention;

FIG. 2 is a diagram for explaining an impurity concentration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 3 is a diagram for explaining a net impurity concentration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 4 is a diagram for explaining a net impurity concentration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 5 is a diagram for explaining an impurity concentration of a solid-state imaging device according to a second embodiment of the present invention;

FIG. 6 is a diagram for explaining a net impurity concentration of the solid-state imaging device according to the second embodiment of the present invention;

FIG. 7 is a sectional view for explaining the solid-state imaging device according to the first embodiment of the present invention;

FIG. 8 is a potential distribution diagram for explaining a blooming phenomenon according to the first embodiment of the present invention.

FIG. 9 is a potential distribution diagram for explaining the operation of the electronic shutter according to the first embodiment of the present invention.

FIG. 10 is a diagram for explaining a substrate potential according to the first embodiment of the present invention;

FIG. 11 is a diagram for explaining a maximum accumulated charge amount according to the first embodiment of the present invention;

FIG. 12 is a sectional view for explaining a solid-state imaging device according to a second embodiment of the present invention;

FIG. 13 is another sectional view for explaining the solid-state imaging device according to the third embodiment of the present invention;

FIG. 14 is a diagram for explaining the impurity concentration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 15 is a diagram for explaining the net impurity concentration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 16 is a diagram illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention.

FIG. 17 is a diagram illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention.

FIG. 18 is a diagram illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention.

FIG. 19 is a diagram illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention.

FIG. 20 is a diagram illustrating an embodiment of a method of manufacturing a solid-state imaging device according to another invention.

FIG. 21 is a diagram illustrating an embodiment of a method of manufacturing a solid-state imaging device according to another invention.

FIG. 22 is a diagram illustrating an embodiment of a method of manufacturing a solid-state imaging device according to another invention.

FIG. 23 is a diagram illustrating an embodiment of a method of manufacturing a solid-state imaging device according to another invention.

FIG. 24 is a plan view illustrating a conventional solid-state imaging device.

FIG. 25 is a cross-sectional view illustrating a conventional solid-state imaging device.

FIG. 26 is a diagram for explaining the impurity concentration of a conventional solid-state imaging device.

FIG. 27 is a diagram for explaining the net impurity concentration of the conventional solid-state imaging device.

[Explanation of symbols]

 Reference Signs List 5 substrate 6 p layer 7 n layer 8 p layer 9 n layer 12 insulating film

Continued on the front page (72) Inventor Katsuya Ishikawa 1006 Kazuma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. (72) Inventor Sumio Terakawa 1006 Odaka Kazuma Kadoma, Osaka Pref. 4M118 AA02 AB01 BA13 CA03 CA18 CA19 FA06 FA13 FA33 FA47

Claims (5)

[Claims] A step of forming an electrode material on a semiconductor substrate; a step of processing the electrode material; and ion-implanting impurities into the substrate using the electrode material and a resist on the electrode material as a mask. Forming a conversion element, wherein the concentration maximum of the impurity in the depth direction of the substrate is located inside the substrate. A step of forming an electrode material on the semiconductor substrate; a step of forming a resist pattern on the electrode material; a step of removing the electrode material using the resist pattern as a mask; Forming a photoelectric conversion element by ion-implanting an impurity into the substrate using an electrode material as a mask, wherein the concentration maximum of the impurity in the substrate depth direction is inside the substrate. A method for manufacturing a solid-state imaging device. 3. A step of diffusing an impurity of a conductivity type opposite to that of the impurity at a position on the substrate surface of the photoelectric conversion element, wherein the concentration maximum of the impurity in the substrate depth direction is opposite to the impurity concentration. 3. The method for manufacturing a solid-state imaging device according to claim 1, wherein the diffusion depth is larger than a diffusion depth of the conductivity type impurity. 4. The method according to claim 1, wherein the impurity is ion-implanted into the substrate at an acceleration voltage of 200 keV or more. 5. A step of forming an electrode material on a semiconductor substrate, a step of forming a first resist pattern on the electrode material, and a step of removing the electrode material using the first resist pattern as a mask. Forming a photoelectric conversion element by ion-implanting an impurity into the substrate using the first resist pattern and the electrode material as a mask;
Removing the resist pattern; forming a second resist pattern on the electrode material;
Removing the electrode material using the resist pattern as a mask to form an electrode.