JP2001516897A - Apparatus for controlling a plurality of display devices, a system having this device and an associated method - Google Patents

Abstract

(57) Abstract: The present invention relates to a system having a VGA adapter and a programmable window function, a plurality of display devices, and a processor device (10, 12,) for displaying image data on the display device (20, 22). 14, 16) and a VGA adapter (18) for controlling a display device having a window function according to the present invention. At this time, the processor device reads out image data from the video memory and registers the image data. 32) is controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates to a device for controlling a plurality of display devices, for example, a VGA adapter, a system that can use the device, and a method for controlling a plurality of display devices.

[0002] A display device or monitor is generally operated and controlled by a monitor interface in a computer system. For a PC computer system,
For example, a monitor interface that operates according to the VGA standard can be used, and this monitor interface can be a specific screen control unit, for example,
It is constituted by a VGA controller or a VGA adapter. that time,
The operating system of the PC generally has a corresponding driver program for controlling the VGA adapter, and the application program installed on each PC is used to display graphics or text as required. Access the driver program and display the corresponding image on the display device under the control of the VGA adapter.

There are applications where multiple display devices or display devices need to operate on a single computer. In general, if multiple persons observe the data detection or processing process, or if different persons are only shown in each case a part of the entire predetermined information of a full image, a plurality of persons are observed. A display device is required. A typical application of the plurality of display devices is, for example, a register (automatic cash register) or a service business terminal or a POS terminal, which are configured together with at least an operator and a customer display. . The operator sees, for example, one full image on the first monitor, while the customer sees only the partial or full image window on another display device at the customer. Moreover, the computer system can have another animated screen for the reproduction of advertisements or general information, or a number display for the display of the next customer's reservation number, this information being manipulated. One window of a full image instructed by the user. If each display device of the computer system is controlled via a unique interface, eg, a unique VGA adapter, then depending on the number of individual screen control units, a relatively large space for accommodating these control units Need. Furthermore, the use of a plurality of screen control units implies a correspondingly high cost. The management or control of a plurality of independent screen control units creates time-critical problems or undesirably high loads on the processor. In addition, many operating systems allow for multiple VGs.
A adapter cannot be connected.

It is an object of the present invention to provide a control device for a plurality of display devices, a system having the control device, and an associated method for enabling the operation of a plurality of display devices with a window function.

[0005] According to the invention, this object is solved by an apparatus according to claim 1, a system according to claim 9, and a method according to claim 10. According to the apparatus for controlling a plurality of display devices of the present invention at the same time, for example, a VGA adapter,
The control device converts the image data into a display signal and sends the display signal to a plurality of display devices. By this sending, a full image (Vollbild) or a window of the full image or a part of the entire virtual image plane to be displayed is displayed on the display device. Formed on
At that time, the device for controlling the plurality of display devices has a video memory, a converter circuit, and a register device, the video memory stores full-image image data, and the converter circuit Forming a display signal for controlling a display device from image data continuously read from the video memory, the display signal having a color value or a standard value; The device is connected to the converter circuit and stores window data characterizing each window of the full image to be displayed on one of the display devices, wherein the converter circuit depends on the window data of the register device. A display signal having the corresponding color values for the image data assigned to the full image window to be displayed each time, the converter circuit then A display signal having a standard value, the to be displayed is formed for all the image data of the other that is not assigned to the window of the full image.

A corresponding advantage of the device according to the invention is that the use of a register device allows a programmable window function for the display of any window part of the full image, wherein a programmable window function is provided. , The full image is stored in the video memory in the form of digital image data with pixel assignments, on one display device of each display device simply assigning the window data to the register device or by programming This allows for a programmable window function. That is, a higher-level control device, for example, a CPU or a processor device of a PC, only has to load the register device with the window data assigned to the window in order to display the full image window on the corresponding display device. Good. The window of the frame to be displayed depends on the window data that characterizes or defines the window to be displayed, which is loaded in the register device, so that different windows are individually displayed depending on the application. They can be displayed simultaneously on the device. In this case, the window refers to each part of the full image, and the window may correspond to the full image.

[0007] The programmable window function of the device according to the invention also allows for greater flexibility and a wider area of use. That is, individual windows displayed on different display devices can be defined by loading the corresponding window data into the register device of any application program.

The device of the present invention can be configured for controlling n multiple display devices of the same or different types. As a display device, for example, a cathode ray tube type (CR
T displays) monitors, LCD displays, plasma displays, and similar displays can be used.

The converter circuit of the device of the present invention may have n display signal generators for directly controlling the n display devices, each of the n display signal generators comprising: ,
It is configured for the type of display device that it controls directly. For example, CRT
If it is necessary to control the monitor, the converter circuit of the device according to the invention must
One RAMDAC is provided as a display signal forming device. On the other hand, for example, C
If it is necessary to control the RT monitor and the LCD display, the converter circuit of the device according to the invention comprises a corresponding RAMDAC for controlling the CRT monitor and a circuit for controlling the LCD display as a display signal generator. And Different converter circuits with corresponding display signal generators are described, for example, in U.S. Pat. No. 5,491,496.

According to the invention, in order to control a plurality of display devices simultaneously, there is essentially only one additional register device and a converter configured according to the number and type of display devices to be controlled. Circuit, these devices can be configured as, for example, an integrated circuit, so that the device of the present invention or the VGA adapter of the present invention saves space and is accommodated on a printed wiring board or a controller board. be able to.

[0011] The register device advantageously has n register digits, which are stored on a word-by-word or digit-by-word basis, for example by a host processor unit, a host or a CPU of a personal computer. , Digital window data can be written, so that the window can be programmed with only a few program steps.

The device of the present invention or the VGA adapter of the present invention is used in the system of the present invention,
The system includes a plurality of display devices and processor devices, for example, a bus system,
It has a personal computer having a CPU, a mass storage memory, a work memory, and the like. The processor device forms the image data, which is stored in the video memory of the device of the present invention and which can read the image data continuously from the video memory and display it. The processor device of the system of the present invention further has a function of loading window data into the register device of the device of the present invention, whereby the window of the full image set by the application program is stored in the register device. It can be displayed on one display of each display of the system of the invention.

The method of the present invention for simultaneously displaying a plurality of image data on a plurality of display devices includes the following steps: (1) forming and storing image data of a full image; Form and store window data indicating the characteristics of each window of the full image to be displayed on one display device, and then successively read out the stored image data to obtain one color value or one color value each. Converting the display signal into a display signal having one standard value, wherein the display signal is formed with a color value dependent on window data for image data assigned to a window to be displayed with a full image; The signal is formed with standard values for all other image data not assigned to the window to display the full image.

[0014] Advantageous embodiments of the invention are described in dependent claims 2 to 7. Further advantages, advantageous embodiments and application possibilities of the invention can be seen from the following description of illustrated embodiments of the invention. FIG. 1 is a schematic block diagram of an embodiment of the system of the present invention, and FIG. 2 is a block diagram of a display signal forming apparatus that can be used in the embodiment of FIG. 1 of the system of the present invention.

FIG. 1 shows a schematic block diagram of an embodiment of the system of the present invention. The system is configured as a processor device on the base of a personal computer. The work memory is configured as a RAM, and includes a large-capacity storage memory 14, for example, a hard disk, a VGA adapter 18 and a BUS 16 as an apparatus of the present invention. Thus, the devices 10, 12, 14, and 18 can communicate with each other. C
The PU 10 has, for example, a microprocessor clocked at 100 MHz. In the mass storage memory 14, the operating system, the driver programs and the application programs are supplied. The BUS 16 has a data line, a data line, an address line, and a control line (as usual in a personal computer). Further, the personal computer has, for example, a BIOS, an input / output interface, and another unit, and also has a normal structure. This unit is generally known and therefore is not shown in FIG. 1 for simplicity.

The VGA adapter 18 has an input side connected to the BUS 16 and an output side
Are connected to the first display device 20 and the second display device 22.
The second display device 22 has the same structure as a CRT monitor. V
The GA adapter includes a first display signal AS1 for controlling the first display device 20 and a second display signal AS1 for controlling the first display device 20.
, A second display signal AS2 for controlling the display device 22 is generated. The display signals AS1 and AS2 have RGB signals, respectively, which have the usual specifications for controlling a CRT monitor. The VGA adapter 18 further forms a vertical synchronizing signal VSYNCH and a horizontal synchronizing signal HSYNCH, and the vertical synchronizing signal VSYNCH and the horizontal synchronizing signal HS
The YNCH controls the vertical to horizontal deflection of the prior art.

The image screens of the display devices 20 and 22 each have a size of 640 × 640.
Pixels or pixels to bike cells (corresponding to 640 rows × 640 columns) are 2
It can be displayed in 56 colors.

The VGA adapter 18 essentially comprises a video memory 38 (configured as a RAM), a video memory control unit 40 (which directly controls the reading and writing processes of the video memory 38), an address for the video memory 38. Control unit 32
(Controlled by the register device 32), the timing circuit 30 (forming the vertical synchronizing signal VSYCH and the horizontal synchronizing signal HSYNCH), and the BUS interface 34 (via this interface, the VGA adapter 18 is connected to the BUS 16 of the personal computer). Have). The exact configuration of a prior art VGA adapter is described, for example, in US Pat. No. 5,491,496, to which reference is made.

The video memory 38 is connected to the video memory control unit 40, the converter circuit 24, and the address control unit 36. When the CPU 10 writes to the video memory 38 via the BUS interface 34, that is, when image data is stored in the video memory 38, the BUS interface 34 sends a memory write signal MEMW to the video memory control unit 40 and The SA is sent to the address control unit 36, and the address control unit 36 converts the address signal SA into an address for the video memory 38. When the memory write signal MEMW is supplied to the video memory control unit 40, the video memory control unit 40
Opens the video memory 38 under the supplied address for writing the image data of the data signal DS. When image data is read from the video memory 38, the BUS interface 34 sends a memory read signal MEMR to the video memory control unit 40 under the control of the CPU 10, and the video memory control unit 40 subsequently opens the video memory 38. , The image data is read under the address supplied to the converter circuit 24. The video memory 38 is 640 ×
It is configured to store 640 pixels or pixels, that is, full-image image data (which can be displayed on the screens of the first display device 20 and the second display device 22).

In the present embodiment shown in FIG. 1, the image data stored in the video memory 38 is divided into 256 possible colors (256 pixels) for each of the assigned 640 × 640 pixels or pixels. (Which can be displayed on the display devices 20 to 22). Image data of 640 × 640 pixels is C
The PU is read into the video memory 38 under a high number of rows and columns of addresses by a corresponding number of write cycles. When reading a full image from the video memory 38, the full image data is also continuously transferred from the video memory 38 during row and column rastering under a high count of addresses in a corresponding 640 × 640 read cycle. Is read. The read image data is then converted by the converter circuit 24 into display signals AS1 and AS2, and again by the display devices 20, 22 when corresponding row and column rastering is performed, the vertical synchronization signals VSYNCH and VSYNCH of the timing circuit 30. It is displayed in synchronization with the horizontal synchronization signal HSYNCH.

The register device 32 has a 16-digit register that is not displayed. When a register write signal IOW is supplied to the register device 32, the register device 32
The CPU can write special data (called window data). The contents of the register device 32, that is, the contents of the 16-digit register, are extracted from the output side of the register device 32 when the register read signal IOR is supplied to the input side of the register device 32. As shown in FIG. 1, the register device 32 has three signals: a window signal WF1, an activation signal RE, and a window signal W.
Output F2.

The converter circuit 24 includes a first RAMDAC 26 and a second RAMDAC 28,
It has a display signal forming circuit having the same configuration. Prior art RAMDAC
The exact construction of is described in US Pat. No. 5,574,478, to which reference is made. The first RAMDAC 26 has an input side connected to the video memory 38 and the register device 32, and outputs the image data in the data signal DS, the window signal WF1, and the operation start signal RE which are continuously read from the video memory 38. Obtained from the register device 32.

FIG. 2 shows a configuration of the RAMDAC 28 of FIG. RAMDAC28
Is a memory 42 configured as a RAM, and an AND gate 44 (
The input side is connected to the output side of the memory 42 and the window signal WF2 is supplied), and the triple DAC 46 (the input side is connected to the output side of the AND gate 44, and the output side is a display signal AS2 as an RGB signal. To form). Data signal DS having image data supplied to the input side of memory 42
Is, for example, 8 bits wide and consists of 256 possible color values, each corresponding to one color value (supplying individual image data to the video memory 38). When the operation start signal RE (read enable) is supplied to the memory 42, the memory 42 reads out the 18-bit width color value signal by the supplied data signal DS, and this color value signal is simultaneously read from the register device 32. When the window signal WF2 is actively supplied at a high level by the AND gate 44, it is supplied to the input side of the DAC 46 via the AND gate 44. The DAC 46 then forms the RGB signals as display signals AS2 from the 18-bit wide color value signal via a corresponding digital / analog conversion. On the other hand, when the window signal WF2 is not supplied to the input side of the AND gate 44 of the RAMDAC 28, that is, when "0" is supplied,
The color value signal is not conductively connected from the memory 42 to the DAC 46, and a zero-value data signal is read from the output side of the AND gate 44. This signal is converted into a standard value, for example, black, a dark detection value or a border signal. Correspondingly, it is converted by the DAC 46 into a corresponding analog display signal AS2 having a standard value.

Hereinafter, the functions of the embodiment of the present invention shown in FIGS. 1 and 2 will be described in order to exemplify and explain the method of the present invention.

The system of the method of the present invention of FIG. 1 has already been initialized and is in a fully operational state, the operation of a personal computer having a driver and an application program stored in the mass storage memory 14. The system uses work memory 1
2, starting from the state that it is stored for execution under the control of the CPU 10 via the BUS 16. Further, when the application program stored in the work memory 12 is executed, the CPU 10 already has a full image of 640 × 6.
One full image is written in the video memory 38 of 40 image data. A full image is displayed on the display device 20 by the application program. The display device 22 displays a window or a partial image or a partial image of a full image by an application program. According to the application program, only the pixels or pixels in rows 100 to 300 and columns 200 to 400 out of the full image of 640 rows × 640 columns are displayed according to the application program. The image data stored in the video memory 38 is generally
Under the control of the CPU 10, the data is read from the first row for each bike cell and continuously read together for each row.

The CPU 10 first checks whether the display device 20 should display a window from a full image or a full image by an application program.
Since the first display device 20 needs to display a full image, the CPU sets “1” in the register device 32 as window data using the window flag assigned to the display device 20 as window data. Then, the window signal WF1 changes to active high, that is, "1". Since the full image needs to be displayed on the first display device 20, the window flag is set to "1" in the register device 32 for the entire reading of the full image.

The CPU 10 then checks whether the second display device 32 needs to display a full image. According to the application program, only the windows in the rows 100 to 200 and columns 200 to 400 of the full image need to be displayed, so that the CPU 10 sets the window flag assigned to the second display device 22 via the BUS interface 34. Window data is set to "0" in the register device, and thereby the window signal WF2 similarly shifts to "0". Finally, the CPU 10 sets the activation signal RE via the register device 32, whereby the functions of the RAMDACs 26 and 28 are activated simultaneously.

Then, under the control of the CPU 10, the image data of the rows 1 to 99 are read periodically and continuously from the video memory 38, and at the same time, the RAMD of the converter circuit 24 is read.
AC 26 and 28. Since the window signal WF1 is set to "1", the RAMDAC 26 forms the display signal AS1 of the corresponding color value, and the rows 1 to 99 of the full image are displayed on the display device 20. Since the window signal WF2 of “0” is supplied to the RAMDAC 28, the RAMDAC 28
For ~ 99, the standard value, ie, black value to blanking (Austast-)
Alternatively, a display signal AS2 of a blank value is formed, so that the rows 1 to 99 are not displayed on the display device 22. Therefore, the information of rows 1 to 99 of the full image is
2 is not displayed to the customer watching.

After a complete read of row 99, CPU 10 first checks when the window starts in row 100. The window starts for the first time in column 200, so the CPU
10 reads the image data of the row 100 up to the column 199 without changing the register device 32. At this time, the display device 20 displays the display signal of the color value up to the column 199, and the second display device 32 displays the display signal A of the standard value up to the column 199.
S2 is output.

Subsequently, the CPU 10 stops reading image data from the video memory 38 and sets a window flag for the display device 22 to “1” in the register device 32. As a result, the window signal WF2 further shifts to "1". CP
U10 is followed by row 1 from column 200 to column 400 of RAMDACs 26 and 28.
00 is read out at the same time. Since the window signal WF2 is "1", the RAMDAC 28 forms the display signal AS2 having a color value.

After reading and displaying the pixels in the row 100 of the columns 200 to 400, the CPU 10 stops reading the image data from the image memory via the reset of the memory read signal MEMR, and Is reset to "0" again in the register device 32, and by doing so, the window signal WF2 is similarly reset to "0". That is, row 100 and columns 401-
The 640 pixel is no longer inside the window set by the application program. Subsequently, the CPU 10 continues reading the image data at line 100 until the line is completely read. The RAMDAC 28 generates the standard value display signal AS2 again. That is, the window signal WF2 is set to “0”.

For rows 101 to 200 (including 200), CPU 10 subsequently executes a read step for reading image data from video memory 38 in analog form, The steps of setting and resetting the window flag for the display device 22 are continued in the same manner as in the case of the row 100, and the rows 101 to 200 are repeated.
Is read out from the video memory 38.

The CPU 10 reaches the line 201 completely outside the window set by the application program, that is, is not displayed on the display device 22. Since the window flag for the display device 22 has already been set to "0" in the register device 32 and the window signal WF2 is also "0", the CPU 10
Reads the image data of the rows 201 to 640 continuously and completely without changing the window data in the register device 32, that is, the window flag. Since the window signal WF2 is "0", the RAMDAC 28 outputs the standard value display signal AS2.
Is formed, so that the image information of the full image rows 201 to 640 is not displayed on the display device 22.

According to the example described above, the application program displays the full image on the display device 20 by the system of the present invention, and displays on the display device 22 the rows 100 to 200 and the columns 200 to 400 defined by the application program. Only the windows in between are displayed. The operator looking at the first display device 20 can access the information of the full image. For example, the customer can access only the information of the window on the display device 22.

In the second example, the row 1 is displayed on the first display device 20 in response to a request from the execution program.
Only the windows of .about.50 and columns 100 to 300 are displayed, and the windows of the full image of rows 100 to 200 and columns 1 to 640 are displayed on the second display device 22. The CPU 10 then performs a similar read step for image data from the video memory 38 and a similar set and reset step of the window flag in the register device 32 so that the corresponding window is displayed on the display devices 20 and 22. Is done. In particular, the CPU sets the window flag for the first display device 20 in the window for the first display device 20, that is, in rows 1 to 50 and columns 10
It is set to "1" for all the pixels in the field of 0 to 300, and the window flag is set to "0" for all other image data or pixels of the full image.
Therefore, only the windows defined by the application program are actually displayed on the display device 20. Similarly, the CPU 10
In order to display a window on the display device 22, the associated window flag is set to "1" in the fields of the rows 100 to 200 and the columns 1 to 640 in the register device 32.
, And the associated window flag is set to “0” in the register device 32 for the pixels in the complete rows 1 to 99 and columns 201 to 640, and a predetermined window is set on the second display device 22. Can be displayed.

In the foregoing example, the system of the present invention controls multiple displays simultaneously, thereby displaying an arbitrary predetermined window of a full image on an individual display device, depending on the respective application program. And thereby implement a programmable window function.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram of an embodiment of the system of the present invention.

FIG. 2 is a block diagram of a display signal forming device that can be used in the embodiment of FIG. 1 of the system of the present invention.

[Explanation of symbols]

 Reference Signs List 10 CPU 12 Work memory 14 Large-capacity storage memory 16 BUS 18 VGA adapter 20, 22 Display device 24 Converter circuit 26, 28 RAMDAC 30 Timing circuit 32 Register device 34 Bus interface 36 Address control unit 38 Video memory 40 Video memory control unit 42 Memory 44 AND gate 46 DAC DS data signal MEMW memory write signal MEMR memory read signal SA address signal IOR register read signal IOW register write signal VSYNC vertical sync signal HSYNC horizontal sync signal AS1, AS2 display signal RE start signal WF1, WF2 window signal

[Procedure amendment]

[Submission date] March 17, 2000 (2000.3.17)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 1

[Correction method] Change

[Correction contents]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claim 10

[Correction method] Change

[Correction contents]

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0003

[Correction method] Change

[Correction contents]

There are applications where multiple display devices or display devices need to operate on a single computer. In general, if multiple persons observe the data detection or processing process, or if different persons are only shown in each case a part of the entire predetermined information of a full image, a plurality of persons are observed. A display device is required. A typical application of the plurality of display devices is, for example, a register (automatic cash register) or a service business terminal or a POS terminal, which are configured together with at least an operator and a customer display. . The operator sees, for example, one full image on the first monitor, while the customer sees only the partial or full image window on another display device at the customer. Moreover, the computer system can have another animated screen for the reproduction of advertisements or general information, or a number display for the display of the next customer's reservation number, this information being manipulated. One window of a full image instructed by the user. If each video unit of the computer system is controlled via a unique interface, for example, a unique VGA adapter, then depending on the number of individual screen control units, a relatively large space for accommodating these control units Need. Furthermore, the use of a plurality of screen control units implies a correspondingly high cost. The management or control of a plurality of independent screen control units creates time-critical problems or undesirably high processor loads. In addition, many operating systems allow for multiple VGA
Adapter cannot be connected. According to U.S. Pat. No. 5,488,385, an arrangement has already been proposed having a specific VGA adapter for simultaneously controlling two display units capable of forming a full image independent of each other display. I have. The device configuration includes a video memory for storing image data for two full images for each interleaved word, and a converter circuit, and the converter circuit is connected to the video memory. The image data continuously read from the video memory is used to form display signals for operating the display device. There is no image portion to be shown. U.S. Pat. No. 5,500,654 discloses a VGA controller that allows a 640.times.480 video window to be converted to a large display surface, e.g., a 1024.times.768 pixel window. Can be displayed at any point on the visual display unit. Image data for a video window is stored in a video memory. The start address of the first pixel and the size of the window are assigned to the video window.

──────────────────────────────────────────────────の Continuation of the front page (71) Applicant Heinz-Nixdorf1, D-33106 Paderborn, BR Deutschland (72) Inventor Dominique Widtmeier Berlin Menzell Strasse 2 F-term (reference) 5B069 AA01 BB16 BC02 CA13 KA02 5C082 AA34 BB15 CA62 CB01 DA87 MM05

Claims (10)

[Claims] 1. A device for simultaneously controlling a plurality of display devices (20, 22), for example, a VGA adapter (18), wherein the control device converts image data into display signals (AS1, AS2). And transmitting the full image or a window of the full image or a part of the entire virtual image plane to be displayed on the display device (20, 22). A device for forming and controlling the plurality of display devices, comprising: a video memory (38), a converter circuit (24), and a register device (32); (38) stores the image data of the full image; the converter circuit (24) is connected to the video memory (38); Display signals (AS1, AS2) for controlling the display device (20, 22) are formed from image data continuously read from the display device, and the display signals (AS1, AS2) have color values or standard values. The register device (32) is connected to the converter circuit (24) and characterizes each window of the full image to be displayed on one of the display devices (20, 22); In this case, the converter circuit (24) should display the display signals (AS1, AS2) having a color value depending on the window data of the register device (32) each time. , For the image data assigned to the window of the full image, wherein the converter circuit (24) comprises the display signal (AS1) having the standard value.
, AS2) for all other image data to be displayed that are not assigned to the window of the full image. 2. The apparatus according to claim 1, wherein the display signal is an RGB signal. 3. The register device (32) has a register having a plurality of register sets, and each of the register sets has n display devices (20, 20).
Device according to claim 1 or 2, assigned to one of 22). 4. The converter circuit (24) has n display signal forming devices, each said display signal forming device for one of the n display devices (20, 22). 4. The device according to claim 1, wherein the display signals (AS1, AS2) are generated. 5. The converter circuit (24) includes a plurality of RAMDACs (26, 28).
The RAMDACs (26, 28) each correspond to one display signal forming device, and the output side of the display signal forming device has a display device (
20, 22), and the display device (20, 22) connected thereto.
5. The device according to claim 4, wherein the display signals for AS1 and AS2 are generated in each case. 6. A register device (32) having a register of n register digits, wherein each digit of said n register digits is one of the display signal forming devices of said display signal forming devices. 6. The device according to claim 1, which is connected to an output side. 7. The same or different display modes (C) in the converter circuit (24).
RT, LDC, plasma) operable display device, whereby the RAMDAC assigned to one of the display devices is configured according to the display scheme of the RAMDAC. 7. The device according to any one of 1 to 6. 8. The apparatus according to claim 1, wherein the apparatus is housed on a printed wiring board.
The apparatus according to any one of the above. 9. A system having a programmable window function, the system comprising:-a plurality of display devices (20, 22);-image data for display on said plurality of display devices (20, 22). And a device according to one of the claims 1 to 8, for example a VGA adapter (18), wherein the processor device Read image data from the video memory (38),
Controlling a set of register devices (32). 10. A method for simultaneously displaying a plurality of image data on a plurality of display devices (20, 22), comprising the steps of: (1) forming and storing full-image image data; Forming and storing window data indicating the characteristics of each window of said full image to be displayed on one of the plurality of display devices (20, 22); and subsequently storing the stored image data Are successively read and converted into display signals (AS1, AS2) each having one color value or one standard value. * At this time, the display signals (AS1, AS2) are displayed as the full image. A color value dependent on the window data for the image data assigned to the window to be powered; * the display signals (AS1, AS2) , System and forming with said standard value for all other image data to which the not assigned to the window to be displayed in the full image.