JP2001332735A - Semiconductor device and pattern forming method - Google Patents

Abstract

[PROBLEMS] To provide a semiconductor device and a pattern forming method which reduce the manufacturing cost and improve the step coverage. An ITO film and a MoCr film are formed, and the ITO film and the MoCr film are dry-etched.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a source electrode, a drain electrode, and a source bus, and
The present invention relates to a pattern forming method for forming a pattern of a source electrode, a drain electrode, and a source bus.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display device such as a notebook personal computer using a liquid crystal has been provided with a TFT (Thin Film Tran).
gistor) is being actively used. This TFT
Is formed by stacking various types of films such as a metal film having various patterns and an insulating film on a substrate. When pattern-forming each of these films, a material for each film is deposited on a substrate, and the deposited material is patterned into a shape corresponding to each film by using a lithography method. Therefore, as the number of films that need to be patterned increases, a patterning step using a lithography method must be performed every time each film is formed, which causes a problem that the manufacturing cost increases.

To solve such a problem, instead of etching a single-layer film, a laminated film is formed by laminating two types of films, and the laminated film is continuously etched to form a laminated film. It is conceivable that one kind of film is patterned in one patterning step.

[0004]

In the method of etching a laminated film, since the etching is more excessive than in the case of etching a single layer film, the step formed in the film by the etching becomes deep. Therefore, when another film is laminated so as to cover the step of the laminated film, there is a problem that the step coverage of the another film is deteriorated at the step of the laminated film, and the film quality characteristics are deteriorated. On the other hand, if the laminated films are etched separately instead of continuously, there is a problem that the manufacturing cost is increased as described above.

The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor device and a pattern forming method which reduce manufacturing costs and improve step coverage.

[0006]

According to the present invention, there is provided a pattern forming method for forming a first metal film on a substrate, and laminating a second metal film on the first metal film. Forming a pattern of a source electrode, a drain electrode and a source bus by patterning the second and first metal films. The step of forming an electrode and a pattern of a source bus includes a step of forming a resist film on the second metal film and a step of drying the second and first metal films after the step of forming the resist film is completed. And a first etching step of etching.

According to the pattern forming method of the present invention, after forming a resist film on the second metal film, not only the second metal film but also the first metal film formed under the second metal film is formed. The film is also etched. Therefore, when etching the second and first metal films, it is necessary to form a dedicated resist film for patterning the first metal film and a dedicated resist film for patterning the second metal film. However, the manufacturing cost can be reduced.

Further, in the pattern forming method of the present invention, since the second and first metal films are dry-etched, steps are formed in the second and first metal films by etching. However, even if another film is formed so as to cover the step, the step coverage of the another film can be improved in the portion of the step. The manner in which the step coverage is improved will be described later in detail.

Here, in the pattern forming method of the present invention, the first metal film is an ITO film containing ITO as a main component, and the second metal film is a molybdenum chromium film containing molybdenum chromium as a main component. Preferably, the first etching step is a step of dry-etching the molybdenum chromium film and the ITO film with a mixed gas containing chlorine and oxygen.

By dry-etching the molybdenum chromium film and the ITO film with a mixed gas containing chlorine and oxygen, the ends of the molybdenum chromium film and the ITO film can be etched into a tapered shape.

Further, in the pattern forming method according to the present invention, the second etching is performed by wet-etching the second metal film instead of the first etching step, and thereafter, dry-etching the first metal film. A step may be provided.

[0012] Even if a second etching step is provided instead of the first etching step, the manufacturing cost can be reduced.
Even if a second etching step is provided in place of the first etching step, the second and first metal films still have
Although a step is formed by etching, the step coverage at the step can be improved similarly to the case where the first etching step is performed. How the step coverage is improved will be described later in detail.

Here, in the pattern forming method of the present invention, it is preferable that the first metal film has a thickness of 500 ° or less.

By setting the film thickness to 500 ° or less, the step coverage can be easily improved.

Here, in the pattern forming method according to the present invention, the first metal film is an ITO film containing ITO as a main component, and the second metal film is a molybdenum chromium film containing molybdenum chromium as a main component. In the second etching step, the molybdenum chromium film is wet-etched using a mixed solution containing phosphoric acid, nitric acid, and water, and then the ITO film is formed using a gas containing chlorine as a main component. Preferably, the step is dry etching.

The molybdenum chromium film and the IT
By etching the O film, the ends of the molybdenum chromium film and the ITO film can be etched substantially perpendicularly or tapered to the substrate.

Further, in the pattern forming method according to the present invention, the second and first metal films are wet-etched instead of the first etching step, and then the second metal film is wet-etched again. A third etching step may be provided.

Even if a third etching step is provided instead of the first etching step, the manufacturing cost can be reduced.
Further, even if a third etching step is provided instead of the first etching step, the second and first metal films still have
Although a step is formed by etching, the step coverage at this step can be improved similarly to the case where the first or second etching step is performed.

Here, in the pattern forming method of the present invention, it is preferable that the first metal film has a thickness of 500 Å or less.

By setting the film thickness to 500 ° or less, the step coverage can be easily improved.

Here, the first metal film is an ITO film containing ITO as a main component, the second metal film is a molybdenum chromium film containing molybdenum chromium as a main component, and the third etching step is performed. However, the molybdenum chromium film is wet-etched using a mixed solution containing phosphoric acid, nitric acid, and water, the ITO film is wet-etched using hydrochloric acid, and then the molybdenum chromium film is phosphoric acid, nitric acid, and It is preferable that the wet etching process be performed again using a mixed solution containing water.

The molybdenum chromium film and the IT
By etching the O film, the ends of the molybdenum chromium film and the ITO film can be etched almost perpendicularly to the substrate.

Further, the semiconductor device of the present invention comprises a source electrode formed on a substrate, a source bus laminated on the source electrode, a first electrode formed on the substrate, and a first electrode formed on the substrate. A drain electrode having a second electrode laminated on the semiconductor device, wherein an end of the source electrode protrudes toward the drain electrode with respect to an end of the source bus, and Has an end protruding toward the source electrode with respect to the second electrode.

By employing the pattern forming method of the present invention, the end of the source electrode is projected toward the drain electrode with respect to the end of the source bus, and the end of the first electrode of the drain electrode is formed. Can be projected toward the source electrode with respect to the end of the second electrode. By making the end of the source electrode and the end of the first electrode protrude to the respective sides of the drain electrode and the source electrode, for example, a-Si connected to both the source electrode and the drain electrode When a film is formed, an a-Si film can be formed so that good ohmic contact can be obtained with each of the source electrode and the drain electrode.

Here, in the semiconductor device of the present invention, even if the respective ends of the source electrode, the source bus, the first electrode, and the second electrode are formed perpendicular to the substrate. It may be formed obliquely with respect to the substrate.

In the pattern forming method of the present invention, the first
By adopting the first etching step among the third to third etching steps, the ends of the source electrode, the source bus, the first electrode, and the second electrode are inclined with respect to the substrate. It can be formed in a tapered shape, while adopting the second and third etching steps allows the respective ends of the source electrode, the source bus, the first electrode, and the second electrode to be positioned with respect to the substrate. And can be formed vertically.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to TFTs provided inside a liquid crystal panel of a liquid crystal display device.
Is explained.

FIG. 1 shows a first example of the pattern forming method of the present invention.
1 is a cross-sectional view illustrating a TFT 1 according to a first embodiment of a semiconductor device of the present invention, manufactured using the embodiment.

FIG. 1 shows a TFT 1 formed on a glass substrate 2. Actually, a large number of TFTs 1 are formed on the glass substrate 2, but here, only one TFT 1 is shown as a representative.

Hereinafter, the TFT 1 will be described with reference to FIG. 1 and FIGS. 2 to 14 which schematically show a method of manufacturing the TFT 1.

In manufacturing the TFT 1, first, a pattern of the light shielding film 3 is formed on a glass substrate 2 as shown in FIG. The light shielding film 3 is formed by depositing MoCr (molybdenum chrome), which is a material of the light shielding film 3, and patterning the deposited MoCr by a lithography method.

After forming the light shielding film 3, as shown in FIG.
SiO so as to cover the light shielding film 3 ₂The layer 4 is formed.
Thereafter, as shown in FIG.₂Layer 4 with ITO
The film 50 is laminated. By the way, referring to FIG.
Each of the source electrode 5 and the pixel electrode 9 is a single-layer film.
The in-electrode 8 is a stack of the upper electrode 7 and the lower electrode 6
It turns out that it is a film. This ITO film 50 will be described later.
Form source electrode 5 and pixel electrode 9 by etching
And the upper electrode 7 and the lower electrode of the drain electrode 8
This is a film for forming the lower electrode 6 of the poles 6. This
Here, the thickness of the ITO film 50 is about 400 °.

After the formation of the ITO film 50, the ITO film 50
Without patterning, as shown in FIG.
Then, the MoCr film 100 is laminated. This MoCr film 10
Reference numeral 0 denotes a film for forming the source bus 10 (see FIG. 1) and forming the upper electrode 7 of the drain electrode 8 by etching described later. ITO film 50 and Mo
After the formation of the Cr film 100, the MoCr film 100 and the IT
The O film 50 is continuously etched.

FIGS. 6 to 9 show the MoCr film 100 and the IT
FIG. 4 is a diagram illustrating a state in which an O film is etched.

First, as shown in FIG.
Next, resist films 101 and 102 are formed. After the formation of the resist films 101 and 102, the MoCr film 100 and the ITO film 50 are continuously dry-etched by a RIE (reactive ion etching) method using a mixed gas of Cl ₂ / O ₂ .

FIG. 7 shows the MoCr film 100 and the ITO film 5.
0 just before dry etching, FIG. 8 shows the MoC
The MoCr film 100 of the r film 100 and the ITO film 50
FIG. 9 shows a state in which dry etching has progressed up to FIG.
FIG. 4 is a diagram showing a state where dry etching of the MoCr film 100 and the ITO film 50 has been completed.

As shown in FIG. _7, Cl 2 / mixed gas of _{O 2 (Cl 2} / _{O 2} mixing ratio 4: 6 to 6: about 4) is introduced, as shown in FIG. 8, first, The MoCr film 100 is etched. By the etching of the MoCr film 100, a pattern of the source bus 10 is formed immediately below the left resist film 101, while the right resist film 1 is formed.
Immediately below 02, a pattern of the metal layer 70 that partially constitutes the upper electrode 7 of the drain electrode 8 is formed. The material of the metal layer 70 is the same MoCr as the source bus 10. By etching the MoCr film 100 with a mixed gas of Cl ₂ / O ₂ , the ends 10 a and 10 b of the source bus 10, the end 7 a of the upper electrode 7 and the metal layer 70 are formed.
Can easily be formed in a tapered shape obliquely inclined with respect to the substrate 2. After the etching of the MoCr film 100 is completed, the mixture ratio of Cl ₂ / O ₂ is set to 1: 1 to 1:
After changing the thickness to about 0.5, the ITO film 50 is dry-etched. Thereby, as shown in FIG. 9, a pattern of the source electrode 5 is formed directly below the source bus 10, and
On the other hand, a pattern of the pixel electrode 9 and the lower electrode 6 constituting the lower layer of the drain electrode 8 are formed directly below the metal layer 70. By etching the ITO film 50 in this manner, the drain electrode 8 including the upper electrode 7 and the lower electrode 6 is formed. By etching the ITO film 50 with a mixed gas of Cl ₂ / O ₂ , the ends 5 a and 5 b of the source electrode 5, the end 6 a of the lower electrode 6, and the end 9 a of the pixel electrode 9 are easily tapered. Can be etched. Here, the end 5a of the source electrode 5
Project from the end 10a of the source bus 10 toward the lower electrode 6 by a distance D2.
The ITO film 50 is etched so as to project from the end 7a of the upper electrode 7 toward the source electrode 5 by the distance D3. Here, the end 5a of the source electrode 5 and the lower electrode 6
Is about 5 μm between the end 6a and the distance D.
2 and D3 are both about 1.0 μm.

Here, the MoCr film 100 and the IT
Although the RIE method was used to etch the O film 50, the MoCr film 1 was formed by using an etching method other than the RIE method, for example, a high-density PE (plasma etching) method.
00 and the ITO film 50 may be etched.

Thus, the MoCr films 100 and I
After etching the TO film 50, the resist films 101 and 102 are removed. Thereafter, a-Si is deposited, and the deposited a-Si is patterned by using a lithography method, thereby forming an a-Si film 1 as shown in FIG.
One island pattern is formed.

After the formation of the a-Si film 11, a gate insulating film 12 having a contact hole 12a is formed as shown in FIG. The gate insulating film 12 is formed by depositing SiNx, which is a material of the gate insulating film 12, and etching the deposited SiNx so that a part of the metal layer 70 is exposed. The contact hole 12a is a hole formed for establishing electrical connection with another TFT. After the formation of the gate insulating film 12, aluminum as a material of the gate electrode 13 (see FIG. 1) is deposited to form an Al film 130 as shown in FIG.
Next, a resist film 131 for patterning the Al film 130 is formed. After the formation of the resist film 131, the Al film 130 is wet-etched. Here, a mixed solution of phosphoric acid / nitric acid / water is used as an etching solution.

FIG. 13 is a view immediately after the etching of the Al film 130 is completed.

The gate electrode 13 is formed immediately below the resist film 131 by etching the Al film 130. At the same time, the aluminum filling the contact hole 12a is also etched, exposing the metal layer 70.
At this time, even if the metal layer 70 is exposed, the wet etching is not terminated and the wet etching is continuously performed. Since the mixed solution of phosphoric acid / nitric acid / water has an action of etching not only Al but also MoCr, the metal layer 70 using Mo-Cr as a material is formed of a mixed solution of phosphoric acid / nitric acid / water. Etched.

FIG. 14 is a view showing a state where the metal layer 70 is etched.

The pixel electrode 9 is exposed by etching the metal layer 70. At this time, the gate insulating film 12 itself having the contact hole 12a serves as a resist film, and the upper electrode 7 of the drain electrode 8 remains without being etched as shown in FIG. MoCr, which is a material of the metal layer 70, is a material that does not easily transmit light. As described above, by etching the metal layer 70 to expose the pixel electrode 9, the region where the pixel electrode 9 is formed is formed. Light can be transmitted freely.

When the pixel electrode 9 is exposed, the wet etching is terminated, and then the resist film 131 is peeled off, whereby the TFT 1 shown in FIG. 1 is manufactured.

In the present embodiment, when forming the source electrode 5, the drain electrode 8, the pixel electrode 9, and the source bus 10, an ITO film 50 is formed, and then the ITO film 50 is formed.
Without etching the MoCr film 100 on the ITO film 50.
Then, the MoCr film 100 and the ITO film 50 are continuously etched using the common resist films 101 and 102 as described with reference to FIGS. At this time, in the steps shown in FIGS. 6 to 9, the portion corresponding to the contact hole 12 a of the metal layer 70 is not yet etched (see FIG. 14), but the etching of this portion is performed with reference to FIG. As described above, since the gate insulating film 12 itself having the contact hole 12a serves as a resist film, a dedicated resist for etching a portion of the metal layer 70 corresponding to the contact hole 12a is used. It is not necessary to form a film. Therefore, the MoCr film 100
And when etching the ITO film 50, the MoCr film 1
00 and a special resist film for etching the ITO film 5
It is not necessary to form a dedicated resist film for etching 0, the resist film 101 formed on the MoCr film 100.
And 102, and the gate insulating film 12 having the contact hole 12a, the MoCr film 1
The metal films of both the 00 film and the ITO film 50 can be etched into a desired pattern. That is, the MoCr film 10
A resist film that must be formed exclusively for patterning two types of metal films, ie, a metal film 0 and an ITO film 50,
Resist films 101 and 1 formed on MoCr film 100
02 only, thereby reducing manufacturing costs.

As described with reference to FIG. 9, the end 5a of the source electrode 5 and the end 6a of the lower electrode 6 are formed.
a is formed in a tapered shape. Therefore, as shown in FIG. 10, the a-Si film 11
a and the end 6a of the lower electrode 6 are formed so as to obtain good step coverage. For this reason,
A good ohmic contact is obtained between the a-Si film 11 and each of the source electrode 5 and the lower electrode 6 (drain electrode 8).

Hereinafter, the manner in which the manufacturing cost is reduced by using the method of manufacturing the TFT 1 described with reference to FIGS. 1 to 14 will be described in comparison with a conventional method of manufacturing a TFT.

FIG. 15 is a sectional view showing a TFT 110 manufactured by using a conventional manufacturing method.

In the TFT 110, the light shielding film 3, the SiO ₂ film 4, the source electrode 5, the drain electrode 8, the pixel electrode 9, the source bus 10, and the a-Si film 1 are formed on the glass substrate 2.
1, a gate insulating film 12 and a gate electrode 13 are formed. In order to form these electrodes and films on the glass substrate 2, a patterning process using a lithography method must be performed six times. Specifically, the source electrode 5, the drain electrode 8,
Once when forming the pixel electrode 9, once when forming the source bus 10, once when forming the a-Si film 11, once when forming the contact hole 12 a of the gate insulating film 12, and when forming the gate electrode 13. Sometimes once.

On the other hand, in the TFT 1 shown in FIG. 1, the patterning process using the lithography method may be performed only five times. Specifically, when forming the light shielding film 3, 1
1 (see FIG. 2) and once during the formation of the source electrode 5, the drain electrode 8, the pixel electrode 9, and the source bus 10 (see FIGS. 6 to 9; however, in the steps shown in FIGS. 6 to 9, ,
The portion of the metal layer 70 corresponding to the contact hole 12a is left without being etched yet), and the gate insulating film 12 is formed once (see FIG. 10) when the a-Si film 11 is formed.
Once when forming the contact hole 12a (see FIG. 11) and once when forming the gate electrode 13 (see FIGS. 12 to 14. By performing the steps shown in FIGS. 12 to 14, the gate electrode 13 is formed. At the same time as the patterning, the portion of the metal layer 70 corresponding to the contact hole 12a is etched). Therefore, the TFT shown in FIG.
In the case of No. 1, the number of patterning steps can be reduced by one compared with the TFT 110 shown in FIG.

FIG. 16 is a cross-sectional view showing a TFT 100 according to a second embodiment of the semiconductor device of the present invention manufactured by using the pattern forming method of the second embodiment of the present invention.

Hereinafter, this TFT 100 will be described with reference to FIG.
The description will be given with reference to FIGS. In the manufacturing process of the TFT 100 shown in FIG. 16, the same process as the manufacturing process of the TFT 1 shown in FIG. 1 will be briefly described, and the process different from the manufacturing process of the TFT 1 shown in FIG.

In manufacturing the TFT 100, first, the method described with reference to FIGS.
The light shielding film 3, the SiO ₂ layer 4, the ITO film 50, and the MoCr film 100 are formed on the glass substrate 2. Then, FIG.
As shown in FIG. 3, resist films 101 and 102 are formed on the MoCr film 100, and the MoCr film 100 and the ITO film 50 are formed.
Are sequentially etched. Here, the MoCr film 100 is wet-etched, and then the ITO film 50 is dry-etched.

FIG. 17 is a diagram showing a state where the MoCr film 100 is wet-etched.

Here, the MoCr film 100 is wet-etched using a mixed solution of phosphoric acid / nitric acid / water as an etching solution. As a result, a pattern of the source bus 10 is formed immediately below the left resist film 101, while a part of the metal layer 70 that constitutes the upper electrode 7 of the drain electrode 8 is formed directly below the right resist film 102. A pattern is formed. The material of the metal layer 70 is the same MoCr as the source bus 10. Here, the side etching is advanced, and the end 101a of the resist film 101 and the source bus 1 are formed.
0 and the distance D4 between the end 10a of the resist film 10 and the resist film 10
The distance D5 between the second end 102a and the end 7a of the upper electrode 7 is about 1 μm. The ends 10a and 10b of the source bus 10, the end 7a of the upper electrode 7, and the metal layer 70
Is formed substantially perpendicular to the substrate 2.
Although the MoCr film 100 is etched with a mixed solution of phosphoric acid / nitric acid / water, the ITO film 50 formed immediately below the MoCr film 100 is hardly etched by the mixed solution of phosphoric acid / nitric acid / water. As shown in
The O film 50 remains almost as it is. After etching the MoCr film 100, the ITO film 50 is dry-etched.

FIG. 18 is a diagram showing a state where the ITO film 50 is dry-etched.

The ITO film 50 is dry-etched using a high-density PE method. Cl ₂ is used as an etching gas. By dry-etching the ITO film 50,
The pattern of the source electrode 5 is formed immediately below the source bus 10, while the pattern forming the lower electrode 6 of the drain electrode 8 and the pixel electrode 9 is formed immediately below the metal layer 70. The ends 5 a and 5 b of the source electrode 5, the end 6 a of the lower electrode 6 and the end 9 a of the pixel electrode 9 are formed substantially perpendicular to the substrate 2. Note that, unlike the MoCr film 100, the ITO film 50 is not subjected to side etching, and the end 5a of the source electrode 5 substantially coincides with the end 101a of the resist film 101.
Etching is performed so that “a” substantially matches the end 102 a of the resist film 102. Here, the distance D7 between the end 5a of the source electrode 5 and the end 6a of the lower electrode 6 is:
It is about 5 μm.

After forming the source bus 10, the source electrode 5, the drain electrode 8, and the pixel electrode 9 in this way, the resist films 101 and 102 are peeled off. afterwards,
As shown in FIG. 19, an island pattern of the a-Si film 11 is formed. By the way, the end 5a of the source electrode 5
Is the source bus 1 formed directly above the source electrode 5.
0, and the end 6a of the lower electrode 6 of the drain electrode 8 is spaced apart from the end 7a of the upper electrode 7 formed immediately above the lower electrode 6 by a distance D5. And the source electrode 5 and the lower electrode 6 are formed to have a thin film thickness of about 400 °. As described above, the end 5 a of the source electrode 5 and the end 6 a of the lower electrode 6 are respectively connected to the end 1 of the source bus 10.
0 a and the end 7 a of the upper electrode 7, and the thickness of the source electrode 5 and the lower electrode 6 is set to about 4
By setting the angle to about 00 °, even if the end 5a of the source electrode 5 and the end 6a of the lower electrode 6 are not formed in a tapered shape, the end 5a of the source electrode 5 and the end 6a of the lower electrode 6 have The step coverage of the a-Si film 11 can be improved. Therefore, the a-Si film 11 and
Good ohmic contact can be obtained between each of the source electrode 5 and the lower electrode 6. Here, the thickness of the source electrode 5 and the lower electrode 6 is about 400 °,
Even if the film thickness is about 400 ° or more, it is possible to improve the step coverage. However, when these film thicknesses are too thick, the step coverage deteriorates. In general, if the film thickness is about 500 ° or less, good step coverage can be easily achieved.

After the formation of the a-Si film 11, the gate insulating film 12 having the contact hole 12a and the gate electrode 13 are formed by the same method as described with reference to FIGS. When forming the gate electrode 13, the Al film 130 is etched until the pixel electrode 9 is exposed.

As described above, the TFT 1 shown in FIG.
00 is manufactured.

In forming the source electrode 5, the drain electrode 8, the pixel electrode 9, and the source bus 10, the TFT 100 forms an ITO film 50, and then forms the ITO film 50.
Without etching the film 50, a MoCr film 100 is laminated on the ITO film 50.
As described with reference to FIGS. 17 and 18, the TO film 50 is etched using the common resist films 101 and 102. At this time, in the steps shown in FIGS. 17 and 18, the portion of the metal layer 70 corresponding to the contact hole 12a is not yet etched, but the etching of this portion is performed as described with reference to FIG. Insulating film 12 having contact hole 12a
This is performed by itself serving as a resist film, and it is not necessary to form a dedicated resist film for etching a portion of the metal layer 70 corresponding to the contact hole 12a. Therefore, the ITO film 50 and the MoCr
The resist films that must be formed exclusively for patterning the two types of metal films of the film 100 are the resist films 101 and 102 formed on the MoCr film 100, similarly to the TFT 1 shown in FIG. Manufacturing costs can be reduced.

In the second embodiment, the ends 10 a and 10 b of the source bus 10, the end 7 a of the upper electrode 7, and the end 70 a of the metal layer 70 are formed substantially perpendicular to the substrate 2. The ends 5 a and 5 b of the electrode 5, the end 6 a of the lower electrode 6 and the end 9 a of the pixel electrode 9 are connected to the substrate 2.
However, these ends can be formed in a tapered shape by adjusting the etching conditions.

Next, the third embodiment of the semiconductor device of the present invention manufactured by using the third embodiment of the pattern forming method of the present invention.
The TFT of the embodiment will be described. The TFT according to the third embodiment is a TFT 100 according to the second embodiment shown in FIG.
It has the same structure as that of the above. Therefore, the structure of the TFT according to the third embodiment will be described with reference to FIG. Further, the description of the manufacturing process of the TFT according to the third embodiment will be made with reference to FIGS. 20 and 21 and FIGS.

In manufacturing the TFT 100 of the third embodiment, first, the light shielding film 3, the SiO ₂ layer 4, the ITO film 50 are formed on the glass substrate 2 by the method described with reference to FIGS. And a MoCr film 100 are formed.
Thereafter, as shown in FIG. 6, resist films 101 and 102 are formed on the MoCr film 100, and the MoCr film 100 and the ITO film 50 are etched. This etching will be described with reference to FIG. 17, FIG. 20, and FIG.

First, as shown in FIG.
By wet-etching 00, a metal layer 70 partly constituting the upper electrode 7 of the drain electrode 8 and the source bus 10 are formed. Here, the resist film 101
The distance D4 between the end 101a of the source film 10 and the end 10a of the source bus 10 and the distance D5 between the end 102a of the resist film 102 and the end 7a of the upper electrode 7 are about 0.5 μm, The distance D6 between the end 10a of the source bus 10 and the end 7a of the upper electrode 7 is about 5 μm. MoC
After the wet etching of the r film 100,
The O film 50 is wet-etched.

FIG. 20 is a diagram showing a state where the ITO film 50 is wet-etched.

The ITO film 50 is wet-etched using HCl (hydrochloric acid) as an etchant. At this time,
The ends 5a and 5b of the source electrode 5 correspond to the ends 10a and 10b of the source bus 10, and the end 6a of the lower electrode 6 and the end 9a of the pixel electrode 9 correspond to the end 7a of the upper electrode 7. Then, etching is performed so as to coincide with the end 70a of the metal layer 70.

Thus, the MoCr films 100 and I
After etching the TO film 50, the ends 10a and 10b of the source bus 10, the end 7a of the upper electrode 7, and the metal layer 7 are formed.
Wet etching is again performed on the 0 end 70a.

FIG. 21 is a sectional view showing a state in which the ends 10a and 10b of the source bus 10, the end 7a of the upper electrode 7, and the end 70a of the metal layer 70 are again wet-etched.

Here, a mixed solution of phosphoric acid / nitric acid / water is used as an etching solution, and the distance D7 between the end 10a of the source bus 10 and the end 5a of the source electrode 5 and the upper electrode 7
Side etching so that the distance D8 between the end 7a of the lower electrode 6 and the end 6a of the lower electrode 6 is about 1.0 μm.

Thus, the MoCr films 100 and I
The TO film 50 is patterned. Thereafter, as shown in FIG. 19, an island pattern of the a-Si film 11 is formed. The end 5 a of the source electrode 5 is connected to the end 10 of the source bus 10 formed immediately above the source electrode 5.
protrudes by a distance D4 (= D7) from a.
The end 6a of the lower electrode 6 is longer than the end 7a of the upper electrode 7 formed directly above the lower electrode 6 by a distance D5 (= D8).
And the source electrode 5 and the lower electrode 6 are formed to have a thin film thickness of about 400 °. Therefore, similarly to the case of the TFT of the second embodiment, the end 5a of the source electrode 5 and the end 5a of the lower electrode 6 can be formed without forming the end 5a of the source electrode 5 and the end 6a of the lower electrode 6 in a tapered shape. At the end 6a, the step coverage of the a-Si film 11 can be improved. Therefore, a-Si
A good ohmic contact is obtained between the film 11 and each of the source electrode 5 and the lower electrode 6. Here, the thickness of the source electrode 5 and the lower electrode 6 is about 400 °.
However, it is possible to improve the step coverage even when the film thickness is about 400 ° or more. However, when these film thicknesses are too thick, the step coverage deteriorates. In general, if the film thickness is about 500 ° or less, good step coverage can be easily achieved.

After the a-Si film 11 is formed, the gate insulating film 12 having the contact hole 12a and the gate electrode 13 are formed by employing the same method as described with reference to FIGS. To form Gate electrode 1
3 is formed until the lower electrode 6 is exposed.
The film 130 is etched.

As described above, the TFT of the third embodiment
100 are manufactured.

In the TFT 100 of the third embodiment, when forming the source electrode 5, the drain electrode 8, the pixel electrode 9, and the source bus 10, after forming the ITO film 50, the ITO film 50 is not etched. , ITO film 5
0, a MoCr film 100 is laminated, and then the MoCr film 100 is
As described with reference to FIGS. 17, 20, and 21, the film 100 and the ITO film 50 are etched using the common resist films 101 and 102. At this time, in the steps shown in FIGS. 17, 20, and 21, the portion of the metal layer 70 corresponding to the contact hole 12a is not yet etched, but the etching of this portion is performed with reference to FIG. As described above, the gate insulating film 12 having the contact hole 12a itself serves as a resist film, and is formed by the metal layer 70.
It is not necessary to form a dedicated resist film for etching a portion corresponding to the contact hole 12a. Therefore, similarly to the TFTs of the first and second embodiments, the manufacturing cost can be reduced.

In the embodiment described with reference to FIGS. 1 to 21, the laminated film of the MoCr film 100 and the ITO film 50 is etched to besides the source electrode 5, the drain electrode 8, and the source bus 10. Although the pixel electrode 9 is formed, the present invention can also be used for manufacturing a semiconductor device that does not require a pixel electrode, such as a semiconductor device such as a transistor incorporated in a circuit device such as an IC. .

In the embodiment described with reference to FIGS. 1 to 21, the MoCr film 1 is formed on the ITO film 50 in order to form the source electrode, the drain electrode, and the source bus.
00 is deposited, but in the present invention, the ITO film 5 is formed according to the type of the semiconductor device to be manufactured.
A metal laminated film using a metal film other than the 0 and MoCr films 100 may be formed.

In the embodiment described with reference to FIGS. 1 to 21, the resist films 101 and 102 are directly formed on the surface of the metal laminated film in order to etch the metal laminated film of the MoCr film 100 and the ITO film 50. However, depending on the type of semiconductor device to be manufactured, one or more films other than the resist film may be formed on the metal laminated film after forming the metal laminated film and before forming the resist film. The layers may be laminated, and then a resist film may be formed on the surface of another film laminated on the metal laminated film. As described above, even if another film other than the resist film is formed on the metal laminated film, the metal laminated film including the other film can be etched by forming the resist film on the surface of the other film. Becomes possible.

The embodiment described with reference to FIGS. 1 to 21 shows an example in which a TFT is manufactured by using the first to third embodiments of the pattern forming method of the present invention. It is also possible to manufacture a semiconductor device other than a TFT by using the pattern forming method described above.

Further, the pattern forming method and the semiconductor device of the present invention are not limited to the above embodiments, but can be changed according to the manufacturing conditions and applications of the semiconductor device.

[0081]

As described above, according to the present invention,
A semiconductor device and a pattern forming method which achieve reduction in manufacturing cost and improvement in step coverage can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a TFT1, which is a first embodiment of a semiconductor device of the present invention, manufactured using a first embodiment of a pattern forming method of the present invention.

FIG. 2 is a cross-sectional view showing a state in which a light shielding film 3 is formed on a glass substrate 2.

FIG. 3 is a cross-sectional view showing a state where an SiO ₂ layer 4 is formed.

FIG. 4 is a cross-sectional view showing a state in which an ITO film 50 is formed.

FIG. 5 is a cross-sectional view showing a state where the MoCr film 100 is formed.

FIG. 6 shows resist films 101 and 10 on MoCr film 100.
FIG. 4 is a cross-sectional view showing a state in which No. 2 is formed.

FIG. 7 is a diagram immediately before the MoCr film 100 and the ITO film 50 are dry-etched.

FIG. 8 shows the M of the MoCr film 100 and the ITO film 50;
FIG. 4 is a diagram showing a state where dry etching has progressed to an oCr film 100;

FIG. 9 is a diagram showing a state where dry etching of the MoCr film 100 and the ITO film 50 has been completed.

FIG. 10 is a cross-sectional view showing a state where an island pattern of the a-Si film 11 is formed.

FIG. 11 is a cross-sectional view showing a state where a gate insulating film 12 having a contact hole 12a is formed.

FIG. 12 is a cross-sectional view showing a state in which an Al film 130 and a resist film 131 are formed.

FIG. 13 is a diagram showing a state immediately after the etching of the Al film has been completed.

FIG. 14 is a diagram showing a state where a portion of the pixel electrode 9 corresponding to a contact hole 12a is exposed.

FIG. 15 shows a TFT 1 manufactured using a conventional manufacturing method.
FIG.

FIG. 16 is a cross-sectional view illustrating a TFT 100 according to a second embodiment of the semiconductor device of the present invention, which is manufactured using the second embodiment of the pattern forming method of the present invention.

FIG. 17 is a diagram showing a state where the MoCr film 100 is wet-etched.

FIG. 18 is a view showing a state where an ITO film 50 is dry-etched.

FIG. 19 is a cross-sectional view showing a state where an island pattern of the a-Si film 11 is formed.

FIG. 20 is a diagram showing a state where an ITO film 50 is wet-etched.

FIG. 21 is a cross-sectional view showing a state where ends 10a and 10b of the source bus 10 and ends 70a and 70b of the upper electrode 70 are wet-etched.

[Explanation of symbols]

1 TFT 2 glass substrate 3 light shielding film 4 SiO ₂ film 5 source electrode 5a, 5b, 6a, 9a, 10a, 10
b, 70a, 70b, 101a, 102a End 8 Drain electrode 9 Pixel electrode 10 Source bus 11 a-Si film 12 Gate insulating film 12a Contact hole 13 Gate electrode 50 ITO film 100 MoCr film 101, 102, 131 Resist film 130 Al film

 ──────────────────────────────────────────────────続 き Continuation of the front page (71) Applicant 590000248 Groenewoodseweg 1, 5621 BA Eindhoven, The Netherlands F term (reference) 5F004 AA11 BA04 DA00 DA04 DA26 DB08 DB31 EB02 5F043 AA27 BB18DD AFF27 BB18DD15F12 EE03 FF03 FF27 GG02 GG15 HK06 HK07 HK21 HM02 HM03 NN46 QQ01

Claims (10)

[Claims] A step of forming a first metal film on a substrate; a step of laminating a second metal film on the first metal film; and patterning the second and first metal films. Forming a source electrode, a drain electrode, and a source bus pattern, wherein the step of forming the source electrode, the drain electrode, and the source bus pattern comprises the second step. A pattern comprising a step of forming a resist film on the metal film, and a first etching step of dry-etching the second and first metal films after the step of forming the resist film is completed. Forming method. 2. The method according to claim 1, wherein the first metal film is an ITO film containing ITO as a main component, the second metal film is a molybdenum chrome film containing molybdenum chromium as a main component, 2. The pattern forming method according to claim 1, further comprising a step of dry-etching the molybdenum chromium film and the ITO film with a mixed gas containing chlorine and oxygen. 3. The method according to claim 1, further comprising a second etching step of wet-etching the second metal film and then dry-etching the first metal film, instead of the first etching step. The pattern forming method according to claim 1. 4. The method according to claim 1, wherein the first metal film is an ITO film containing ITO as a main component, the second metal film is a molybdenum chromium film containing molybdenum chromium as a main component, Wet etching the molybdenum chromium film using a mixed solution containing phosphoric acid, nitric acid, and water, and then dry-etching the ITO film using a gas containing chlorine as a main component. 4. The pattern forming method according to claim 3, wherein: 5. A method according to claim 1, further comprising a third etching step of wet-etching said second and first metal films and then wet-etching said second metal film again in place of said first etching step. 2. The method according to claim 1, wherein
4. The pattern forming method according to 1. 6. The first metal film is an ITO film containing ITO as a main component, the second metal film is a molybdenum chromium film containing molybdenum chromium as a main component, and the third etching step is The molybdenum chromium film is wet-etched using a mixed solution containing phosphoric acid, nitric acid, and water, and the ITO film is wet-etched using hydrochloric acid. Thereafter, the molybdenum chromium film is subjected to phosphoric acid, nitric acid, and water. 6. The step of wet-etching again using a mixed solution containing
4. The pattern forming method according to 1. 7. The pattern forming method according to claim 3, wherein the first metal film has a thickness of 500 ° or less. 8. A source electrode formed on the substrate, a source bus stacked on the source electrode, and a second electrode formed on the substrate and stacked on the first electrode and the first electrode. A drain electrode having an electrode, wherein an end of the source electrode projects toward the drain electrode with respect to an end of the source bus, and a first electrode of the drain electrode has A semiconductor device, wherein an end protrudes toward the source electrode with respect to the second electrode. 9. The substrate according to claim 8, wherein the end of each of the source electrode, the source bus, the first electrode, and the second electrode is formed perpendicular to the substrate. 13. The semiconductor device according to claim 1. 10. An end of each of the source electrode, the source bus, the first electrode, and the second electrode,
The semiconductor device according to claim 8, wherein the semiconductor device is formed obliquely with respect to the substrate.