JP2001321542A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate noise to provide a game machine which can normally operate. SOLUTION: Added to capacitors C1, C2, a capacitor C3 is connected in between the VDD terminal and the VBB terminal of an MPU 11. Accordingly, even when noise is applied to the MPU 11, the difference between voltages inputted to the VDD terminal and the VBB terminal is inhibited within a prescribed value, i.e., noise applied to the MPU 11 is eliminated or suppressed, to enable data in a RAM 12 to be normally backed up. The noise eliminating effect can be further improved by connecting the capacitors C1-C3 near to the MPU 11 as far as possible and using ones with good frequency characteristics as the capacitors C1-C3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine such as a pachinko machine and a slot machine, and more particularly to a game machine that can operate normally without adverse effects due to noise.

[0002]

2. Description of the Related Art A gaming machine typified by a pachinko machine or the like mainly includes a main control board for controlling a game, a payout control board for operating based on various commands transmitted from the main control board, and a display board. It is composed of a control board, a sound effect control board, a lamp control board, and various devices such as a display device, a payout device, and a game ball launching device connected to these. When a game ball hit into the game area by the launch device wins a winning opening, the winning signal is detected by the main control board, and the payout number is instructed from the main control board to the payout control board. The payout device is controlled by the payout control board according to this instruction, and the payout of the prize balls is performed.

If a power failure occurs before the payout of prize balls is completed, even if the power failure is resolved, it is not possible to pay out prize balls for winning before the power failure. For this reason, it is conceivable to back up the power supply of the entire gaming machine and supply a driving voltage to the gaming machine even in the event of a power failure so that the gaming machine can operate continuously. As it goes down, simply backing up the power of the gaming machine cannot be used.

[0004]

Therefore, for example, data relating to the number of remaining payouts of award balls and loan balls is stored in a nonvolatile memory such as a static RAM which can hold data by supplying a backup voltage. A pachinko machine has been proposed in which a slight backup voltage is supplied to the RAM during a power failure to retain such data. However, in a pachinko machine having such a configuration, especially when a large noise is added,
If the noise is added when writing to the RAM, the wrong data is written to the RAM. Conversely, if a large noise is added when reading the data from the RAM, the wrong data is read from the RAM. As a result, there is a problem that the gaming machine malfunctions.

[0005] The present invention has been made to solve the above-described problems, and has as its object to provide a gaming machine that can operate normally without adverse effects of noise.

[0006]

In order to achieve this object, a gaming machine according to claim 1 operates by receiving power supply means for supplying a drive voltage and a backup voltage, and receiving a drive voltage from the power supply means. A non-volatile storage unit that retains storage contents by supplying the backup voltage even when the supply of the drive voltage is interrupted, and a noise removal unit that removes or suppresses noise applied to the storage unit. I have.

According to the first aspect of the present invention, the storage means operates in response to the supply of the drive voltage from the power supply means, and when the supply of the drive voltage is cut off, the backup voltage supplied from the power supply means. Holds the stored contents. Various noises are added to the storage means, but such noises are removed or suppressed by the noise removal means, so that the gaming machine can operate normally.

[0008]

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In this embodiment, a pachinko machine, which is a kind of a ball-and-ball game machine, is described as an example of a game machine, in particular, a first-type pachinko game machine.
Note that it is naturally possible to use the present invention for other gaming machines such as a third-type pachinko gaming machine, a coin gaming machine, and a slot machine.

FIG. 1 is a front view of a game board of a pachinko machine P of this embodiment. Around the game board 1, there are provided a plurality of winning ports 2 from which 5 to 15 balls are paid out when a hit ball wins. Also, in the center of the game board 1,
A liquid crystal (LCD) display 3 for displaying a plurality of types of design information as identification information is provided. This LC
The display screen of the D display 3 is divided into three in the horizontal direction, and in each of the three divided display areas, the symbol is displayed while being scrolled from right to left in the horizontal direction.

Below the LCD display 3, a symbol operation port (first type opening port) 4 is provided, and when the hit ball passes through the symbol operation port 4, the above-mentioned variable display of the LCD display 3 is started. You. Below the symbol operating port 4, a specific winning port (large winning port) 5 is provided. When the display result after the change of the LCD display 3 matches one of the predetermined symbol combinations, the specific winning opening 5 becomes a big hit and a predetermined time (for example, 30) so that the hit ball can easily win. Until seconds elapse, or
It is released until 10 hits are won.

The specific winning opening 5 is provided with a V zone 5a. When a hit ball passes through the V zone 5a while the specific winning opening 5 is open, a continuation right is established, and the specific winning opening is established. After the closing of the specific winning opening 5, the specific winning opening 5 is opened again for a predetermined time (or until a predetermined number of hit balls are won in the specific winning opening 5). The opening / closing operation of the specific winning opening 5 can be repeated up to 16 times (16 rounds), and the state in which the opening / closing operation can be performed is a state in which a predetermined game value is given (a special game state). is there.

In addition, a plurality of lamps 7 are provided at the game board 1 and at various places around it. These lamps 7 are turned on or off in accordance with the contents of the game, thereby exciting the interest of the game and displaying the progress of the game to the player.

FIG. 2 is a block diagram schematically showing an electric configuration of the pachinko machine P. As shown in FIG. 2, the pachinko machine P has a power failure monitoring circuit 20 and a plurality of control boards H, D, S, and L connected to a main control board C. The main control board C is for controlling the content of the game, and a signal output from various switches SW connected to the main control board C and a main control board C
A control command is transmitted to each of the control boards H, D, S, and L based on a counter value or the like provided therein to control the game.

An MPU 11 as a one-chip microcomputer is mounted on the main control board C. The MPU 11 includes a CPU as an arithmetic unit and an R that stores a control program.
Various circuits such as an OM, a RAM 12 for storing various data in a rewritable manner when a control program is executed, a timer interrupt circuit, a free running counter, a watchdog timer, and a chip select logic are built in one chip. In addition to these circuits,
A random number generation circuit for generating a random number used for control of the game of the pachinko machine P (control for determining the presence or absence of a big hit) and an identification number (ID number) unique to the MPU 11 and storing the identification number It has an ID output circuit for outputting by a predetermined operation.

The MPU 11 has a backup terminal VBB
(See FIG. 4), and the backup voltage is supplied from the backup terminal VBB even when the power is turned off. Therefore, even if the power is turned off due to a power failure or the like, the data in the RAM 12 of the MPU 11 is retained (backed up). Since the number of remaining prize balls to be paid out is stored in the RAM 12, the remaining number of prize balls to be paid out can be kept stored even during a power outage, and the remaining prize balls can be paid out after the power outage is resolved. Note that the RAM 1 of the present embodiment
Reference numeral 2 indicates that all the data is backed up, and data other than the remaining number of award balls to be paid out is also backed up. However, it is not always necessary to back up all data in the RAM 12, and instead of backing up all data, a configuration may be adopted in which only part of the data in the RAM 12 is backed up.

The payout control board H controls the payout of prize balls and loaned balls based on signals output from various switches SW and control commands transmitted from the main control board C. In addition, a launch control board B for controlling a launch motor 10 for launching a ball to a game area in the game board 1 and a payout motor 9 for paying out award balls and lending balls are connected.

The RAM 13 of the payout control board H has a backup terminal VBB, and a backup voltage is supplied from the backup terminal VBB even when the power is turned off. Therefore, even when the power is turned off due to a power failure or the like, the data in the RAM 13 is retained (backed up). The RAM 13 stores the number of remaining payouts of prize balls and rental balls, so that these can be kept stored even in the event of a power failure, and the remaining prize balls and rental balls can be paid out after the elimination of the power failure. Note that the RAM 13 of this embodiment is
Is similar to the case of the RAM 12 of the MPU 11 described above.
Since all the data is backed up, data other than the number of unpaid balls and loaned balls is also backed up. However, it is not always necessary to back up all data in the RAM 13, and instead of backing up all data, a configuration may be adopted in which only part of the data in the RAM 13 is backed up.

Data backed up to the main control board C and the payout control board H can be erased (cleared) by pressing a clear switch SW1 provided on the back side of the pachinko machine P. The clearing of the backup data is performed only when the clear switch SW1 is operated at a predetermined timing so that the clearing is not performed erroneously. For example, when the power is turned on while the clear switch SW1 is operated, when the power is turned off while the clear switch SW1 is operated, when the clear switch SW1 is operated a plurality of times within a predetermined time, or Two or more clear switches SW1 are provided, and the backup data is cleared when the clear switches SW1 are operated in a predetermined order or simultaneously.

The display control board D is for controlling the variable display of the LCD display 3 based on a control command transmitted from the main control board C. The sound effect control board S is for outputting a sound effect according to the progress of the game from the speaker 6 based on a control command transmitted from the main control board C. The lamp control board L is a main control board. This is for controlling lighting and extinguishing of each lamp 7 based on a control command transmitted from C.

The main control board C and each control board H, D,
A buffer 8 whose input and output are fixed between S and L
Are connected to each other (only one is shown in FIG. 2). Therefore, the main control board C and each control board H, D,
Transmission and reception with S and L are performed from the main control board C to each control board H and
It is performed only in one direction to D, S, L, and each control board H,
The operation cannot be performed from D, S, and L to the main control board C.

The power failure monitoring circuit 20 outputs a power failure signal 21 to the main control board C and the dispensing control board H when the power is turned off or when a power failure occurs, and a predetermined time after the power is turned on or after the power failure signal 21 is output. Reset signal 2 under conditions
2 is a circuit for outputting 2 to each of the control boards C, H, D, S, L, and B. The main control board C and the payout control board H
When the power failure signal 21 output from the power failure monitoring circuit 20 is input, the processing of terminating the control of the game of the pachinko machine P is started in order to appropriately hold the backup data stored in the respective RAMs 12 and 13. As described later, the drive voltage (5 volts) of the control system supplied from the power supply circuit 30 to the main control board C and the payout control board H is maintained for a predetermined time even after a power failure (or after the power is turned off). During the operation, the voltage value is maintained in the normal operation range. Therefore, even if the main control board C and the payout control board H start the processing for terminating the game after the input of the power failure signal 21, the termination processing can be sufficiently completed.

Next, referring to FIG. 3, this pachinko machine P
A description will be given of the supply path of the drive voltage to each of the above. FIG.
5 is a diagram showing a path through which a drive voltage generated by a power supply circuit 30 of the pachinko machine P is supplied to each control board C, H, D, S, L, B, and the like. The power supply circuit 30 receives an AC voltage of 24 volts (24 VAC) from the external power supply 40, and supplies 32 volts (+32 V), 24 volts (+24 V), 12 volts (+12 V), and 5 volts (+5 V). DC voltage and backup voltage
(VBB), and each control board C, H, D, S, L,
B, etc., and has four power supply circuits 31 to 34, from first to fourth.

The first power supply circuit 31 receives a 24 volt AC voltage output from the external power supply 40 and generates a 33 volt DC voltage, and a 33 volt generation circuit 31a. Input a 33 volt DC voltage to generate a 12 volt DC voltage 1
2 volt generation circuit 31b and its 12 volt generation circuit 3
Input 12 volt DC voltage output from 1b
5 volt generating circuit 31c for generating a volt DC voltage
And a backup voltage generation circuit 31d that receives a 5-volt DC voltage output from the 5-volt generation circuit 31c to generate a backup voltage of approximately 5 volts, and the above-described power failure monitoring circuit 20.

The output voltage of the 33 volt generation circuit 31a is
It is also output to the power failure monitoring circuit 20 in addition to the 12 volt generation circuit 31b. When a power failure occurs (including turning off the power, the same applies hereinafter), the power supply from the external power supply 40 is interrupted, and the output voltage of the 33 volt generation circuit 31a decreases from 33 volts. The power failure monitoring circuit 20 determines that a power failure has occurred when the output voltage of the 33 volt generation circuit 31a falls below approximately 22 volts, and outputs a power failure signal 21 to the main control board C and the payout control board H. As described above, when the power outage signal 21 is input, the main control board C and the payout control board H start processing for ending the game control.

Further, the output voltage of the 5-volt generation circuit 31c is also supplied to the power failure monitoring circuit 20. In the power failure monitoring circuit 20, each of the control boards C, H, D, S, L, and L depends on the state of the output voltage of the 33-volt generation circuit 31a and the 5-volt generation circuit 31c when the power failure is eliminated or the power is turned on.
A reset signal 22 is output to B. This reset signal 2
2, the control boards C, H, D, S, L, B
, The control of the game is restarted (or started).

The 12 volt generation circuit 3 of the first power supply circuit 31
The output voltage 1b is used as a drive voltage for the switch of the main control board C, as a drive voltage for the switch of the payout control board H and a drive voltage for driving the payout motor, and further for the touch sensor and the fire switch of the fire control board B. As the drive voltage,
Supplied respectively. The output voltage of the 5-volt generation circuit 31c of the first power supply circuit 31 is used for the logic of the main control board C, the payout control board H, and the firing control board B (control system).
Is supplied as the driving voltage of Further, the output voltage of the backup voltage generation circuit 31d is supplied as a voltage for backing up data of the RAMs 12 and 13 of the main control board C and the payout control board H.

The second power supply circuit 32 receives a 24 volt AC voltage output from an external power supply 40 and generates a 33 volt DC voltage, and a 33 volt generation circuit 32a. Input a 33 volt DC voltage to generate a 32 volt DC voltage 3
2 volt generation circuit 32b. The output voltage of the 32 volt generation circuit 32b is supplied as a drive voltage for the solenoid of the main control board C and as a drive voltage for the handle motor of the firing control board B, respectively.

The third power supply circuit 33 receives a 24 volt AC voltage output from the external power supply 40 and generates a 33 volt DC voltage, and a 33 volt generation circuit 33a. Input a 33 volt DC voltage to generate a 12 volt DC voltage 1
A 2 volt generation circuit 33b and a 5 volt generation circuit 33c which receives a 33 volt DC voltage output from the 33 volt generation circuit 33a and generates a 5 volt DC voltage
And

The output voltage of the 12 volt generation circuit 33b is
It is supplied as a drive voltage for the backlight of the LCD 3 of the display control board D, as a drive voltage for the power amplifier of the sound effect control board S, and as a drive voltage for the LEDs of the lamp control board L, respectively. The output voltage of the 5-volt generation circuit 33c is supplied as a drive voltage for the sub-control board interface of the main control board C, and is also used for the logic of the display control board D, the sound effect control board S and the lamp control board L. Each is supplied as a drive voltage of a (control system).

The fourth power supply circuit 34 receives a 24 volt AC voltage output from the external power supply 40 and generates a 33 volt DC voltage, and a 33 volt generation circuit 34a. Input a 33 volt DC voltage to generate a 24 volt DC voltage 2
4 volt generation circuit 34b. The output voltage of the 24 volt generation circuit 34b is supplied as a driving voltage for the lamp of the lamp control board L.

Next, a description will be given of the operation of supplying a driving voltage to various parts when a power failure occurs in the pachinko machine P of the above-described embodiment. When a power failure occurs, the external power supply 40
Power supply will be cut off, so first
33 volt generation circuit 31a of each of fourth power supply circuits 31 to 34
To 34a decrease. First power supply circuit 34
When the output voltage value of the 33 volt generation circuit 31a falls from 33 volts to approximately 22 volts or less due to this decrease, the power failure signal 21 is transmitted from the power failure monitoring circuit 20 to the main control board C.
And output to the payout control board H.

A 5 volt generating circuit 31c for supplying a logic (control system) drive voltage for the main control board C and the payout control board H generates a 5 volt output voltage based on the output voltage of the 12 volt generating circuit 31b. Therefore, even if the output voltage of the 33 volt generation circuit 31a drops to approximately 22 volts, a normal voltage of 5 volts is output. Therefore, since the control system of the main control board C and the payout control board H can operate normally at this time, when the power failure signal 21 is input, the processing for terminating the control of the game can be started.

Thereafter, as time passes, each of the generating circuits 31a to 31c, 32a to 32b, 33a to 33c, 3
The output voltages of 4a to 34b decrease in order from the one that outputs the largest voltage, and go down (it becomes impossible to output the voltage in the normal operation range).

Here, the drive voltages of the main control board C and the payout control board H which are executing the processing for ending the game control are:
Although the power is supplied from the first power supply circuit 31, the first power supply circuit 31 only supplies a drive voltage to the emission control board B. In particular, the main control board C and the emission control board B Among them, the drive voltage for the solenoid (main control board C) and the handle motor (fire control board B) which consume relatively large power is supplied by the second power supply circuit 32 instead of the first power supply circuit 31. I have. Also,
A display control board D for driving the LCD 3 including a backlight, a sound effect control board S for driving a speaker 6 including a power amplifier, and driving (lighting) of a lamp 7 and an LED.
The driving voltages of the lamp control board L to be driven are the third and fourth driving voltages.
Power is supplied from power supply circuits 33 and 34. Further, the drive voltage for the sub-control board interface of the payout control board H is supplied not by the first power supply circuit 31 but by the third power supply circuit 33.

At a minimum, the output voltage of the 5-volt generating circuit 31c of the first power supply circuit 31 is maintained until the processing of terminating the game control by the main control board C and the payout control board H is completed after the occurrence of the power failure. It must be maintained at a voltage in the normal operating range.

As described above, the first power supply circuit 31
To the fourth power supply circuits 32 to 34, that is, the 33 volt generation circuits 31a to 34a that are the generation sources of the drive voltage are separately configured, and
The supply of the drive voltage to devices having relatively large power consumption such as the CD3 and the motor is performed by the second to fourth power supply circuits 32 to 34. Therefore, even if the capacity of the first power supply circuit 31 is not increased, the 5-volt generation circuit 31 of the first power supply circuit 31 is independent of the operation state of the pachinko machine P when the power failure occurs.
The output voltage c can be maintained at a voltage within the normal operation range from the occurrence of the power failure to the end of the game control termination processing by the main control board C and the payout control board H. Therefore, according to the pachinko machine P of this embodiment, the first power supply circuit 31 can be manufactured at low cost and compactly.

The second to fourth power supply circuits 32 to 34
The drive voltage must be supplied to a device that consumes relatively large power.However, since these supply the drive voltage to parts that have nothing to do with data backup, the output voltage immediately drops after a power failure occurs. No problem. Therefore, the second to fourth power supply circuits 32 to 34 do not need to have a large capacity, and can be manufactured at low cost and compactly.

Next, with reference to FIG. 4 to FIG. 8, the MPU 11 of the main control board C and the payout control board H for backing up data on the number of remaining payouts of award balls or loaned balls.
A description will be given of a noise removal circuit connected to the MPU of the payout control board H (not shown). In the present embodiment, regarding such a noise removing circuit, the M
A description will be given using the PU 11 as an example. Needless to say, such a noise removal circuit is provided by the MPU of the payout control board H.
Is also provided.

FIG. 4 is a diagram showing a noise removing circuit connected to the MPU 11 of the first embodiment. As shown in FIG. 4, in the first embodiment, the VDD terminal of the MPU 11 is connected to the output terminal of the 5-volt generation circuit 31c of the first power supply circuit 31, and is output from the 5-volt generation circuit 31c. An output voltage of 5 volts is input to the MPU 11 as a drive voltage. The VBB terminal of the MPU 11 is connected to the output terminal of the backup voltage generation circuit 31d of the first power supply circuit 31, and the voltage output from the backup voltage generation circuit 31d is stored in the RAM 12 built in the MPU 11.
Is input as a backup voltage for backing up the data. This backup voltage generation circuit 31d
As shown in FIG. 4, an output voltage of 5 volts output from the 5 volt generation circuit 31c is input to the anode of the diode D1, and the output voltage is output from the cathode of the diode D1 to which the capacitor C10 of 0.47F is connected. Is what you do. That is, the backup voltage is supplied after the power is turned off by the electric charge stored in the capacitor C10. The VSS terminal of the MPU 11 is connected to the ground.

The capacitors C1 and C2 of 0.1 μF are connected between the VDD terminal and the VSS terminal and between the VBB terminal and the VSS terminal of the MPU 11, respectively. Further, a 0.1 μF capacitor C3 is connected between the VDD terminal and the VBB terminal of the MPU 11.

The MPU 11 of this embodiment converts the voltages input to the VDD terminal and the VBB terminal to M
When a comparison is made by a comparator (not shown) built in the PU 11 and the difference between the two voltages is equal to or larger than a predetermined value, access to the backup RAM (that is, the RAM 12) is prohibited. For this reason, with the capacitors C1 and C2 alone, the difference between the voltage input to the VDD terminal and the voltage input to the VBB terminal may exceed a predetermined value due to the addition of only a slight noise while the MPU 11 is being driven.
2 will be destroyed.

On the other hand, in the first embodiment, in addition to the capacitors C1 and C2, the VDD terminal of the MPU 11
A capacitor C3 is connected between the BB terminal.
Therefore, even when noise is applied to the MPU 11, the difference between the voltages input to the VDD terminal and the VBB terminal is stopped within a predetermined value (that is, noise applied to the MPU 11 is removed or suppressed), and the data in the RAM 12 is restored to normal. Can be backed up. Note that each of the capacitors C1 to C3 is M
By connecting as close as possible to the PU 11, the noise removal effect can be further improved. Further, by using capacitors having good frequency characteristics for the capacitors C1 to C3, the noise removing effect can be further improved.

A modification of the first embodiment shown in FIG. 4 will be described below with reference to FIGS. The first
The same parts as those of the embodiment are denoted by the same reference numerals, and description thereof will be omitted. The illustration of the 5-volt generation circuit 31c and the backup voltage generation circuit 31d of the first power supply circuit 31 is omitted.

FIG. 5 is a diagram showing a noise removing circuit connected to the MPU 11 of the second embodiment. As shown in FIG. 5, the noise elimination circuit of the second embodiment includes a 5-volt constant voltage diode ZD between the VBB terminal and the VSS terminal of the MPU 1 instead of the capacitor C3 of the first embodiment.
1 are connected. Therefore, even if noise is added to the MPU 11, the operation of the constant voltage diode ZD1
Since the voltage at the VBB terminal does not exceed 5 volts, the difference between the voltages input to the VDD terminal and the VBB terminal can be stopped within a predetermined value, and the data in the RAM 12 can be backed up normally. Each capacitor C
1, C2 and the constant voltage diode ZD1 are connected as close as possible to the MPU 11, and by using capacitors with good frequency characteristics for the capacitors C1, C2, the noise removing effect can be further improved. .

FIG. 6 is a diagram showing a noise removing circuit connected to the MPU 11 of the third embodiment. As shown in FIG. 6, the noise elimination circuit of the third embodiment is configured by combining the noise elimination circuits of the first and second embodiments described above. In this example, a 5-volt constant-voltage diode ZD2 is connected between the VBB terminal and the VSS terminal of the MPU 11 in the example noise elimination circuit. Therefore, even if noise is applied to the MPU 11, the difference between the voltages input to the VDD terminal and the VBB terminal can be stopped within a predetermined value, and the data in the RAM 12 can be normally backed up. Each capacitor C1
To C3 and the constant voltage diode ZD2 can be further improved by connecting them as close as possible to the MPU 11 and by using capacitors C1 to C3 having good frequency characteristics. .

FIG. 7 is a diagram showing a noise removing circuit connected to the MPU 11 of the fourth embodiment. As shown in FIG. 7, the noise elimination circuit of the fourth embodiment is a modification of the noise elimination circuit of the third embodiment.
11 is connected between the VDD terminal and the VSS terminal of the MPU 11 instead of the constant voltage diode ZD2 connected between the VBB terminal and the VSS terminal of the MPU 11.
D3 is connected. Therefore, even if noise is applied to the MPU 11, the voltage value of the VDD terminal is maintained at approximately 5 volts, the difference between the voltages input to the VDD terminal and the VBB terminal is stopped within a predetermined value, and the data in the RAM 12 is normally read. Can be backed up. Each capacitor C1 to C3
By connecting the constant voltage diode ZD3 as close as possible to the MPU 11 and using capacitors C1 to C3 having good frequency characteristics, the noise removing effect can be further improved.

FIG. 8 is a diagram showing a noise elimination circuit connected to the MPU 11 of the fifth embodiment. As shown in FIG. 8, the noise elimination circuit of the fifth embodiment uses the VD
D terminal and VSS terminal, and VBB terminal and VS
The constant voltage diodes ZD4 and ZD5 of 5 volts are connected between the terminal S and the S terminal. Therefore, MPU
11, the difference between the voltages input to the VDD terminal and the VBB terminal is stopped within a predetermined value, and the RAM 1
2 can be normally backed up. By connecting each of the constant voltage diodes ZD4 and ZD5 as close as possible to the MPU 11, the noise removing effect can be further improved.

FIG. 9 is a diagram showing a noise removing circuit connected to the MPU 11 of the sixth embodiment. As shown in FIG. 9, the noise elimination circuit of the sixth embodiment includes a 0.1 μF capacitor between the VDD terminal and the VBB terminal of the MPU 1 in addition to the noise elimination circuit of the fifth embodiment shown in FIG. C4 is connected. Therefore, even if noise is applied to the MPU 11, the difference between the voltages input to the VDD terminal and the VBB terminal can be stopped within a predetermined value, and the data in the RAM 12 can be normally backed up. Each constant voltage diode ZD4, ZD5 and capacitor C4 are MP
By connecting the capacitor as close as possible to U11 and using a capacitor having good frequency characteristics as the capacitor C4, the noise removing effect thereof can be further improved.

As described above, the present invention has been described based on the embodiments. However, the present invention is not limited to the above embodiments, and various improvements and modifications can be made without departing from the gist of the present invention. Can easily be inferred.

For example, in the above embodiment, the noise elimination circuits shown in FIGS. 4 to 9 have been described using the main control board C as an example. Dispensing control board H for backing up data
Has been adopted. Further, the noise removing circuit is not necessarily limited to the one shown in FIGS. 4 to 9. If the voltage difference between the VDD terminal and the VBB terminal of the MPU during driving falls within a predetermined voltage value, Other circuits may be used.

The present invention may be applied to a pachinko machine of a different type from the above embodiment. For example, once a jackpot is hit, a pachinko machine (commonly known as a twice-rights item or a three-times rights item) that increases the jackpot expectation value until a jackpot condition occurs a plurality of times (for example, two or three times) including that. ). Further, the pachinko machine may be implemented as a pachinko machine which enters a special game state on condition that a ball is won in a predetermined area after the big hit symbol is displayed. Furthermore, in addition to the pachinko machine, the present invention may be implemented as various game machines such as areaches, sparrow balls, slot machines, so-called game machines in which a so-called pachinko machine and a slot machine are combined.

In the slot machine, for example, a symbol is changed by operating an operation lever in a state where a symbol is inserted and a symbol valid line is determined, and the symbol is stopped and determined by operating a stop button. Is well known. Therefore, the basic concept of the slot machine is as follows: "variable display means for confirming and displaying the identification information after variably displaying the identification information sequence including a plurality of identification information;
The change of the identification information is started by the operation of the start operation means (for example, the operation lever), and the identification information is changed by the operation of the stop operation means (for example, the stop button) or after a predetermined time elapses. Is stopped, and provided that the fixed identification information at the time of the stop is the specific identification information, a slot machine having special game state generating means for generating a special game state advantageous to the player, In this case, coins and medals are typical examples of the game medium.

Further, as a specific example of a gaming machine in which a pachinko machine and a slot machine are integrated, a variable display means for variably displaying a symbol row composed of a plurality of symbols and then confirming and displaying the symbols is provided. Not equipped with a handle. In this case, a predetermined operation (button operation)
After the predetermined amount of balls is thrown based on, for example, the fluctuation of the symbol starts due to the operation of the operation lever, and the fluctuation of the symbol, for example, due to the operation of the stop button or after a predetermined time elapses, It is stopped, and a jackpot state advantageous to the player is generated on condition that the final symbol at the time of the stop is a so-called jackpot symbol, and a large amount of balls are paid out to the lower saucer to the player. .

Hereinafter, modified examples of the present invention will be described. 2. The gaming machine according to claim 1, wherein the noise removing unit is configured to supply a driving voltage to the storage unit from the power supply unit.
A gaming machine 1 characterized by removing or suppressing noise applied to the storage means by maintaining a small voltage difference between the drive voltage and the backup voltage. When the voltage difference between the drive voltage supplied to the storage means and the backup voltage is equal to or greater than a predetermined voltage value, even in an electronic device that prohibits access to the storage means, adverse effects due to noise are suppressed as much as possible. Data can be backed up normally. The power supply means may be constituted by one or two or more power supply boards (or power supply devices).

[0055] In the gaming machine or the gaming machine 1 according to claim 1, the noise removing means is provided between the drive voltage supply line and the backup voltage supply line by the power supply means and near the storage means. A gaming machine 2 characterized by being used. For example, a capacitor connected between the drive voltage supply line and the backup voltage supply line and close to the storage unit is exemplified as the noise removal unit.

In the gaming machine or the gaming machine 1 or 2, the noise removing means is provided between a backup voltage supply line by the power supply means and a ground line of the storage means. A gaming machine 3 provided in the vicinity. For example, a constant voltage diode connected between the backup voltage supply line and the ground line and close to the storage unit is exemplified as the noise removing unit. In this case, the voltage value of the constant voltage diode is preferably substantially equal to the value of the drive voltage supplied by the power supply.

[0057] In the gaming machine or the gaming machine 2 or 3 according to claim 1, a third terminal provided between the supply line of the driving voltage by the power supply unit and the ground line of the storage unit and near the storage unit. 2 noise removing means;
A gaming machine 4 comprising: a third noise removing unit provided between a backup voltage supply line by the power supply unit and a ground line of the storage unit and near the storage unit. For example, the second and third
A capacitor is exemplified as the noise removing unit.

[0058] In the gaming machine or the gaming machine 1 according to claim 1, the noise removing means is provided between a driving voltage supply line by the power supply means and a ground line of the storage means, and a backup voltage supply by the power supply means. Between a line and a ground line of said storage means,
A gaming machine 5 provided near each of the storage means. For example, as noise removal means,
A constant voltage diode having a voltage value substantially equal to the value of the drive voltage supplied by the power supply means is exemplified.

[0059] In the gaming machine or the gaming machine 5 according to claim 1, the noise removing means is provided between the drive voltage supply line and the backup voltage supply line by the power supply means and near the storage means. A gaming machine 6 characterized by being used. For example, a capacitor connected between the drive voltage supply line and the backup voltage supply line and close to the storage unit is exemplified as the noise removal unit.

[0060] In the gaming machine or any of the gaming machines 1 to 6, the storage means is provided in an MPU in which a program memory, an arithmetic unit, and a work memory are built in one chip. A gaming machine 7 characterized by: This MPU includes, in addition to a program memory, an arithmetic unit, and a work memory, a counter such as a timer (counter timer, watchdog timer, etc.) and a free running counter, a chip select logic, a random number generation circuit,
An ID output circuit for outputting an identification number unique to this MPU,
A peripheral circuit such as a built-in peripheral circuit may be used.

[0061] In the gaming machine or any of the gaming machines 1 to 7, the storage means stores the number of remaining payouts of prize balls (or rental balls), and clears the contents of the storage means. A gaming machine 8 comprising a clear switch for performing a game. The clearing of the backup data by the clear switch can be performed in the following cases, for example. (1) When the clear switch is operated. (2) When the power is turned on while the clear switch is operated. (3) When the power is turned off while the clear switch is operated. In this case, whether the backup data is cleared in the end process,
Alternatively, in the termination processing, the fact that the clear switch is operated when the power is turned off may be stored, and the backup data may be cleared when the power is turned on next time.
(4) When the clear switch is operated a plurality of times within a predetermined time. (5) When two or more clear switches are provided and the clear switches are operated in a predetermined order or simultaneously.

The gaming machine 9 according to claim 1, wherein said gaming machine is a pachinko machine. Above all, the pachinko machine has an operation handle as a basic configuration, and fires a ball to a predetermined game area in response to operation of the operation handle, and the ball wins an operation port arranged at a predetermined position in the game area. (Or pass through the operating port) is a condition in which the identification information variably displayed on the display device is fixedly stopped after a predetermined time. In addition, when a special game state occurs, a variable winning device (specific winning opening) arranged at a predetermined position in the game area is opened in a predetermined mode to enable the ball to win, and a value corresponding to the winning number is obtained. A value (including not only a prize ball but also data written on a magnetic card) is given.

A gaming machine according to claim 1, wherein said gaming machine is a slot machine. Above all, the basic configuration of the slot machine is as follows: "variable display means for variably displaying an identification information string composed of a plurality of pieces of identification information and then confirming and displaying the identification information is used. Alternatively, or after a lapse of a predetermined time, the change of the identification information is stopped, and a condition that the fixed identification information at the time of the stop is the specific identification information is a necessary condition.
A game machine having special game state generating means for generating a special game state advantageous to a player. In this case, coins and medals are typical examples of the game medium.

The gaming machine according to claim 1, wherein said gaming machine is a combination of a pachinko machine and a slot machine. Among them, the basic configuration of the integrated gaming machine is as follows: "variable display means for confirming and displaying the identification information after variably displaying an identification information sequence including a plurality of identification information,
The change of the identification information is started by the operation of the start operation means (for example, the operation lever), and the identification information is changed by the operation of the stop operation means (for example, the stop button) or after a predetermined time elapses. And a special game state generating means for generating a special game state advantageous to the player on the condition that the fixed identification information at the time of the stop is the specific identification information, and a ball as a game medium. A gaming machine that is configured to use a predetermined number of balls at the start of the change of the identification information and to pay out many balls when a special game state occurs.

[0065]

According to the gaming machine of the present invention, when the supply of the drive voltage is interrupted, the storage means retains the stored contents (backs up data) with the backup voltage supplied from the power supply means. Various noises are added to the storage means, but such noises are removed or suppressed by the noise removal means, so that there is an effect that the gaming machine can be operated normally. For example, by removing or suppressing noise added when writing to the storage means to store normal data, and removing or suppressing noise added when reading data from the storage means to read normal data, Machine can operate normally.

[Brief description of the drawings]

FIG. 1 is a front view of a game board of a pachinko machine according to one embodiment of the present invention.

FIG. 2 is a block diagram schematically showing an electric configuration of the pachinko machine.

FIG. 3 is a diagram illustrating a supply path of a drive voltage generated by a power supply circuit to each control board and the like.

FIG. 4 is a diagram showing a noise removing circuit of the first embodiment provided in the MPU of the main control board.

FIG. 5 is a diagram illustrating a noise removing circuit according to a second embodiment provided in the MPU of the main control board.

FIG. 6 is a diagram illustrating a noise removing circuit according to a third embodiment provided in the MPU of the main control board.

FIG. 7 is a diagram illustrating a noise removal circuit according to a fourth embodiment provided in the MPU of the main control board.

FIG. 8 is a diagram illustrating a noise removing circuit according to a fifth embodiment provided in the MPU of the main control board.

FIG. 9 is a diagram illustrating a noise removing circuit according to a sixth embodiment provided in the MPU of the main control board.

[Explanation of symbols]

 Reference Signs List 30 power supply circuit 31 first power supply circuit (power supply means) 31c 5 volt generation circuit 31d backup voltage generation circuit 11 MPU 12, 13 RAM (storage means) C1 to C4 capacitor (noise removal means) ZD1 to ZD5 constant voltage diode (noise removal) Means) C main control board H payout control board P pachinko machine (game machine)

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hiromasa Suzuki 7-49 Haruoka-dori, Chigusa-ku, Nagoya J-Tai F-term (reference) 2C088 AA17 AA35 AA36 AA42 BC58 EA10 EB15 EB58

Claims (1)

[Claims] 1. A power supply means for supplying a drive voltage and a backup voltage, and operates by receiving a drive voltage from the power supply means, and the backup voltage is supplied even if the supply of the drive voltage is interrupted. A gaming machine comprising: a non-volatile storage unit for storing storage contents; and a noise removal unit for removing or suppressing noise applied to the storage unit.