JP2001292347A - Wireless video camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wireless video camera that reduces the delay time at signal processing to the utmost so as to eliminate the sense of incongruity at a scene change. SOLUTION: The wireless video camera is provided with a compression coding means 20 that applies compression coding to an image signal from a CCD 14, a modulation means 26 that modulates the image signal that is compression-coded, a transmission means 28 that transmits the modulated image signal, and a clock generating means 50 that generated a clock signal supplied to the means above. The compression cording means 20 is provided with a memory section 24 that stores the image signal, a compression coding section 30 that compresses the image signal read from the memory section, and a pre- encoder section 40 that generates parameters required for compression coding. The clock generating means consists of first and second clock generating sections 54, 56. The second clock generating section generates a second clock signal whose frequency is (n) times that of the first clock signal, and the second clock signal is used to drive an image pickup means, the memory section and the pre-encoder section.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wireless video camera. More specifically, by compressing and encoding the captured image signal and transmitting it wirelessly, at least a part or all of the processing means related to the compression and encoding is set to be higher than other clock signals. , At least the processing time until the image pickup signal is compression-encoded is shortened so that the delay due to the compression-encoding processing is minimized. It is possible to achieve switching without discomfort even by switching images with a television camera.

[0002]

2. Description of the Related Art Some wireless video cameras capable of exhibiting mobility are designed to transmit image signals by analog modulation. As is well known, transmission such as ghost due to reflection of radio waves (multipath) is known. Deterioration of transmission quality due to the unstable line is inevitable.

In order to avoid this drawback, wireless video cameras employing a digital modulation system have appeared. In this case, in order to enable transmission with the same bandwidth as that of the analog modulation method, means for compressing and transmitting an image signal is used. By adopting digital transmission together with compression encoding, stable images can be transmitted with high quality.

In order to perform digital transmission processing, compression encoding processing of an image signal is required as prerequisite processing. In order to perform a good compression encoding process, it is effective to perform a parameter calculation process for obtaining a compression process control parameter on the entire transmission screen for constructing an image signal before performing the compression process.

Next, the configuration of a conventional wireless video camera with such a compression encoding process and an example of the process will be described with reference to FIG. In FIG.
The object 11 captured by the imaging lens 12 is
4 and converted into an image signal. As the imaging unit 14, a solid-state imaging device such as a CCD is used.

[0006] The image signal output from the CCD 14 is supplied to a compression encoding circuit 20. In this example, a compression encoding method such as MPEG2 is employed as the compression encoding circuit 20. Therefore, the compression encoding circuit 20 includes an encoding control unit 22, a buffer memory unit 24, a compression encoding unit 30, and a pre-encoder unit 40.

The coding control unit 22 performs motion detection on the input uncompressed image signal to generate a motion vector. If the image signal is interlaced, it is converted into a non-interlace image signal by performing field conversion.

The image signal is stored in the input buffer memory unit 24 as 1
Frames are recorded. The recorded image signals are simultaneously read out in block units, which are signal processing references, and supplied to the pre-encoder unit 40. This pre-encoder section 40
In order to prepare for compression encoding of an image signal, compression encoding is performed for each block, and when a calculation result of the entire screen is obtained, an optimal data amount (quantized value) is calculated for each block. Control parameters for efficient allocation and compression encoding are calculated.

[0009] The image signals recorded in the input buffer memory unit 24 are sequentially read out in block units and supplied to the compression encoding unit 30. Here, the pre-encoder unit 4
The compression encoding process is performed using the control parameters calculated at 0. Thus, optimal encoding is performed. The processed image signals are sequentially output after adding identification data such as a header. This compression coded signal is transmitted to the modulator 26.
After being subjected to, for example, QPSK modulation, it is supplied to the transmitter 28 and transmitted.

Although not shown, the station demodulates and decodes the received signal to obtain an expanded image signal.

[0011]

By the way, in the wireless video camera 10 as shown in FIG. 10, a signal delay occurs due to the compression encoding process. This will be described with reference to FIG. However, the image signal is a case of a non-interlace signal.

As described above, in the pre-encoder section 40, control parameters for the entire screen are calculated from image signals for one screen, and the processing time required for this calculation is one frame + α1 (one block of one block). It takes time to prepare the data) (see FIGS. 11A and 11B).

Next, the image signal is sequentially read out again from the input buffer memory unit 24 in block units, and the compression encoding process is performed using the calculated control parameters. (FIG. 11
C, D).

The processed image signal is sequentially output with identification data such as a header added thereto, and a delay of a predetermined time (α3) also occurs when the output signal is modulated (FIG. 1).
1E). Since there is demodulation and decoding processing on the receiving side, a predetermined time (α
4) (FIG. 11F).

Therefore, it takes at least (1 frame + α) or more time from transmission to reception of the image signal obtained by the wireless video camera. The delay time α is the total time of α1 + α2 + α3 + α4, and the total time is usually about 1/10 frame. Such a time delay may cause a problem in the following cases.

For example, when a sports program is broadcasted live using a plurality of video cameras, a camera (fixed television camera (video camera)) for transmitting a normal baseband image signal via a cable, or When the images of the wireless video camera 10 are used while switching a plurality of fixed television cameras, a time lag occurs. This time lag may leave a sense of incongruity when switching cameras (when switching screens).

This problem occurs even when an interlaced image signal is handled. When the image signal is interlaced, as shown in FIGS. 12A and 12B, in addition to the image signal of the first field, a part (usually 4 pixels) of the image signal of the second field is fetched, and then the pre-encoding process is performed. Therefore, it takes (1/2 frame + α1) as a time required until the image data of one block which is a processing unit is prepared,
The entire screen takes one more frame. Here, since α1 is the time per block from the time of reading to the end of the pre-encoding processing, (1)
Frame + α1).

Next, it takes a processing time of α2 to compress and encode the image signal and output it (FIGS. 12C and 12D). Then, when the signal is modulated and transmission processing is performed, (α3 + α
The processing time of 4) is required (FIGS. 12E and 12F).
In the demodulation and decoding processing on the receiving side, it is necessary to store at least 1/2 frame of image signal. Therefore, if the processing time is α4, the receiving side has a total (1/2 frame). + Α4) It will be delayed. After all, after the object is imaged and before the receiving unit restores the original image signal, (2 frames + α1 + α2 + α3
+ Α4). Therefore, the delay time is longer in the case of an interlaced signal, and the sense of discomfort when switching screens is further increased.

Therefore, the present invention solves such a conventional problem. Even when a program is formed while switching between a plurality of cameras by shortening a signal processing time, an uncomfortable feeling at the time of switching screens is provided. The present invention proposes a wireless video camera that can eliminate the problem.

[0020]

According to a first aspect of the present invention, there is provided a wireless video camera according to the first aspect of the present invention, wherein an image signal is output from the image capturing device. Compression means for modulating the compressed and coded image signal, transmission means for transmitting the modulated image signal, and clock generation means for generating a clock signal to be supplied to these means. The compression encoding unit includes a memory unit that stores at least the image signal, a compression encoding unit that compresses the image signal read from the memory unit, and a compression encoding unit that encodes the image signal. The clock generating means includes a first clock generating unit and a second clock generating unit, and includes a pre-encoder that generates necessary parameters. Tsu from the second clock generator to the first clock signal from the click generation unit, the second clock signal n times the first clock signal is generated,
The second clock signal drives the imaging means, the memory unit, and the pre-encoder.

According to the present invention, the processing speed of the signal processing system in which at least signal delay occurs is made faster than the other signal processing systems. For example, the imaging unit, the matrix circuit, and the pre-encoder unit are set to about three times the processing speed of the other processing units. Therefore, the clock frequency is tripled.

By performing such high-speed processing,
For example, when processing at three times the speed, 1 /
Since the signal processing can be completed in the processing time of 3, the processing time from imaging and transmitting the target object can be shortened as compared with the related art. As a whole, the delay can be about 0.5 frame. With such a delay time, a sense of incongruity at the time of screen switching does not occur.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a wireless video camera according to the present invention applied to a portable wireless video camera will be described in detail with reference to the drawings.

The basic configuration of the wireless video camera 10 according to the present invention shown in FIG. 1 is almost the same as the configuration of FIG. 10 shown as a conventional example. In the present invention,
A solid-state imaging device such as a CCD is used as the imaging unit 14 of the object 11. CCD can be R, G, B
May be a three-plate type that captures the color separation image.

The image signal output from the CCD 14 is converted by a matrix circuit 16 into a luminance signal Y and a pair of color signals I and Q in this example, and the converted image signal is supplied to a compression encoding circuit 20. In this embodiment, the compression encoding circuit 20 employs a compression encoding method based on MPEG2, but is not limited to this compression encoding method.

The compression encoding circuit 20 includes an encoding control unit 22
, A buffer memory unit 24, a compression encoding unit 30, and a pre-encoder unit 40.

The encoding control unit 22 performs motion detection on the input uncompressed image signal to generate a motion vector. If the image signal is interlaced, it is converted into a non-interlace image signal by performing field conversion.

The image signal is stored in the input buffer memory unit 24 as 1
Frames are recorded. This is because the compression encoding process is performed on a frame basis. The written image signals are simultaneously read out in block units, which are signal processing references, and supplied to the pre-encoder unit 40. In the pre-encoder section 40, when the image signal is compression-coded, compression coding is performed for each block, and when the calculation result of the entire screen is obtained, the optimal quantization level is set for each block. Control parameters for variable-length coding are calculated.
This is for efficient compression encoding.

The image signals written in the input buffer memory 24 are sequentially read out in block units and supplied to the compression encoder 30. Here, the compression encoding process is performed using the control parameters calculated by the pre-encoder unit 40. The processed image signals are sequentially output after adding identification data such as a header. After the compression-coded signal is subjected to, for example, QPSK modulation in the modulator 26, the signal is supplied to the transmitter 28 and transmitted.

Although not shown, the station demodulates and decodes the received signal to obtain an expanded image signal.

In this embodiment, the first clock generator 54 having a different frequency is used as the clock generator 50.
And a second clock generation unit 56. When, for example, 13.5 MHz is used as the frequency of the first clock signal, the second clock frequency is 40.5 MHz.
z.

FIG. 2 shows an example of the pre-encoder section 40. An image signal read from the input buffer memory 24 is supplied to a terminal 40a. The input image signal enters a subtraction circuit 41, in which a subtraction process is performed on the image signal of one frame before which has been motion-compensated from an addition circuit 48, and the difference signal is converted into a DCT (Discrete Cosine Transform) circuit. 42. The DCT circuit 42 performs a two-dimensional discrete cosine transform with, for example, a block size of 8 × 8 pixels. The converted frequency domain signal is quantized by a quantization circuit (Q; Quantization) 43 at an appropriate quantization level (fixed value). This quantization result is subjected to variable length coding (Variable Length Code) by a variable length coding circuit 44.
I do. The data amount of the compressed image data obtained as a result of the variable length encoding is sent to the compression encoding unit 30 as a pre-encoding result, that is, a control parameter.

The result of quantization is calculated by an inverse quantization circuit (IQ; Invers
e Quantization) 45 to return to the DCT coefficient, and further to an inverse DCT circuit (IDCT; Inverse Discrete Cosine Tran
(sform) 46, the pixel value is returned to the pixel value of the block size of 8 × 8 pixels. This pixel value is supplied to the motion compensation circuit 47. The motion compensation circuit 47 is supplied with a motion vector from the encoding control unit 22 through the terminal 21a, and outputs block data compensated by the motion vector. The block data is added to the image value that has been subjected to the inverse DCT processing by the adding circuit 48 and decoded into the original image signal. The decoded image signal is returned to the subtraction circuit 41, and the difference information between adjacent frames is output as described above.

FIG. 3 shows a specific example of the above-described compression encoding section 30. This also uses a well-known circuit configuration. The compression encoder 30 has almost the same configuration as the pre-encoder 40.

The image signal input to the input terminal 30a of the compression encoding unit 30 enters a subtraction circuit 31, and the image signal of the previous frame subjected to motion compensation from the addition circuit 38 is subtracted.
The difference signal is sent to the DCT circuit 32. The DCT circuit 32 performs a two-dimensional discrete cosine transform with, for example, a block size of 8 × 8 pixels. The converted frequency domain signal enters the quantization circuit 33.

The quantization value (quantization step number, ie, quantization level) in the quantization circuit 33 is determined as follows. First, the control parameters obtained by the pre-encoder unit 40 and the data amount of the current compressed image data obtained from the variable-length encoding circuit 34 are supplied to a quantization control unit 39 composed of a CPU, so that optimal data compression is performed. Is obtained. The DCT coefficient is quantized using the quantized value Q.

The quantization result is subjected to variable-length encoding by the variable-length encoding circuit 34, and is output to the modulator 26 via the terminal 30b.

The quantization result is returned to DCT coefficients by an inverse quantization circuit 35, and is returned to a pixel value of a block size of 8 × 8 pixels by a subsequent inverse DCT circuit 36. This pixel value is supplied to the adding circuit 38. The motion vector supplied via the terminal 21a is output to the motion compensation circuit 37 as a block compensated by the motion vector. The block after the motion compensation and the pixel value returned to the original value are added by the adding circuit 38 and decoded into the original image signal. The decoded image signal is input to a subtraction circuit 3 in the input stage.
Returned to 1.

In the present invention, as shown in FIG. 1, the first clock signal CK is supplied from the first clock generator 54.
Is output, and the second clock signal 3CK is output from the second clock generation unit 56.

The second clock signal 3CK is set higher than the first clock signal CK. In this embodiment, the clock signal is tripled. Then, the second clock signal 3CK is supplied to a signal processing unit that needs to perform signal processing at high speed. In the embodiment of FIG.
The encoding control unit 22 and the pre-encoder unit 4 of the CD 14, the matrix circuit 16, and the compression encoding unit 20
0 is supplied as a clock signal for signal processing. In this example, the second clock signal 3C is also used as a data writing clock in the buffer memory unit 24.
K is supplied. The other signal processing units are supplied with the first clock signal CK.

Next, a specific example of performing signal processing using the clock signals CK and 3CK having different clock frequencies will be described below. (1) When a non-interlace signal is used as an image signal. This will be described with reference to FIG. The CCD 14 reads an image signal at three times the normal speed (FIG. 4A). Since the readout speed is three times the normal speed, the time β1 during which the image signals of one block (8 × 8 pixels) out of the image signals are also １ ／ of the normal time. This image signal is pre-encoded (FIG. 4B). The time required for pre-encoding is also 1/3 of the normal time, that is, 1/3 frame.

The read timing of the image signal from the buffer memory unit 24 is just after 1/3 frame time has elapsed from the first time (FIG. 4C). If the compression encoding processing time in the compression encoding unit 30 is β2, The timing of the compression encoded output is as shown in FIG. 4D.

This compression-encoded output is modulated and delayed by β3 due to transmission processing (FIG. 4).
D, E). On the other hand, assuming that the decoding and decoding processing time on the receiving unit side is β4, the output timing at the receiving unit is as shown in FIG.
It becomes F.

Therefore, the time required to read an image signal from the CCD 14 and reproduce it in the receiving unit is as follows.
(1/3 frame + β), and β is β1 described above.
Is the accumulated time from to. This processing time β is shorter than the conventional processing time (about 1/10 frame in total), and is about 1/3. Therefore, (1/3 frame + (1/10) × 3 frames) = 13/30, and
The delay is about 0.5 frames. I do not mind this delay at all, so if I switch images between a fixed TV camera and a wireless video camera, there is no discomfort when switching screens.

(2) When an interlace signal is used as an image signal. This will be described with reference to FIG. The CCD 14 reads an image signal at three times the normal speed (FIG. 5A). Although the reading speed is three times the normal speed, pre-encoding requires image data for at least one field, that is, one block of the second field in 1/2 frame, so that one block of the second field is required. The pre-encoding process is performed after the image data of (1) is prepared (FIG. 5B).
The processing time of the pre-encoding itself is 1/3 of the normal time.

Then, a pre-encoded output (frame image signal) is obtained after a lapse of 1/3 frame time. Subsequent processing is the same as in FIG. However, in order to obtain the original image signal from the transmission output, it is necessary to wait for １ ／ frame or more. Therefore, the demodulation and encoding processing time from when the transmission output is received to when the original image signal is obtained is as follows. (フ レ ー ム frame + β4).

Therefore, the delay is (1 + 1/3) frames + β. Here, β is the total sum of the above-mentioned delays, and when β is the same as the conventional time, about 1.5
This is about a frame delay. With such a delay, there is no discomfort when switching the screen.

(3) A case where an interlaced signal is targeted and only the pre-encoding process is performed at a normal triple speed. In this case, as shown in FIGS. 6A and 6B, after a lapse of time when one block of image data of the second field necessary for the compression encoding process is completed in 1/2 frame (first field). , A pre-encoding process is executed. The pre-encoding processing time is 1/3 of the normal time.

In order to demodulate and encode the transmission output of the image signal after receiving it, as shown in FIGS. 6E and 6F, the time for demodulation and encoding after reception (1/2 frame + β4) , It is finally delayed by the time of (1 + ／) frame + β. This value is approximately 1.5 frame times. Therefore, also in this case, as in FIG. 5, the user does not feel a sense of discomfort when switching the screen.

FIG. 7 et seq. Show an embodiment when the transmission band can be sufficiently secured. FIG. 7 shows a case where a non-interlaced signal is used as an image signal and the clock frequency of the entire wireless video camera 10 is selected to be three times the normal frequency.

In this case, the processing from the reading speed of the image signal from the CCD 14 to the transmission processing can all be performed at three times the normal speed. 1 for pre-encoding
Since it is necessary to wait for ／ frame time, the total (1
/ 3 frames + β), and if the same conversion as described above is performed, the delay is approximately 0.5 frames, so that a feeling of strangeness at the time of screen switching does not occur.

FIG. 8 shows an embodiment in which the image signal of FIG. 7 is changed to an interlaced signal. In this case, at the time of pre-encoding, the time required for preparing one block of image data (1/2 frame + β1) and the time delay at the time of reading the pre-encoded output (（frame time) Is the main delay time.

Therefore, the delay time in this case is (5/6)
(Frame + β), which is a delay of approximately one frame time.

FIG. 9 shows a case where the processing is performed at triple speed, which is higher than usual, except for the reading speed from the CCD 14.
Also in this case, at the time of pre-encoding, the time (1/2 frame +
β1) and the time delay (１ ／ frame time) when reading the pre-encoded output are the main delay times.

Therefore, the delay time in this embodiment is almost the same as in the case of FIG. 8, that is, (5/6 frame + β), which is about one frame time delay.

In the above description, the second clock signal 3CK
Is three times as large as the first clock signal CK (n = 3), but the value of n (integer) is arbitrary.

[0057]

As described above, in the present invention, the processing speed of at least the signal processing system in which signal delay occurs is made faster than that of the other signal processing systems. For example, the processing speed from the imaging unit to the input buffer memory unit and the pre-encoder unit is set to be about three times the processing speed of the other processing units.

By performing such high-speed processing,
For example, when processing at three times the speed, 1 /
Since the signal processing can be completed in the processing time of 3, the processing time from imaging and transmitting the target object can be shortened as compared with the related art. As a whole, the delay can be about 0.5 frame. With such a delay time, a sense of incongruity at the time of screen switching does not occur.

Even when the delay of the system is strictly adjusted, the delay amount of the delay line for delaying the video signal of another television camera can be reduced.

The processing from reading of the image signal from the image pickup means to the pre-encoding processing is performed at a high speed. On the other hand, when compression encoding, modulation and transmission are performed at a normal speed, the transmission bandwidth is not widened. The image signal can be transmitted while keeping the transmission bandwidth, and the delay time of the signal can be reduced.

Therefore, the wireless video camera according to the present invention is very suitable for application to sports broadcasting using a fixed television camera such as a sports program and a portable wireless video camera on the field.

[Brief description of the drawings]

FIG. 1 is a system diagram of a main part showing an embodiment of a wireless video camera according to the present invention.

FIG. 2 is a system diagram of a pre-encoder unit.

FIG. 3 is a system diagram of a compression encoding unit.

FIG. 4 is an explanatory diagram illustrating an example of processing of an image signal (part 1).

FIG. 5 is an explanatory diagram illustrating an example of processing of an image signal (part 2).

FIG. 6 is an explanatory diagram illustrating an example of processing of an image signal (part 3).

FIG. 7 is an explanatory diagram illustrating an example of processing of an image signal (part 4).

FIG. 8 is an explanatory diagram illustrating an example of processing of an image signal (part 5).

FIG. 9 is an explanatory diagram illustrating an example of processing of an image signal (part 6).

FIG. 10 is a system diagram of a conventional wireless video camera.

FIG. 11 is an explanatory diagram showing an example of processing of a conventional image signal (part 1).

FIG. 12 is an explanatory view showing an example of processing of a conventional image signal (part 2).

[Explanation of symbols]

10: Wireless video camera, 14: CC
D, 16: matrix circuit, 20: compression coding circuit, 22: coding control unit, 24: buffer memory unit, 30: compression coding unit, 40: pre-encoder Part, 50... Clock generating means, 54, 56
... Clock generation unit

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H04N 7/30 H04N 7/133 Z (72) Inventor Hideyuki Matsumoto 6-7-35 Kita Shinagawa, Shinagawa-ku, Tokyo Sony Incorporated (72) Inventor Haruo Togashi 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo F-term in Sony Corporation (reference) 5C022 AB64 AC42 AC69 CA02 5C059 KK11 KK36 LA05 LA07 LB01 LB18 MA00 MA23 MC11 ME01 PP04 PP16 RB09 RC12 RE04 SS01 SS14 UA09 5J064 AA01 BA01 BA09 BA13 BA16 BC01 BC02 BC08 BC16 BD02

Claims (6)

[Claims] An image pickup means, a compression coding means for compression coding an image signal output from the image pickup means, a modulation means for modulating a compression coded image signal, and a transmission of the modulated image signal Transmitting means, and clock generating means for generating a clock signal to be supplied to these means, wherein the compression encoding means has at least a memory unit for storing the image signal, and a signal read from the memory unit. A compression encoding unit that compresses the image signal; and a pre-encoder unit that generates a parameter necessary for compression encoding the image signal. The clock generation unit includes a first clock generation unit, A second clock generation unit, and the second clock generation unit outputs n of the first clock signal in response to the first clock signal from the first clock generation unit. A wireless video camera, characterized in that a second clock signal is generated, and the imaging means and the pre-encoder section are driven by the second clock signal. 2. The wireless video camera according to claim 1, wherein the second clock signal has a clock frequency three times that of the first clock signal. 3. The wireless video camera according to claim 1, wherein the image signal is an interlaced signal or a non-interlaced signal. 4. The wireless video camera according to claim 1, wherein said second clock signal is supplied only to said pre-encoder section. 5. The apparatus according to claim 1, wherein said first clock signal is supplied to said image pickup means, and said second clock signal is supplied to another signal processing section. Wireless video camera. 6. The clock generator according to claim 1, wherein the clock generator has only a second clock generator, and all the processing units are driven based on the second clock signal. Wireless video camera.