JP2001282206A - Liquid crystal display device and drive circuit for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce electric power consumption by preventing unnecessary charging and discharging current. SOLUTION: Counter electrodes disposed to face picture element electrodes are divided into the same number as the number of gate bus lines 4 and are arranged in parallel to the gate bus lines. The respective counter electrode segments C1, C2, etc., Cn are interconnected and individual arbitrary voltages are imparted thereto. The ON voltage is impressed only to the counter electrode segments corresponding to the gate bus lines 4 of the ON state and the corresponding counter electrode segments are put into a high impedance state when the gate bus lines are in the OFF state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to an OA (Official)
e Automation and AV (Audio V
More particularly, the present invention relates to a so-called active matrix type liquid crystal display device in which switching elements are arranged in a matrix on a transparent insulating substrate and a driving circuit thereof.

[0002]

2. Description of the Related Art Liquid crystal display devices have characteristics such as thinness, weighing and low power consumption, and have been widely used in recent years. Among them, an active matrix type liquid crystal display device in which a switching element is arranged for each matrix-shaped picture element has attracted attention as an OA or AV display device because it can provide high-quality images in addition to the above-described features. ing.

A general active matrix type liquid crystal display device has a liquid crystal panel having a liquid crystal layer sandwiched between two substrates made of a light-transmitting insulating material such as glass. A light source is provided on the back side of the display surface of the liquid crystal panel so that at least the liquid crystal layer is uniformly irradiated with light.
A light irradiating means comprising a light guide plate controlled so that the light from the light source spreads over the entire liquid crystal layer and the amount of light becomes constant.

[0004] On one of the substrates constituting the liquid crystal panel, a plurality of gate bus lines and a plurality of source bus lines are densely arranged in a matrix form in a state of being insulated from each other so as to cross each other (generally orthogonal). Have been. Near the intersection of each bus line, a TFT (thin film transistor) element as a switching element and a pixel electrode are provided in a matrix separated by each bus line. Each TFT element is electrically connected to a gate bus line, a source bus line, and a pixel electrode.

[0005] On the other substrate, a counter electrode provided opposite to the picture element electrode is provided in a solid pattern over the entire surface, and the two substrates are bonded at their peripheral portions with a sealant. Has a liquid crystal layer sandwiched between them.

Hereinafter, the process of obtaining a display by the liquid crystal display device will be described with reference to FIGS. 3, 4 and 5. Here, a case where black display is performed will be described.

A control circuit 1 shown in FIG. 3 receives arbitrary display data output from a signal generator such as a personal computer and a synchronization signal output in a form synchronized with the display data, and internally receives the liquid crystal display. Converts to a signal suitable for the device. Then, the next stage gate electrode drive circuit 10, source electrode drive circuit 2, and counter electrode drive circuit 1
1 is supplied with a predetermined signal.

[0008] The gate electrode drive circuit 10 is provided for each gate bus line (G1, G2, ..., Gn) 4
Voltage is applied sequentially. 4 and 5, a change in the liquid crystal applied voltage 22 applied to a specific picture element will be described.
An ON voltage as indicated by the gate signal 20 is applied to the gate electrode G of the FT element 7, and the TFT element 7 is turned on.

At this time, the liquid crystal capacitance 8 and the auxiliary capacitance 9 of each pixel, which is a liquid crystal layer portion sandwiched between each pixel electrode and the counter electrode, are supplied from the source electrode driving circuit 2 to the source bus line (S1). , S2,..., Sm) 6 and the source signal 14 via the TFT element 7. Further, a common counter electrode signal (VCOM) 21 is supplied from the counter electrode drive circuit 11 to the liquid crystal capacitor 8 and the auxiliary capacitor 9 via the counter electrode bus line 5. As a result, a potential difference 16, 17 between the source signal 14 and the counter electrode signal 21 is generated as a liquid crystal application voltage 22 between the predetermined pixel electrode and the counter electrode. In addition, at the liquid crystal applied voltage 22, 16, 17
Indicate the direction of the potential, the solid line indicates the pixel electrode potential (drain waveform) 18a, and the broken line indicates the counter electrode waveform.

Here, the potential differences 16 and 17 generated between the source signal 14 and the counter electrode signal (VCOM) 21 are constant, but these signals change the direction (polarity) of the potential 22 applied for each field. Invert (16, 17), and further apply the potential 22 applied to the adjacent gate bus line 4.
Are also reversed every line. This is because the characteristics are degraded when a constant DC voltage is applied to the liquid crystal for a long time, and it is necessary to suppress the fluctuation of the voltage of the picture element due to the charge / discharge current such as the parasitic capacitance which causes flicker. For reasons such as.

Further, the potential of the liquid crystal applied voltage 22 shown in FIG. 4 fluctuates in accordance with the counter electrode signal 21 while maintaining the potential difference 17 or 16 by the counter electrode signal 21 which is inverted every line. Therefore, in order to cancel the charge transfer of the parasitic capacitance 24 caused by the TFT element 7 shown in FIG. 5 which has a particularly large influence, the gate signal 20 shown in FIG.
The FF signal is also AC driven with the potential difference of the counter electrode signal 21.

Since the amount of charge held in the liquid crystal capacitance 8 of the auxiliary capacitance 9 is minute, the fluctuation of the voltage applied to the liquid crystal due to the fluctuation of the parasitic capacitances 23, 24, 25 and the like is reduced as shown in FIG. Provided for. Although not particularly described in this specification, the auxiliary capacitance may have a capacitance between the auxiliary capacitance and the gate bus line.

According to such a driving method, the light uniformly applied to the upper surface of the liquid crystal panel enters the liquid crystal via the polarizing plate attached to the liquid crystal panel. Then, the alignment state of the liquid crystal molecules changes due to the potential difference generated between each pixel electrode and the counter electrode (VCOM), and the light whose polarization direction is appropriately changed is applied to the other polarizing plate attached to the liquid crystal panel. By emitting the light through the, arbitrary transmitted light can be obtained.

[0014]

In the above-mentioned conventional liquid crystal display device, the common voltage (counter electrode signal (VCO)
M)) and AC drive in which the polarity of the data signal voltage (source signal) is frequently inverted. Therefore, when the voltage is inverted, a charge / discharge current flows through the liquid crystal panel, which is a capacitive load, and power is consumed.

Further, in recent years, the definition has been advanced, and the frequency for inverting the polarities of the common voltage and the data signal voltage has been increased. However, since the charge / discharge current increases in proportion to the frequency, the increase in power consumption due to the increase in the charge / discharge current cannot be ignored.

In order to improve such an increase in power consumption, for example, Japanese Unexamined Patent Publication No. 6-149174 discloses that a counter electrode is formed by dividing a plurality of groups, and the polarity of a voltage applied to each group. Are disclosed so as to have opposite polarities. At present, line inversion is performed by inverting the polarity of the drive voltage of the data line (source line) between the mth line and the (m + 1) th line, and the opposite polarity is inverted for each of the two counter electrodes (common electrodes) for each frame. It is configured to be. According to this method, the opposite electrodes having the same polarity can be collectively driven every other line, so that it is only necessary to change the polarity of the voltage of the opposite electrode for each frame, and low frequency driving becomes possible. Power consumption can be reduced.

However, in the above-mentioned conventional method, it is necessary to always apply a voltage to the counter electrode even after an arbitrary voltage is applied to the specific liquid crystal capacitor 8 and the auxiliary capacitor 9, and the counter electrode needs to be applied accordingly. The power consumption of the drive circuit itself has not been reduced. Further, power consumption due to a leak current (the above-described charge / discharge current) in the liquid crystal panel cannot be reduced. Further, by dividing the opposing electrode, two or more circuits are required instead of one circuit which has been good so far, and the problem that the circuit occupies a large area on the circuit board is increased. is there.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and it is an object of the present invention to reduce the power consumption by preventing unnecessary charge / discharge currents and to reduce the power consumption of the counter electrode driving circuit itself. It is another object of the present invention to provide a liquid crystal display device capable of reducing the cost and reducing the area occupied by a circuit occupying a circuit board and a driving circuit thereof.

[0019]

According to the liquid crystal display device of the present invention, a plurality of gate bus lines and a plurality of source bus lines are formed on one of a pair of substrates opposed to each other with a liquid crystal layer interposed therebetween. The gate bus lines and the source bus lines are arranged so as to intersect with each other with an insulating film interposed therebetween, and are electrically connected to the gate bus lines and the source bus lines in respective matrix-shaped regions separated by the gate bus lines and the source bus lines. A switching element, and a pixel electrode electrically connected to the switching element are provided. On the other substrate, a counter electrode provided to face the pixel electrode is divided into the same number as the gate bus lines. The liquid crystal display device is arranged in parallel with the gate bus line, and each of the opposing electrode portions is insulated from each other and given an arbitrary voltage. Pressure is applied, the gate bus line and electrically connected to the switching element is ON
When it is in a state,
An ON voltage for turning on the opposing electrode portion is applied only to the opposing electrode portion corresponding to the n-th gate bus line, and an OFF voltage is applied to the n-th gate bus line. The switching element electrically connected to the gate bus line is turned off, the ON voltage is applied to the next (n + 1) th and subsequent gate bus lines, and the switching element electrically connected to the gate bus line is turned on. In this case, the counter electrode portion corresponding to the n-th gate bus line is in a high impedance state, thereby achieving the above object.

According to the liquid crystal display device of the present invention, the picture element electrodes connected to the n-th gate bus line and the (n + 1) -th gate bus line via switching elements are connected to the adjacent gate bus lines. Line inversion is performed by setting the drive voltage to the opposite polarity for each inline, and a voltage of opposite polarity is applied to each of the n-th counter electrode portion and the (n + 1) -th counter electrode portion by inverting each frame. be able to.

In the liquid crystal display device according to the present invention, the gate bus line and the counter electrode portion have opposite ON voltage polarities between adjacent ones, and the polarity of the ON voltage applied to each counter electrode portion is opposite. It is possible to adopt a configuration that is inverted every frame.

The liquid crystal display device according to the present invention may be configured so that a DC signal is applied as an OFF signal of the gate bus line.

The liquid crystal display device of the present invention includes one counter electrode driving circuit, and by switching the counter electrode driving circuit, an ON voltage can be supplied only to a predetermined counter electrode portion. .

In the liquid crystal display device according to the present invention, the opposing electrode driving circuit can also function as a gate electrode driving circuit that supplies a voltage to the gate bus line.

The driving circuit of the liquid crystal display device of the present invention is used in the liquid crystal display device of the present invention, and is a driving circuit for driving the counter electrode, and supplies an ON voltage only to a predetermined counter electrode portion by switching. Thus, the above object is achieved.

The driving circuit of the liquid crystal display device according to the present invention can also supply a voltage to the gate bus line.

Hereinafter, the operation of the present invention will be described.

In the embodiment of the present invention, as shown in FIG. 1 in an embodiment to be described later, a counter electrode provided to face a pixel electrode is 4 are arranged in parallel with each other, and each counter electrode portion is insulated from each other so that an arbitrary voltage is individually applied.

In this liquid crystal display device, an ON voltage is applied to a certain n-th gate bus line 4, and a switching element (TF) electrically connected to the gate bus line 4.
When the T element 7) is in the ON state, an ON voltage for turning on the counter electrode portion is applied only to the counter electrode portion corresponding to the n-th gate bus line 4 at the timing. Can be Then, an OFF voltage is applied to the n-th gate bus line 4, and the TFT element 7 electrically connected to the gate bus line 4 is turned off. When the ON voltage is applied and the switching element electrically connected to the gate bus line 4 is in the ON state, the counter electrode portion corresponding to the nth gate bus line 4 is in the OFF state (high impedance). (State) 19.

Thus, after a given voltage is applied to a given picture element, the picture element enters the OPEN state, so that unnecessary current charging and discharging are eliminated, and power consumption can be reduced.

Since the ON voltage only needs to be applied to the counter electrode portion corresponding to the gate bus line 4 in the ON state, the power consumption of the counter electrode drive circuit itself can be significantly reduced. Further, when the OFF voltage is applied to the gate bus line 4, the OFF voltage of the gate bus line is not affected by the parasitic capacitance 24 shown in FIG.
It can be driven by voltage. Further, power consumption due to leakage current in the liquid crystal panel can be reduced.

Furthermore, even if the opposing electrode is divided, only the opposing electrode portion corresponding to the gate bus line 4 in the ON state is
It is sufficient to apply the N voltage, and it can be realized by one circuit by switching the counter electrode drive circuit (common electrode drive circuit) of small current by switching. Therefore, it is possible to reduce the cost and the area occupied by the circuit on the circuit board.

Further, a pixel electrode connected between a certain n-th gate bus line and an (n + 1) -th gate bus line via a switching element electrically connected to the gate bus line is connected to an adjacent gate bus. After inverting the drive voltage for each line with a reverse polarity and performing a line inversion, and applying a predetermined potential to the liquid crystal on the nth gate bus line,
When the next (n + 1) -th transition gate bus line is turned on, the n-th counter electrode portion corresponding to the n-th gate bus line is turned off (high impedance) and applied to the liquid crystal. The voltage is maintained. Thus, the gate bus line is not affected by the parasitic capacitance generated between the pixel electrode and the gate bus line.
It is possible to DC drive the F signal. Therefore, it is only necessary to change the polarity of the signal of each counter electrode portion for each frame, and low-frequency driving is possible, and power consumption is reduced.

Further, in an embodiment described later, FIG.
As shown in (1), since the gate electrode drive circuit and the counter electrode drive circuit can be integrated into one, it is possible to further reduce the area occupied by the circuit on the circuit board.

[0035]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to specific examples, but the present invention is not limited to the following examples.

The schematic configuration of the liquid crystal display device of the present invention includes a liquid crystal panel having a liquid crystal layer sandwiched between two substrates made of a light-transmitting insulating material such as glass. On the back side of the display surface of the liquid crystal panel, a light source and light from the light source are spread over the entire liquid crystal layer so that light is uniformly applied to at least the liquid crystal layer so that the light amount is constant. A light irradiation unit including a controlled light guide plate is provided.

On one of the substrates constituting the liquid crystal panel, a plurality of gate bus lines and a plurality of source bus lines are densely arranged in a matrix in a state of being insulated from each other so as to cross each other (here, orthogonal). Have been. In the vicinity of the intersection of each bus line, a TFT element as a switching element and a picture element electrode are provided in a matrix separated by each bus line. Each TFT element is electrically connected to a gate bus line, a source bus line, and a pixel electrode.

On the other substrate, opposing electrodes provided so as to oppose the picture element electrodes are divided in the same number as the gate bus lines and arranged in parallel with the gate bus lines, and the opposing electrode portions are insulated from each other. For example, 3-State-Bu
An arbitrary voltage is applied to each of them, such as fffer. 2
The peripheral portions of the substrates are bonded with a sealant, and a liquid crystal layer is sandwiched between them.

Hereinafter, a process of obtaining a display by the liquid crystal display device will be described with reference to FIGS. 1, 2 and 5. In the following drawings, portions having the same functions as those of the prior art shown in FIGS.
The same reference numerals are given.

The control circuit 1 shown in FIG. 1 receives arbitrary display data output from a signal generator such as a personal computer and a synchronization signal output in a form synchronized with the display data, and internally receives the liquid crystal display. Converts to a signal suitable for the device. Then, a predetermined signal is supplied to the next-stage gate / counter electrode drive circuit 3, source electrode drive circuit 2, and counter electrode drive circuit 11.

The gate / counter electrode drive circuit 3 sequentially applies a voltage to each gate bus line (G1, G2,..., Gn) 4. According to FIGS. 2 and 5,
Looking at the change of the liquid crystal applied voltage 15 applied to a specific picture element, first, the gate signal 12 of FIG. 2 is applied to the gate electrode G of the TFT element 7 connected to the gate bus line 4.
The ON voltage as shown in FIG.
State.

At this time, each pixel electrode and the counter electrode portion (C
, C2,..., Cn), a liquid crystal capacitor 8 and an auxiliary capacitor 9 of each pixel, which are liquid crystal layer portions, are provided from the source electrode driving circuit 2 to the source bus lines (S1, S2).
2,..., Sm) 6 and the source signal 14 are applied via the TFT element 7. Further, the gate / counter electrode drive circuit 3 supplies a counter electrode signal 13 to the liquid crystal capacitor 8 and the auxiliary capacitor 9 via the counter electrode bus line 5.
Thereby, between the predetermined pixel electrode and the counter electrode portion,
As the liquid crystal applied voltage 15, potential differences 16 and 17 between the source signal 14 and the counter electrode signal 13 are generated. Note that, in the liquid crystal applied voltage 15, arrows 16 and 17 indicate the direction of the potential, solid lines indicate the pixel electrode potential (drain waveform) 18, and
The broken line shows the counter electrode waveform.

The light uniformly applied to the upper surface of the liquid crystal panel enters the liquid crystal via a polarizing plate attached to the liquid crystal panel. Then, the alignment state of the liquid crystal molecules changes due to the potential difference generated between each pixel electrode and the counter electrode portion, and the light whose polarization direction is appropriately changed passes through the other polarizing plate attached to the liquid crystal panel. , And any transmitted light can be obtained.

Here, the source signal 14 and the counter electrode signal 1
3 are constant, but those signals invert the direction (polarity) of the potential 22 to be applied for each field (16, 17), and further, the adjacent gate bus lines 4 The direction of the potential 22 to be applied is also reversed every line. This is because the characteristics are degraded when a constant DC voltage is applied to the liquid crystal for a long time, and it is necessary to suppress the fluctuation of the voltage of the picture element due to the charge / discharge current such as the parasitic capacitance which causes flicker. For reasons such as.

Further, the counter electrode signal 13 that is inverted for each line becomes an ON voltage that turns on the corresponding counter electrode portion in accordance with the timing when the gate signal 12 of the gate bus line 4 becomes the ON voltage. When the ON voltage 19a is applied to the next gate bus line 4, and the gate signal 12 of the gate bus line 4 becomes the OFF voltage, the corresponding counter electrode portion is turned off (high impedance state) 19. Therefore, like the liquid crystal application voltage 22 of the conventional example shown in FIG.
The potential does not fluctuate in accordance with the counter electrode signal 21 while maintaining the same. Therefore, since the influence of the parasitic capacitance 24 due to the TFT element 7 shown in FIG. 5 does not occur, the OFF signal of the gate signal 12 can be driven by a DC voltage. Thus, since it is only necessary to change the polarity of the signal of each counter electrode portion for each frame, low-frequency driving becomes possible, and power consumption can be reduced.

After an arbitrary voltage is applied to a specific liquid crystal capacitor 8 and an auxiliary capacitor 9, it is not necessary to apply a voltage by setting the counter electrode to high impedance, so that the power consumption of the counter electrode driving circuit itself is not necessary. And the power consumption can be reduced by suppressing the charge / discharge current of the liquid crystal panel, which is a capacitive load. Further, even if the counter electrode is divided, the ON voltage can be supplied only to a predetermined counter electrode portion by switching one gate / counter electrode driving circuit, so that the cost can be reduced and the circuit occupying the circuit board can be reduced. Occupied area can be reduced.

FIG. 6 shows the gate / counter electrode driving circuit 3
An example of the configuration will be described. Here, the gate bus line (G1)
Indicates that the other is active and the other gate bus lines are non-active.

In this circuit, SW1 is VGH (ON voltage of gate signal) or VGL (OFF voltage of gate signal).
Voltage) is a switch for selecting one of the signals
W2 is a switch for selecting COM (ON voltage of the counter electrode signal) or for setting the connection state to a non-connection state (high impedance state). The delay circuit 31 includes gate signals G1, G
The counter electrode signals C1, C
.. Are activated (ON voltage) or in a high impedance state. The amount of delay at this time substantially corresponds to the delay time of the gate signal in the liquid crystal panel. This is to prevent the counter electrode signal C1 or the like from entering a high impedance state before the gate signal G1 or the like is completely turned off.

First, SW1 and SW2 are changed based on the signal received from the control circuit 1. For example, if the gate bus line G1 and the counter electrode bus line C1 are active (ON), VGH (gate signal ON voltage) and COH (counter electrode signal) are output to G1 and C1, respectively. The signal is output to the counter electrode bus line C1 via the delay circuit 31 in order to output the signal at an optimum timing. At this time, the other gate bus lines G2, G3,... And the counter electrode bus lines C2, C3,.
FF voltage) and OPEN (high impedance) are output.

Accordingly, the COH (opposite electrode signal) output state is to output three levels of an ON state (Hi level / Lo level) and an OFF state (high impedance) of two levels.

With such a circuit configuration, both the gate signal and the counter electrode signal can be scanned by the same (single) shift register, and there is no need to provide a separate shift register for scanning the counter electrode signal. Further, the timing of the gate signal and the counter electrode signal can be accurately adjusted.

Although the above embodiment has been described with reference to the case where black display is performed, the present invention is also applicable to the case where white display or gradation display is performed. Further, the auxiliary capacitance 9 has a capacitance between the auxiliary capacitance 9 and the counter electrode, but a configuration having a capacitance between the auxiliary capacitance 9 and the gate bus line is also applicable.

[0053]

As described in detail above, according to the present invention,
Counter electrodes provided opposite to the picture element electrodes are divided into the same number as the gate bus lines and arranged in parallel with the gate bus lines, and the respective counter electrode portions are insulated from each other so that an arbitrary voltage is individually applied. In the liquid crystal display device configured as described above, an ON voltage is applied only to the counter electrode portion corresponding to the gate bus line in the ON state, and the corresponding counter electrode portion is turned OFF when the gate bus line is in the OFF state. In the (high impedance) state, the liquid crystal applied voltage can be held. Therefore, unnecessary charging and discharging of current is eliminated, and power consumption can be significantly reduced.

The ON voltage only needs to be applied to the counter electrode portion corresponding to the gate bus line in the ON state, and the gate bus line is not affected by the parasitic capacitance when the OFF voltage is applied to the gate bus line. Can be driven by the DC voltage, and the power consumption of the counter electrode drive circuit itself can be greatly reduced. Further, power consumption due to a leak current or the like in the liquid crystal panel can be reduced.

Further, even if the opposing electrode is divided, only the opposing electrode portion corresponding to the gate bus line in the ON state is turned on.
It suffices to apply a voltage, and only one circuit is required by switching the counter electrode driving circuit with a small current by switching. Therefore, it is possible to reduce the cost and the area occupied by the circuit in the circuit board.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration inside a liquid crystal panel and a configuration of peripheral circuits thereof in a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a timing chart for explaining an operation of each signal in a specific picture element in the liquid crystal display device according to one embodiment of the present invention.

FIG. 3 is a block diagram showing a circuit configuration inside a liquid crystal panel and a configuration of peripheral circuits thereof in a conventional liquid crystal display device.

FIG. 4 is a timing chart for explaining an operation of each signal in a specific picture element in a conventional liquid crystal display device.

FIG. 5 is a block diagram showing a transmission circuit around a TFT element.

FIG. 6 is a block diagram showing an example of an internal configuration of a gate / counter electrode drive circuit 3 in a liquid crystal display device according to an embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Control circuit 2 Source electrode drive circuit 3 Gate / counter electrode drive circuit 4 Gate bus line 5 Counter electrode bus line 6 Source bus line line 7 TFT element 8 Liquid crystal capacitor 9 Auxiliary capacitor 10 Gate electrode drive circuit 11 Counter electrode drive circuit 12, 20 Timing chart of gate signal 13, 21 Timing chart of counter electrode signal 15, 22 Liquid crystal applied voltage 16 17 Liquid crystal applied voltage 17 whose polarity is opposite to 16 Liquid crystal applied voltage 16 and 18 whose polarity is opposite 18 and 18a Timing chart of pixel electrode potential 19 OFF (high impedance) state of the counter electrode 23 Parasitic capacitance between gate and source 24 Parasitic capacitance between gate and drain 25 Parasitic capacitance between source and drain 31 Delay circuit G1 First line gate bus line G2 Second line Gate bus line Gnn nth line Gate bus line S1 First source bus line S2 Second source bus line Sm Mth source bus line VCOM Common counter electrode C1 First counter electrode bus line C2 Second counter electrode bus line Cn Nth line counter electrode bus line G Gate of TFT element S Source of TFT element D Drain of TFT element SW1, SW2 Switch

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 624 G09G 3/20 624C F term (Reference) 2H092 JA24 JB14 NA26 PA06 2H093 NA16 NA32 NA33 NB12 NB13 NC09 NC18 NC34 NC35 NC49 ND39 ND49 ND54 NE03 5C006 AA16 AC11 AC22 AF42 AF69 BB16 FA47 5C080 AA10 BB05 DD26 EE25 FF11 JJ02 JJ03 JJ04 5C094 AA15 AA22 AA44 BA03 BA43 CA19 DA09 EA04 EA05 HA02 HA02

Claims (7)

[Claims] 1. A plurality of gate bus lines and a plurality of source bus lines are arranged on one of a pair of substrates opposed to each other with a liquid crystal layer interposed therebetween through an insulating film. A switching element electrically connected to the gate bus line and the source bus line, and a switching element electrically connected to the switching element in each of the matrix regions separated by the gate bus line and the source bus line; A counter electrode provided on the other substrate in opposition to the picture element electrode is divided into the same number as the gate bus lines and arranged in parallel with the gate bus lines. An opposing electrode portion is a liquid crystal display device which is insulated from each other and given an arbitrary voltage, wherein an ON voltage is applied to a certain n-th gate bus line, and the gate bus line When the electrically connected switching element is in the ON state, only the counter electrode corresponding to the n-th gate bus line is turned ON in accordance with the timing. A voltage is applied, an OFF voltage is applied to the n-th gate bus line, a switching element electrically connected to the gate bus line is turned off, and the next (n + 1) th and subsequent gate bus lines are turned on. When a voltage is applied, the switching element electrically connected to the gate bus line
A liquid crystal display device in which the counter electrode portion corresponding to the nth gate bus line is in a high impedance state when in the N state. 2. An n-th gate bus line and n + 1
The pixel electrode connected via the switching element electrically connected to the nth gate bus line performs a line inversion by setting the drive voltage to the opposite polarity for each adjacent gate bus line line, and performs a certain nth opposition. 2. The liquid crystal display device according to claim 1, wherein voltages of opposite polarities are respectively applied to the electrode portion and the (n + 1) th counter electrode portion in a reversed manner for each frame. 3. The liquid crystal display device according to claim 1, wherein a DC signal is applied as an OFF signal of the gate bus line. 4. The semiconductor device according to claim 1, further comprising one counter electrode driving circuit, wherein an ON voltage is supplied only to a predetermined counter electrode portion by switching the counter electrode driving circuit. Liquid crystal display device. 5. The liquid crystal display device according to claim 4, wherein said counter electrode drive circuit also functions as a gate electrode drive circuit for supplying a voltage to said gate bus line. 6. A driving circuit used in the liquid crystal display device according to claim 1, wherein the driving circuit drives the counter electrode, and applies an ON voltage only to a predetermined counter electrode portion by switching. Drive circuit to supply. 7. The driving circuit according to claim 6, wherein a voltage is also supplied to said gate bus line.