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JP2001272433A - Method and apparatus for test of semiconductor device - Google Patents

Method and apparatus for test of semiconductor device

Info

Publication number
JP2001272433A
JP2001272433A JP2000086842A JP2000086842A JP2001272433A JP 2001272433 A JP2001272433 A JP 2001272433A JP 2000086842 A JP2000086842 A JP 2000086842A JP 2000086842 A JP2000086842 A JP 2000086842A JP 2001272433 A JP2001272433 A JP 2001272433A
Authority
JP
Japan
Prior art keywords
semiconductor device
temperature
measuring
resistance value
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2000086842A
Other languages
Japanese (ja)
Inventor
Yasunobu Saito
泰伸 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000086842A priority Critical patent/JP2001272433A/en
Publication of JP2001272433A publication Critical patent/JP2001272433A/en
Abandoned legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method and an apparatus, for the test of a semiconductor device, in which the temperature of the semiconductor device during an electrification test can be measured with good accuracy. SOLUTION: A bias power supply which applies a bias voltage to the semiconductor device is installed. A heater which heats the semiconductor device is installed. In order to measure the temperature of the semiconductor device, a metal wire 24 whose resistance value is changed by a temperature is installed in parallel with a gate electrode 23.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、加熱し通電した状
態で半導体装置を試験する半導体装置の試験方法および
試験装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device testing method and apparatus for testing a semiconductor device while being heated and energized.

【0002】[0002]

【従来の技術】電界効果トランジスタなどの半導体装置
の信頼性を評価する1つの試験方法として、従来、高温
通電試験が用いられている。高温通電試験は、半導体装
置を加熱し、かつ、半導体装置にバイアス電圧を印加し
た状態で行われる。
2. Description of the Related Art As one test method for evaluating the reliability of a semiconductor device such as a field-effect transistor, a high-temperature conduction test has conventionally been used. The high-temperature energization test is performed in a state where the semiconductor device is heated and a bias voltage is applied to the semiconductor device.

【0003】ここで、従来の半導体装置の試験方法につ
いて、高温通電試験を例にとり図3を参照して説明す
る。符号31はヒータで、ヒータ31にヒータ用電源3
2が接続されている。ヒータ31上に保持板33が配置
され、保持板33上に被試験体たとえば半導体装置34
が配置されている。半導体装置34を構成するたとえば
3個の電極に接続された端子T1〜T3はそれぞれバイ
アス電源35に接続されている。
Here, a conventional method for testing a semiconductor device will be described with reference to FIG. 3 taking a high-temperature conduction test as an example. Reference numeral 31 denotes a heater.
2 are connected. A holding plate 33 is arranged on the heater 31, and a device under test such as a semiconductor device 34 is placed on the holding plate 33.
Is arranged. Terminals T1 to T3 connected to, for example, three electrodes of the semiconductor device 34 are connected to a bias power supply 35, respectively.

【0004】上記した構成において、ヒータ用電源32
からヒータ31に電流を流すと、ヒータ31が熱を発生
する。ヒータ31の熱は保持板33を介して半導体装置
34に伝わり、半導体装置34は、室温よりも高い温度
まで上昇する。同時に、半導体装置34に対し、バイア
ス電源35からバイアス電圧が供給される。
In the above configuration, the heater power supply 32
When a current flows from the heater 31 to the heater 31, the heater 31 generates heat. The heat of the heater 31 is transmitted to the semiconductor device 34 via the holding plate 33, and the semiconductor device 34 rises to a temperature higher than room temperature. At the same time, a bias voltage is supplied from a bias power supply 35 to the semiconductor device 34.

【0005】上記したように半導体装置34を加熱し、
同時に、バイアス電圧を供給する高温通電試験を所望の
時間行い、たとえば試験前後の半導体素子の特性の変化
から、半導体装置の信頼性が推定される。
As described above, the semiconductor device 34 is heated,
At the same time, a high-temperature energization test for supplying a bias voltage is performed for a desired time, and the reliability of the semiconductor device is estimated from, for example, a change in the characteristics of the semiconductor element before and after the test.

【0006】[0006]

【発明が解決しようとする課題】従来の半導体装置の試
験方法は半導体装置を加熱した状態で行っている。この
場合、高温通電試験中における半導体装置の温度を正確
に測定することが、半導体装置の信頼性を評価をする上
で重要になっている。
The conventional method of testing a semiconductor device is performed while the semiconductor device is heated. In this case, it is important to accurately measure the temperature of the semiconductor device during the high-temperature conduction test in order to evaluate the reliability of the semiconductor device.

【0007】一般に、高温通電試験中の半導体装置の温
度は、 半導体装置の温度=外部ヒータの温度+半導体装置の自己発熱温度…(1) で表される。
Generally, the temperature of a semiconductor device during a high-temperature energization test is represented by the following equation: temperature of semiconductor device = temperature of external heater + self-heating temperature of semiconductor device.

【0008】半導体装置の自己発熱温度は、理論上、通
電によって半導体装置が発熱する自己発熱と、半導体装
置から保持板303(図3)に流れ出す熱とが釣り合う
温度となる。
The self-heating temperature of the semiconductor device is theoretically a temperature at which the self-heating generated by the semiconductor device due to energization and the heat flowing from the semiconductor device to the holding plate 303 (FIG. 3) are balanced.

【0009】(1)式の半導体装置の自己発熱温度、す
なわちバイアスを印加した状態での自己発熱温度は、試
験を行う前にIR法などを用いて、何個かの半導体装置
について測定が行われる。この方法で測定された値を用
いて、試験中における実際の半導体装置の温度が推定さ
れている。
The self-heating temperature of the semiconductor device of the formula (1), that is, the self-heating temperature in a state in which a bias is applied, is measured for several semiconductor devices by using an IR method or the like before performing a test. Will be Using the value measured by this method, the actual temperature of the semiconductor device during the test is estimated.

【0010】しかし、半導体装置の発熱量は特性のばら
つきによって相違がある。また、IR法などを用いて自
己発熱温度を測定した状態と高温通電試験時における周
囲の状態との違いから自己発熱温度に相違がある。ま
た、ヒータにも温度分布があり加熱温度が場所によって
相違する。このような相違から、推定された半導体装置
の温度と実際の試験時の温度とに食い違いが生じ、試験
結果に誤差を発生させる原因になっている。
However, the amount of heat generated by the semiconductor device varies depending on variations in characteristics. Further, there is a difference in the self-heating temperature due to a difference between a state in which the self-heating temperature is measured by using the IR method or the like and a surrounding state in the high-temperature energization test. Further, the heater also has a temperature distribution, and the heating temperature differs depending on the location. Due to such a difference, a discrepancy occurs between the estimated temperature of the semiconductor device and the temperature at the time of the actual test, which causes an error in the test result.

【0011】本発明は、上記した欠点を解決し、通電試
験中の半導体装置の温度を精度よく測定できる半導体装
置の試験方法および試験装置を提供することを目的とす
る。
SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned drawbacks and to provide a semiconductor device test method and a test apparatus capable of accurately measuring the temperature of a semiconductor device during a conduction test.

【0012】[0012]

【課題を解決するための手段】本発明の半導体装置の試
験方法は、半導体装置の各電極にバイアス電圧を印加す
る第1工程と、前記半導体装置を加熱する第2工程と、
前記半導体装置にバイアス電圧を印加し、前記半導体装
置を加熱した状態で、温度によって抵抗値が変化する金
属線の抵抗値を測定し、前記半導体装置の温度を測定す
る第3工程とからなっている。
A method of testing a semiconductor device according to the present invention includes a first step of applying a bias voltage to each electrode of the semiconductor device, a second step of heating the semiconductor device,
Applying a bias voltage to the semiconductor device, measuring the resistance value of a metal wire having a resistance value that changes with temperature while heating the semiconductor device, and measuring the temperature of the semiconductor device. I have.

【0013】本発明は、半導体装置にバイアス電圧を印
加するバイアス電源と、前記半導体装置を加熱するヒー
タとを具備した半導体装置の試験装置において、温度に
よって抵抗値が変化する金属線を設けたことを特徴とし
ている。
According to the present invention, in a test apparatus for a semiconductor device having a bias power supply for applying a bias voltage to the semiconductor device and a heater for heating the semiconductor device, a metal wire whose resistance value changes with temperature is provided. It is characterized by.

【0014】[0014]

【発明の実施の形態】本発明の実施形態について図1の
回路構成図を参照して説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the circuit diagram of FIG.

【0015】符号11はヒータで、ヒータ11にヒータ
用電源12が接続されている。ヒータ11上に保持板1
3が配置され、保持板13上に被試験体、たとえば電界
効果トランジスタなどの半導体装置14が配置されてい
る。図2の場合、半導体装置14は、電界効果トランジ
スタなどの素子をパッケージに収納した状態で示されて
いる。
Reference numeral 11 denotes a heater to which a heater power supply 12 is connected. Holding plate 1 on heater 11
3, and a device under test, for example, a semiconductor device 14 such as a field effect transistor is disposed on the holding plate 13. In the case of FIG. 2, the semiconductor device 14 is shown in a state where elements such as a field effect transistor are housed in a package.

【0016】半導体装置14には、たとえば電界効果ト
ランジスタの場合、そのゲート電極に接続されたゲート
リード端子Gおよびソース電極に接続されたソースリー
ド端子S、ドレイン電極に接続されたドレインリード端
子Dが設けられている。ゲートリード端子Gおよびソー
スリード端子Sはバイアス電源15aに接続され、ソー
スリード端子Sおよびドレインリード端子Dはバイアス
電源15bに接続されている。
In the semiconductor device 14, for example, in the case of a field effect transistor, a gate lead terminal G connected to its gate electrode, a source lead terminal S connected to a source electrode, and a drain lead terminal D connected to a drain electrode are provided. Is provided. The gate lead terminal G and the source lead terminal S are connected to a bias power supply 15a, and the source lead terminal S and the drain lead terminal D are connected to a bias power supply 15b.

【0017】また、半導体装置14には、半導体装置1
4内に配置された温度測定素子、たとえば温度によって
抵抗が変化する金属線(図示せず)に接続された温度測
定用リード端子t1、t2が設けられている。リード端
子t1、t2には金属線の抵抗値を測定する測定器16
が接続されている。
The semiconductor device 14 includes the semiconductor device 1.
4, temperature measuring lead terminals t1 and t2 connected to a temperature measuring element, for example, a metal wire (not shown) whose resistance changes with temperature are provided. A measuring device 16 for measuring the resistance value of the metal wire is provided at the lead terminals t1 and t2.
Is connected.

【0018】ヒータ用電源12およびバイアス電源15
a、15b、測定器16は、それぞれが電気的に接続し
ない独立した回路として形成され、各回路が他の回路に
影響を与えない構成になっている。
Power supply 12 for heater and bias power supply 15
The a, 15b, and the measuring device 16 are formed as independent circuits that are not electrically connected to each other, and each circuit does not affect other circuits.

【0019】ここで、上記した半導体装置14部分の構
造について図2の平面図を参照して説明する。半導体装
置14は、たとえば電界効果トランジスタで構成され、
両側にソース電極21およびドレイン電極22が配置さ
れ、ソース電極21およびドレイン電極22で挟まれた
中央にゲート電極23が位置している。ソース電極21
はソースリード端子S(図1)に接続され、ドレイン電
極22はドレインリード端子D(図1)に接続され、ゲ
ート電極23は電極パッド23aを介してゲートリード
端子G(図1)に接続されている。
Here, the structure of the semiconductor device 14 will be described with reference to the plan view of FIG. The semiconductor device 14 is formed of, for example, a field-effect transistor,
A source electrode 21 and a drain electrode 22 are arranged on both sides, and a gate electrode 23 is located at the center between the source electrode 21 and the drain electrode 22. Source electrode 21
Is connected to the source lead terminal S (FIG. 1), the drain electrode 22 is connected to the drain lead terminal D (FIG. 1), and the gate electrode 23 is connected to the gate lead terminal G (FIG. 1) via the electrode pad 23a. ing.

【0020】また、半導体装置14のゲート電極23と
ほぼ平行に、ソース電極21およびドレイン電極22で
挟まれた領域を一方の側から他方の側へと横切って温度
測定素子、たとえば温度によって抵抗が変化する金属線
24が配置されている。金属線24の両端は温度測定用
電極25a、25bに接続され、温度測定用電極25
a、25bは、それぞれ温度測定用リード端子t1、t
2(図1)に接続されている。
A temperature measuring element, for example, a resistance depending on temperature, crosses a region between the source electrode 21 and the drain electrode 22 from one side to the other side substantially in parallel with the gate electrode 23 of the semiconductor device 14. A changing metal line 24 is arranged. Both ends of the metal wire 24 are connected to the electrodes 25a and 25b for temperature measurement.
a and 25b are lead terminals t1 and t for temperature measurement, respectively.
2 (FIG. 1).

【0021】上記した構成の半導体装置14および金属
線24は、たとえばパッケージ(図示せず)などに収納
される。
The semiconductor device 14 and the metal wires 24 having the above-described configurations are housed in a package (not shown), for example.

【0022】上記した構成において、ヒータ用電源12
からヒータ11に電流を流す。このとき、ヒータ11が
熱を発生し、この熱が保持板13を介して半導体装置1
4に伝わり、半導体装置14の温度を室温よりも高い温
度に上昇させる。同時に、半導体装置14を構成する半
導体素子、たとえば電界効果トランジスタの各電極に対
し、バイアス電源15a、15bからバイアス電圧が供
給される。
In the above configuration, the power supply 12 for the heater
From the heater 11 to the heater 11. At this time, the heater 11 generates heat, and this heat is transmitted through the holding plate 13 to the semiconductor device 1.
4 to raise the temperature of the semiconductor device 14 to a temperature higher than room temperature. At the same time, a bias voltage is supplied from a bias power supply 15a, 15b to each electrode of a semiconductor element constituting the semiconductor device 14, for example, a field effect transistor.

【0023】このように半導体装置14を加熱し、同時
に、バイアス電圧を供給する高温通電試験を所望の時間
行い、たとえば試験前後の半導体装置14の特性の変化
から、半導体装置14の信頼性が推定される。この場
合、金属線24(図2)の抵抗値を測定器16(図1)
で測定し、半導体装置14の温度が測定される。
As described above, the semiconductor device 14 is heated, and at the same time, a high-temperature energization test for supplying a bias voltage is performed for a desired time. For example, the reliability of the semiconductor device 14 is estimated from a change in characteristics of the semiconductor device 14 before and after the test. Is done. In this case, the resistance value of the metal wire 24 (FIG. 2) is measured with the measuring device 16 (FIG. 1).
And the temperature of the semiconductor device 14 is measured.

【0024】上記した構成によれば、たとえば半導体装
置を構成するパッケージ内に組み込まれた金属線の抵抗
値を測定器で測定し、金属線の室温からの抵抗値の変化
量を求め半導体装置の温度を直接測定している。したが
って、半導体装置に特性の相違がある場合、および、ヒ
ータに温度分布がある場合、半導体装置の推定温度と実
際の試験温度とに相違がある場合でも、これらに関係な
く半導体装置の温度が正しく測定される。その結果、精
度の高い信頼性試験が行える。
According to the above configuration, for example, the resistance value of the metal wire incorporated in the package forming the semiconductor device is measured by the measuring device, and the amount of change in the resistance value of the metal wire from room temperature is determined. The temperature is measured directly. Therefore, when there is a difference in characteristics between semiconductor devices, when there is a temperature distribution in the heater, and when there is a difference between the estimated temperature of the semiconductor device and the actual test temperature, the temperature of the semiconductor device is correctly Measured. As a result, a highly accurate reliability test can be performed.

【0025】また、測定器16が接続された回路は、ヒ
ータ用電源12やバイアス電源15a、15bと電気的
に接続しない独立した回路として形成されている。した
がって、測定器16は、ヒータ用電源12のオン、オフ
動作やバイアス電源15の電源電圧の影響がなく、良好
な測定結果が得られる。
The circuit to which the measuring device 16 is connected is formed as an independent circuit that is not electrically connected to the heater power supply 12 or the bias power supplies 15a and 15b. Therefore, the measuring device 16 is not affected by the ON / OFF operation of the heater power supply 12 or the power supply voltage of the bias power supply 15, and a good measurement result can be obtained.

【0026】なお、金属線は任意の位置に配置できる。
しかし、半導体装置が温度分布を持つ場合には、温度の
高い場所もしくはそれに近い場所に配置することが望ま
しい。たとえば、半導体装置が電界効果トランジスタの
場合、ゲート電極の近くの温度が高くなるため、図2に
示しように、ゲート電極と平行に配置する方法が有効で
ある。
The metal wire can be arranged at any position.
However, in the case where the semiconductor device has a temperature distribution, it is desirable to dispose the semiconductor device in a place where the temperature is high or a place close thereto. For example, when the semiconductor device is a field-effect transistor, the temperature near the gate electrode increases, so that a method of arranging the semiconductor device in parallel with the gate electrode as shown in FIG. 2 is effective.

【0027】上記の実施形態では、半導体装置を構成す
る半導体素子として電界効果トランジスタの場合で説明
している。しかし、本発明は、電界効果トランジスタに
限らず、バイポーラトランジスタやその他の集積回路
(IC、LSI等) などの半導体装置についても適用で
きる。また、半導体装置が、半導体素子をパッケージに
組み込んだ構造の場合で説明しているが、本発明は、半
導体装置を構成する半導体素子がウエハの状態について
も適用できる。しかし、半導体装置が、半導体素子をパ
ッケージに組み込まれ、温度によって抵抗値が変化する
金属線もパッケージ内に組み込んだ構造の方が、半導体
装置の温度をより正確に測定できる利点がある。
In the above embodiment, the case where the semiconductor element constituting the semiconductor device is a field effect transistor is described. However, the present invention is not limited to a field-effect transistor, but is also applicable to semiconductor devices such as bipolar transistors and other integrated circuits (ICs, LSIs, etc.). Further, the case where the semiconductor device has a structure in which the semiconductor element is incorporated in a package has been described, but the present invention can also be applied to a state where the semiconductor element constituting the semiconductor device is in a wafer state. However, a structure in which a semiconductor device is incorporated in a package with a semiconductor element incorporated therein and a metal wire whose resistance value changes with temperature is also incorporated in the package has an advantage that the temperature of the semiconductor device can be measured more accurately.

【0028】[0028]

【発明の効果】本発明によれば、高精度の高温通電試験
が行える半導体装置の試験方法および試験装置を実現で
きる。
According to the present invention, a test method and a test apparatus for a semiconductor device capable of performing a high-precision high-temperature conduction test can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態を説明するための概略の構造
図である。
FIG. 1 is a schematic structural diagram for explaining an embodiment of the present invention.

【図2】本発明に使用される半導体装置を示す平面図で
ある。
FIG. 2 is a plan view showing a semiconductor device used in the present invention.

【図3】従来例を説明するための概略の構造図である。FIG. 3 is a schematic structural diagram for explaining a conventional example.

【符号の説明】[Explanation of symbols]

11…ヒータ 12…ヒータ用電源 13…保持板 14…半導体装置 15a、15b…バイアス電源 16…測定器 21…ソース電極 22…ドレイン電極 23…ゲート電極 24…金属線 DESCRIPTION OF SYMBOLS 11 ... Heater 12 ... Heater power supply 13 ... Holding plate 14 ... Semiconductor device 15a, 15b ... Bias power supply 16 ... Measuring instrument 21 ... Source electrode 22 ... Drain electrode 23 ... Gate electrode 24 ... Metal wire

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 半導体装置の各電極にバイアス電圧を印
加し、前記半導体装置を加熱した状態で、前記半導体装
置内に設けた温度によって抵抗値が変化する金属線の抵
抗値を測定し、前記半導体装置の温度を測定することを
特徴とする半導体装置の試験方法。
1. A method of applying a bias voltage to each electrode of a semiconductor device, measuring a resistance value of a metal wire provided in the semiconductor device, the resistance value of which changes according to a temperature, while heating the semiconductor device, A method for testing a semiconductor device, comprising measuring a temperature of the semiconductor device.
【請求項2】 半導体装置の各電極にバイアス電圧を印
加し、前記半導体装置を加熱した状態で、前記半導体装
置を構成するパッケージ内に収納した温度によって抵抗
値が変化する金属線の抵抗値を測定することを特徴とす
る半導体装置の試験方法。
2. A method for applying a bias voltage to each electrode of a semiconductor device, wherein the resistance value of a metal wire whose resistance value changes according to the temperature stored in a package forming the semiconductor device in a state where the semiconductor device is heated is determined. A method for testing a semiconductor device, comprising measuring.
【請求項3】 半導体装置の各電極にバイアス電圧を印
加するバイアス電源と、前記半導体装置を加熱するヒー
タと、前記半導体装置内に設けた温度によって抵抗値が
変化する金属線とを具備したことを特徴とする半導体装
置の試験装置。
3. A semiconductor device comprising: a bias power supply for applying a bias voltage to each electrode of the semiconductor device; a heater for heating the semiconductor device; and a metal wire provided in the semiconductor device and having a resistance value that changes with temperature. A testing device for a semiconductor device, comprising:
【請求項4】 半導体装置の各電極にバイアス電圧を印
加するバイアス電源と、前記半導体装置を加熱するヒー
タと、温度によって抵抗値が変化する金属線が前記半導
体装置内に設けられ、この金属線の抵抗値を測定するこ
とによって前記半導体装置の温度を測定する測定手段と
を具備したことを特徴とする半導体装置の試験装置。
4. A semiconductor device comprising: a bias power supply for applying a bias voltage to each electrode of the semiconductor device; a heater for heating the semiconductor device; and a metal wire having a resistance value which varies depending on the temperature. A measuring device for measuring the temperature of the semiconductor device by measuring the resistance value of the semiconductor device.
【請求項5】 半導体装置が電界効果トランジスタであ
り、前記電界効果トランジスタのゲート電極と平行に前
記金属線が配置されたことを特徴とする請求項3または
請求項4記載の半導体装置の試験装置。
5. The test apparatus for a semiconductor device according to claim 3, wherein the semiconductor device is a field-effect transistor, and wherein the metal line is arranged in parallel with a gate electrode of the field-effect transistor. .
【請求項6】 半導体装置が電界効果トランジスタであ
り、この電界効果トランジスタのソース電極とドレイン
電極との間で、かつ、ゲート電極と平行に前記金属線が
配置されたことを特徴とする請求項3または請求項4記
載の半導体装置の試験装置。
6. The semiconductor device according to claim 1, wherein the semiconductor device is a field-effect transistor, and the metal line is arranged between a source electrode and a drain electrode of the field-effect transistor and parallel to a gate electrode. The semiconductor device test apparatus according to claim 3 or 4.
【請求項7】 半導体装置の各電極にバイアス電圧を印
加するバイアス電源と、前記半導体装置を加熱するヒー
タと、前記半導体装置を構成するパッケージ内に設けた
温度によって抵抗値が変化する金属線とを具備したこと
を特徴とする半導体装置の試験装置。
7. A semiconductor device, comprising: a bias power supply for applying a bias voltage to each electrode of the semiconductor device; a heater for heating the semiconductor device; and a metal wire provided in a package constituting the semiconductor device, the resistance of which changes depending on the temperature. A testing device for a semiconductor device, comprising:
【請求項8】 半導体装置の各電極にバイアス電圧を印
加するバイアス電源と、前記半導体装置を加熱するヒー
タと、温度によって抵抗値が変化する金属線が前記半導
体装置を構成するパッケージ内に設けられ、この金属線
の抵抗値を測定することによって前記半導体装置の温度
を測定する測定手段とを具備したことを特徴とする半導
体装置の試験装置。
8. A package comprising the semiconductor device, comprising: a bias power supply for applying a bias voltage to each electrode of the semiconductor device; a heater for heating the semiconductor device; and a metal wire having a resistance value which varies depending on the temperature. A measuring device for measuring the temperature of the semiconductor device by measuring a resistance value of the metal wire.
【請求項9】 金属線の抵抗値を測定することにより前
記半導体装置の温度を測定する測定手段の回路が、前記
半導体装置の各電極に電圧印加するバイアス電源の回
路、および、前記半導体装置を加熱するヒータの回路と
から独立していることを特徴とする請求項4または請求
項8記載の半導体装置の試験装置。
9. A circuit of a measuring means for measuring a temperature of the semiconductor device by measuring a resistance value of a metal wire, comprising: a circuit of a bias power supply for applying a voltage to each electrode of the semiconductor device; 9. The test apparatus for a semiconductor device according to claim 4, wherein the test apparatus is independent of a heater circuit for heating.
JP2000086842A 2000-03-27 2000-03-27 Method and apparatus for test of semiconductor device Abandoned JP2001272433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000086842A JP2001272433A (en) 2000-03-27 2000-03-27 Method and apparatus for test of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000086842A JP2001272433A (en) 2000-03-27 2000-03-27 Method and apparatus for test of semiconductor device

Publications (1)

Publication Number Publication Date
JP2001272433A true JP2001272433A (en) 2001-10-05

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ID=18602944

Family Applications (1)

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104852696A (en) * 2014-02-17 2015-08-19 三菱电机株式会社 High-frequency power amplifier and method for manufacturing the same
CN116298766A (en) * 2023-05-16 2023-06-23 成都思科瑞微电子股份有限公司 Test method of insulated gate field effect transistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104852696A (en) * 2014-02-17 2015-08-19 三菱电机株式会社 High-frequency power amplifier and method for manufacturing the same
JP2015154353A (en) * 2014-02-17 2015-08-24 三菱電機株式会社 High frequency power amplifier and method of manufacturing the same
CN116298766A (en) * 2023-05-16 2023-06-23 成都思科瑞微电子股份有限公司 Test method of insulated gate field effect transistor

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