JP2001244367A - Wiring board with built-in electric element - Google Patents

Abstract

(57) Abstract: An electric element such as a capacitor is built in an insulating substrate. Even after heat treatment such as solder reflow, the connection reliability between the electric element and the wiring circuit layer is excellent, and the electric element is used. To obtain a wiring board with a built-in electric element which does not change its function and has excellent reliability. An insulating substrate containing at least an organic resin is provided.
Via-hole conductors 10, 1, each of which has a plurality of wiring circuit layers 8, 9 on its surface or inside and a metal component filled in the via-holes.
And an electric element 3 such as a capacitor having at least a pair of terminal electrodes 6a and 6b in the insulating substrate 1.
, A terminal board 6a, 6b of the electrical element 3 and a via-hole conductor 10,
11 and the terminal electrode 6
a, 6b and via-hole conductors 10, 11
An intermetallic compound of Cu and Sn such as Cu ₃ Sn or Cu ₆ Sn ₅ is present.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board with a built-in electric element in which an electronic component such as an LSI chip can be mounted on the surface and an electric element such as a capacitor is built in an insulating substrate.

[0002]

2. Description of the Related Art In recent years, with the widespread use of communication devices, electronic devices that require high-speed operation have been widely used, and with this, packages capable of high-speed operation have been demanded. In order to perform such high-speed operation, it is necessary to reduce electric signal noise as much as possible. For this purpose, it is necessary to reduce the inductance of the wiring section by disposing a passive electronic component such as a capacitor near the active electronic element and reducing the wiring length of the electronic circuit as much as possible.

As a method for addressing such a problem, for example, Japanese Patent Application Laid-Open No. 2-121393 proposes a method in which a chip-shaped capacitor is embedded in an insulating layer between a power supply layer and a ground layer. Also, Japanese Patent Application Laid-Open No.
No. 2 proposes a wiring board in which a semiconductor element and a capacitor are built in an insulating substrate.

[0004]

However, in the structure disclosed in JP-A-2-121393, the ceramic chip capacitor embedded between the power supply layer pattern and the ground layer pattern is held in the surrounding insulating layer. However, since the connection between the terminal electrode of the capacitor and the power supply layer or ground layer inside the board is by pressure welding, the terminal electrode and the wiring circuit layer are caused by thermal expansion difference due to the thermal shock. Japanese Patent Application Laid-Open No. H11-220262 proposes connecting electrodes and the like of a semiconductor element and a wiring circuit layer with a conductor such as gold, silver, copper, nickel, or solder. However, when electronic components such as semiconductor elements are mounted on the surface of the wiring board by soldering, when the wiring board is reflowed at a temperature of 220 to 300 ° C. Connectivity between the terminal electrode and the wiring circuit layer has a problem that varies. In particular, when the built-in element is a capacitor, the inductance of the capacitor increases, and there is a problem that the function of removing noise by the capacitor changes or deteriorates.

Accordingly, the present invention has a structure in which an electric element such as a capacitor is built in an insulating substrate. Even after solder reflow when mounting an electronic component on the surface, the built-in electric element and the wiring board are connected to each other. An object of the present invention is to provide a wiring board with a built-in electric element which maintains the connectivity with a wiring circuit layer and has excellent reliability without changing the function of the built-in electric element.

[0006]

Means for Solving the Problems As a result of repeated studies on the above problems, the present inventors have found that an insulating substrate containing at least an organic resin and a plurality of insulating substrates formed on the surface and / or inside of the insulating substrate are provided. Element having a wiring circuit layer, a via-hole conductor provided inside an insulating substrate and filled with a metal component in a via-hole, and an electric element having at least a pair of terminal electrodes in the insulating substrate. A built-in wiring board, wherein a terminal electrode of the electric element is directly connected to the via-hole conductor, and an intermetallic compound of Cu and Sn is present at a connection portion between the terminal electrode and the via-hole conductor. Thereby, the connection reliability between the electric element and the via-hole conductor can be improved.

In the present invention, Cu and Sn are contained as metal components in the via-hole conductor, and
It is desirable that the content ratio of (/ Cu + Sn) be 0.5 to 0.95 and that a conductor layer containing at least Sn be formed on the outermost surface of the terminal electrode of the electric element.

Further, the connection reliability can be further improved by making the area of the connection surface of the terminal electrode of the electric element with the via-hole conductor larger than the cross-sectional area of the via-hole conductor.

The electric element may be a monolithic ceramic capacitor, in particular, the terminal electrode may be composed of two or more positive electrodes and two or more positive electrodes.
It is desirable to have more than two negative electrodes in order to reduce inductance.

According to the present invention, an electric element is built in an insulating substrate, and when connecting the terminal electrode and the via-hole conductor, a Cu-Sn intermetallic compound is generated at the connection portion. A Sn-containing conductor layer is formed on the outermost surface of the terminal electrode of the electric element, Cu and Sn are contained in the via-hole conductor, and the via-hole conductor is heated at a temperature of 210 ° C. or more. Reacts with the metal component mainly composed of Sn and Cu and Sn of the terminal electrode of the capacitor, and at the connection between the via-hole conductor and the terminal electrode of the capacitor, in addition to Cu and Sn, Cu ₃ S
n or an intermetallic compound of Cu—Sn such as Cu ₆ Sn ₅ having high electric conductivity and excellent heat resistance is generated. As a result, the electrical connection between the via-hole conductor and the terminal electrode of the capacitor is improved, Even if rapid heating is applied from the outside such as during reflow, the connectivity between the terminal electrode and the via-hole conductor does not change, preventing an increase in inductance due to a capacitor or the like and constantly exhibiting a stable function. .

[0011]

FIG. 1 is a schematic sectional view showing an embodiment of a wiring board with a built-in electric element according to the present invention. In the wiring board A according to the present invention, a cavity 2 is formed inside an insulating substrate 1, and a capacitor element 3 is built in the cavity 2 as an electric element. Electronic components such as the semiconductor element 4 are mounted on the surface of the wiring board A directly above the wiring board A in which the capacitor element 3 is built.

In the wiring board shown in FIG.
The capacitor element 3 incorporated therein has two or more positive electrodes and two or more negative electrodes. One example of such a capacitor element 3 is shown in the schematic perspective view of FIG.
The capacitor element 3 shown in FIG. 2 is a laminated ceramic capacitor composed of a rectangular parallelepiped laminate formed by laminating ceramic dielectric layers 5 mainly composed of BaTiO ₃ . On the outer surface, four positive electrodes 6a and four negative electrodes 6b are independently and evenly formed. In the capacitor element of FIG.
The negative electrode 6b is formed at the center of each side, and the positive electrode 6a is formed at each corner.

Further, between the ceramic dielectric layers 5 of the laminate, a positive electrode internal electrode 7a having a pattern as shown in FIG. 2B and a negative electrode having a pattern as shown in FIG. The internal electrodes 7b are alternately formed. The internal electrode 7a for the positive electrode is electrically connected to the positive electrode 6a, and the internal electrode 7b for the negative electrode is electrically connected to the negative electrode 6b at the end face of the laminate.

On the other hand, a first conductor layer 8 and a second conductor layer 9 are formed inside the insulating substrate 1 between the built-in capacitor element 3 having the above structure and the surface of the electronic component mounting surface. I have. Then, as shown in the pattern diagram of FIG. 3A, the four positive electrodes 6a and the first conductor layer 8 of the capacitor element 3 are formed by vertically penetrating the insulating layer directly above the positive electrodes 6a. Electrically connected by the via-hole conductor 10.

As shown in the pattern diagram of FIG. 3B, the four negative electrodes 6b and the second conductor layer 9 of the capacitor element 3 vertically penetrate the insulating layer directly above the negative electrode 6b. Are electrically connected by via-hole conductors 11 formed as described above.

The first conductor layer 8 has an opening 12 in which a conductor is formed so as not to come into contact with the via-hole conductor 11 connecting the negative electrode 6b and the second conductor layer 9. .

In the first conductor layer 8 connected to the positive electrode 6a of the capacitor element 3, a via-hole conductor 13 is further formed over the electronic component mounting surface, and the positive electrode provided on the substrate surface is formed. Similarly, via-hole conductors 15 are formed on the second conductor layer 9 connected to the negative land 6 b of the capacitor element 3, the via-hole conductors 15 extending to the electronic component mounting surface. It is connected to a negative electrode land 16 provided on the substrate surface.

The bumps of the semiconductor element 4 mounted on the surface of the insulating substrate 1 are electrically connected to the positive electrode lands 14 and the negative electrode lands 16. (Formation of Intermetallic Compound) According to the present invention, at least a connecting portion between via-hole conductors 10 and 11 directly connected to positive electrode 6a and negative electrode 6b of capacitor element 3 in wiring board A has Cu A major feature is that an intermetallic compound of Sn and Sn is present. Since this intermetallic compound has high heat resistance and electric conductivity, even when a heat cycle is applied from the outside, the electrodes 6a and 6b of the capacitor element 3 and the via-hole conductors 10 and 11
It can be firmly connected without deteriorating the connectivity with the device. Copper (Cu) is used as an intermetallic compound of Cu and Sn.
And tin (Sn) in a ratio of 3: 1 such as Cu ₃ Sn,
Cu ₆ Sn ₅ having a ratio of 6: 5 is exemplified.

In particular, when at least Cu ₃ Sn having a high Cu content is present, the heat resistance and high electrical conductivity of the via-hole conductor can be imparted. Therefore, preferably,
Cu ₃ Sn or Cu ₃ Sn and C as intermetallic compounds
It is desirable that both u ₆ Sn ₅ be present. More specifically, in the X-ray diffraction measurement of the via-hole conductors 10 and 11, the peak height of Cu ₃ Sn existing near 2θ = 57.5 ° is set to H1, and Cu ₆ S existing near 2θ = 60 °.
When the peak height of the n ₅ was H2, H1 / H2 is 0.5
More preferably, it is particularly 1.0 or more.

Such an intermetallic compound includes via-hole conductors 10 and 11 and terminal electrodes 6 a and 6 of capacitor element 3.
It is sufficient that the intermetallic compound is included in the via-hole conductors 10 and 11 at least at the connection with the via-hole conductors 10 and 11 so that the via-hole conductors 10 and 11 and the terminal electrodes 6 a and 6 b As a result, not only the connection reliability with the via hole conductors 10 and 11 but also the heat resistance and the electrical conductivity of the via hole conductors 10 and 11 can be improved, so that the terminal electrodes 6 a and 6 b of the capacitor element 3 and the via hole conductors 10 and 11 are interposed. Also, the electrical connectivity with other circuits can be stabilized.

In order to generate such an intermetallic compound, it is desirable that Cu and Sn are first contained as metal components at least in the connection portions between the via-hole conductors 10 and 11 and the terminal electrodes 6a and 6b. , Copper (C
It is desirable that the weight ratio between u) and tin (Sn) expressed as Sn / (Cu + Sn) is 0.5 to 0.95.
For the above reasons, it is desirable that the entire via-hole conductors 10 and 11 contain Cu and Sn in the above ratio. Furthermore, in order to promote the generation of Cu ₃ Sn, the weight ratio of Sn / (Cu + Sn) is 0.5 to 0.75,
In particular, it is preferably 0.5 to 0.70, more preferably 0.5 to 0.65.

If the weight ratio is less than 0.5, the amount of the intermetallic compound formed is reduced, and the connectivity between the copper-containing powder and between the copper-containing powder and the terminal electrodes of the capacitor is reduced. Therefore, to the mounting portion of the semiconductor element arranged on the surface layer via via-hole conductor, or low electrical conductivity to the mounting portion with the motherboard, and at the time of reflow, for example, when reflow at 240 to 260 ℃, The state of contact between the metal powder in the via-hole conductor and the contact state between the via-hole conductor and the terminal electrode layer of the capacitor may easily change, and the electrical conductivity therebetween may be reduced.

On the other hand, if the weight ratio is larger than 0.95, the absolute amount of copper is reduced, so that the amount of the intermetallic compound formed is small and the intermetallic compound with Cu cannot be formed. The tin of the reaction remains in the via-hole conductor as tin or a tin alloy having a low melting point, and similarly, the heat resistance at the time of reflow (240 to 260 ° C.) easily deteriorates,
Unreacted tin or low-melting tin alloy melts during reflow, and the contact between the metal powder in the via-hole conductor and the contact state between the via-hole conductor and the terminal electrode layer of the capacitor easily changes, resulting in electrical conductivity. This is because it tends to decrease.

In the via hole, an epoxy resin,
A thermosetting resin such as a phenol resin or an unsaturated polyester resin or a resin such as cellulose may be included in some cases. (Capacitor electrode) In order to enhance the connectivity with the via-hole conductors 10 and 11 filled with the above-described Cu and Sn as a metal component, the outermost surfaces of the terminal electrodes 6a and 6b of the electric element such as the capacitor element 3 are provided. , It is desirable to have a conductor layer containing at least Sn.
More preferably, a conductor layer containing at least one of u and Ni and a conductor layer containing at least Sn on the surface of the conductor layer are formed.

More specifically, the terminal electrodes 6a and 6b of the capacitor element 3 are formed as follows. First,
Electrolytic Cu powder having an average particle diameter of 1 to 5 μm and SiO ₂ , Bi ₂
Average particle size of 3 to 8 μm composed of O ₃ , Al ₂ O ₃ , ZnO, etc.
m frit glass powder, ethyl cellulose or an acrylic binder is mixed to prepare a conductive paste, applied so as to cover the internal electrode exposed on the end face of the capacitor, and baked in a temperature range of 800 to 900 ° C. An electrode layer of 3.0 to 15 μm is formed.

Thereafter, a Ni film of 1 to 5 μm is further formed on the surface of the electrode layer by electroplating to a thickness of 0.5 to 3 μm.
A Sn film having a thickness of μm is formed by an electroplating method.

As described above, the surface of the terminal electrodes 6a and 6b
By forming the conductor layer containing n, it is possible to promote the generation of a Cu-Sn intermetallic compound at a connection portion between the via hole conductor containing at least Cu and Sn.

According to the present invention, as described above, the Cu-Sn intermetallic compound is generated at the connection between the via-hole conductors 10 and 11 and the terminal electrodes 6a and 6b, whereby
Even after the heat resistance test at 60 ° C. for 2 minutes, the volume resistance with the capacitor element via the via-hole conductors 10 and 11 is 1 × 10 ⁻⁴ Ω-cm or less, particularly 5 × 10 ⁻⁵ Ω-cm.
cm or less and excellent conductivity can be maintained.

The material of the insulating substrate 1 in the wiring board A with a built-in electric element of the present invention is not particularly limited as long as the above-mentioned structure with a built-in capacitor element can be formed. In order to form a structure in which the capacitor element 3 having the electrodes is embedded inside the substrate, it is desirable that the capacitor element 3 be made of an insulating material containing an organic resin that does not require a sintering step.

Therefore, a method of manufacturing a wiring board with a built-in electric element according to the present invention, in which the insulating substrate is made of an insulating material containing an organic resin, will be described below.

First, an uncured insulating sheet made of a thermosetting resin such as an epoxy resin or a polyphenylene ether resin, or a mixed material of the thermosetting resin and an inorganic filler powder such as silica or alumina, or glass. A so-called prepreg, an insulating sheet in which a woven or non-woven fabric of fibers or aramid fibers is impregnated with a thermosetting resin such as an epoxy resin, is prepared.

Then, as shown in the process diagram of FIG. 4, for example, a cavity 21 containing a capacitor element is formed in the prepreg 20 by punching or the like (a). On the other hand, via holes 23 are formed in the insulating sheet 22, and the via holes 23 are filled with a conductive paste containing a conductive powder such as Cu powder to form via hole conductors 24 (b).

The above-mentioned conductive paste is prepared as follows in order to generate a Cu-Sn intermetallic compound at a connection portion with a capacitor element. First, as a metal component, copper powder, copper powder coated with silver powder, copper-containing powder such as copper-silver alloy powder, tin powder or Sn-A
An alloy powder composed of g-Cu-Bi is blended in such a manner that the weight ratio of tin (Sn) and copper (Cu) in the metal component expressed as Sn / (Cu + Sn) is 0.5 to 0.95. I do.
Then, 1 to 6 parts by weight of a resin component and 1 to 4 parts by weight of a solvent are added to 100 parts by weight of the metal component.

The copper-containing powder to be used is most preferably an electrolytic copper powder having excellent conductivity and good dispersibility.
5 to 5 μm is desirable. This is because if it is smaller than 0.5 μm, the surface is oxidized and the conductivity between the powders is reduced. If it is larger than 5 μm, the filling rate of the powder into the via-hole conductor is reduced and the resistance is increased. .

The average particle diameter of the tin powder or tin alloy powder is preferably 1 to 15 μm. This is because if it is smaller than 1 μm, the surface is oxidized to increase the resistance, and if it is larger than 15 μm, the filling rate is reduced, and tin is localized to impair heat resistance.

As the resin component, bisphenol A which reacts with an amine-based curing agent or an acid anhydride from the viewpoints of dispersibility, adhesion, heat resistance, storage stability, weather resistance, etc. of the copper-containing powder or tin-containing powder, or In addition to thermosetting resins such as bisphenol F, epoxy resin and triallyl isocyanurate resin, polymethacrylate and cellulose can also be used.

The solvent may be any solvent as long as it is a resin or a solvent that can be dissolved, for example, isopropyl alcohol,
Terpineol, 2-octanol, butyl carbitol acetate and the like are used.

A paste can be prepared by kneading the composition prepared as described above with a stirring deaerator or a three-roll mill. In this kneading, the metal powder and the thermosetting resin are mixed, so that oxidation of the tin-based powder during curing can be prevented.

Thereafter, a conductor layer 25 is formed on the surface of the insulating sheet 22 (c). This conductor layer 25 is, for example,
A method in which a conductor layer having a predetermined pattern is formed by a process of resist application, exposure, development, etching, and resist removal after sticking to the surface of an insulating sheet on a metal foil such as a Cu foil or an Al foil, or a resin film in advance. There is a method in which the above-mentioned metal foil is attached to the surface and a conductor layer having a predetermined pattern is formed in the same manner as described above, and transferred to the surface of the insulating sheet. Among them, the latter method is preferable in that the insulating sheet is not exposed to an etchant or the like and the insulating sheet is not deteriorated.

The cavity 21 of the prepreg 20
A capacitor element 26 having a terminal electrode on which a conductor layer containing Sn is formed on the outermost surface is installed therein, and the above-mentioned manufacturing method (b) and (c) is applied above and below the prepreg 20. Via-hole conductors 27 and conductor layers 28 formed by filling Cu and Sn as metal components,
The insulating sheets 30a, 30b, 30c, 30d and 30e on which the pads 29 for connection to the semiconductor element are formed are laminated.

Then, the laminate is heated at a temperature sufficient to cure the thermosetting resin in the insulating sheet and the prepreg, thereby producing a wiring board having a capacitor element as shown in FIG. be able to.

The thermosetting temperature at this time is set at 200 to 200 to form a Cu-Sn intermetallic compound by the reaction between Cu or Sn in the via-hole conductor and Sn on the surface of the terminal electrode of the capacitor element 3. By heating at a temperature of 250 ° C. for 0.5 to 5 hours, particularly about 1 to 3 hours, an intermetallic compound composed of Cu ₃ Sn or Cu ₆ Sn ₅ can be generated.

[0043]

EXAMPLES (1) Patterns of a positive electrode internal electrode and a negative electrode internal electrode as shown in FIG. 2 on the surface of a plurality of BaTiO ₃ -based ceramic dielectric sheets using an Ag-Pd metal paste. Was screen printed. Thereafter, the sheets were laminated and adhered at a temperature of 55 ° C. under a pressure of 150 kg / cm ² , cut in a green state using a cutter, and fired at a temperature of 1220 ° C. in an air atmosphere to produce a capacitor body.

Then, on the outer surface of the capacitor body,
A conductor paste obtained by adding a glass frit containing SiO ₂ or the like to Cu powder is applied to the positive electrode forming portion and the negative electrode forming portion and baked at a temperature of 850 ° C. to form a 11 μm Cu conductor layer. 5L internal volume with small iron ball
A Ni plating film having a thickness of 3.0 μm and a Sn plating film having a thickness of 2.0 μm using an electric barrel plating apparatus of
An eight-terminal multilayer ceramic capacitor having four positive terminal electrodes and four negative terminal electrodes as shown in FIG. 2 was produced. The dimensions of the capacitor element are 1.6 × 1.6 × 0.3 (mm ³ ), the capacitance is 11.0 nF, and the self inductance is 80 (pH).

(2) A prepreg of 55% by volume of A-PPE (thermosetting polyphenylene ether) resin (curing temperature = 200) and 45% by volume of glass woven fabric was prepared. Similarly, a 1.7 mm long × 1.7 mm wide cavity slightly larger than the size of the capacitor to be housed was formed in a part of the prepreg by trepanning using a carbon dioxide gas laser.

(3) On the other hand, a resin and powder in a varnish state are mixed so that the ratio of silica powder to PPE (polyphenylene ether) resin is 50% by volume, and a plurality of insulating sheets having a thickness of 150 μm are formed by a doctor blade method. And, on those insulating sheets, a via-hole conductor for connecting the conductor layer and the bump of the semiconductor element, and a via-hole conductor for connecting the capacitor element and the conductor layer, with a diameter of 0.2 mm by punching. A metal component in which a plurality of via holes are formed and silver is plated on the surface, and a copper powder having an average particle size of 5 μm and a Sn alloy (Sn—Ag—Cu—Bi) powder are mixed at a ratio shown in Table 1 to 100 parts by weight of a metal component. Then, 12 parts by weight of triallyl isocyanurate and its oligomer as a resin component were added and mixed to prepare a conductive paste. The holes were filled to form via-hole conductors.

(4) On the other hand, an adhesive was applied to the surface of a transfer sheet made of polyethylene terephthalate (PET) resin, and a copper foil having a thickness of 12 μm and a surface roughness of 0.8 μm was adhered to one surface. Then, after applying a photoresist (dry film) and performing exposure and development, it was immersed in a ferric chloride solution to remove the non-patterned portions by etching to form a positive electrode conductor layer and a negative electrode conductor layer. . Note that the manufactured wiring circuit layer is a fine pattern having a line width of 20 μm and an interval between wirings of 20 μm.

(5) Then, the conductor layer side of the transfer sheet is placed on the surface of the insulating sheet prepared in (2).
After pressure bonding at a pressure of kg / cm ² , the transfer sheet was peeled off, and the conductor layer was transferred to the insulating sheet.

(6) Next, the multilayer ceramic capacitor chip manufactured in (1) is temporarily installed in the cavity of the prepreg having the cavity formed in (2), and 40 volumes of epoxy resin are placed in the gap around the chip. %, Silica 60
Volume% was filled and temporarily fixed.

On the surface thereof, a conductor layer produced through (3) and (4) and two insulating sheets having via-hole conductors are laminated, and further, a semiconductor element mounting surface is further formed thereon. One insulating sheet on which the wiring circuit layer is formed is temporarily laminated, and the built-in capacitor manufactured in the above (1) is placed on the surface opposite to the mounting surface of the semiconductor element, and The electrode formed on the surface was positioned so that the exposed portion of the end of the via-hole conductor was in contact with the electrode, and was temporarily fixed with an organic adhesive.

(7) Then, the laminate is heated at 220 ° C. for 1 hour.
After heating for a period of time to complete curing, a multilayer wiring board was produced.
In addition, the gap of the insulating sheet contracted due to the flow of the resin due to the heating, and the insulating layer and the capacitor chip were brought into close contact with each other, and the gap between the chip and the insulating layer almost disappeared. Thus, an evaluation substrate having an insulating layer thickness of 0.10 mm per layer was manufactured.

The manufactured wiring board with a built-in capacitor was processed at a frequency of 1.0 MHz to
At 1.8 MHz, the frequency characteristic of the impedance is measured, and at the same time, the capacitance value of the capacitor at 1 MHz is measured. Then, f ₀ = 1 / (2π (LC) ^1/2 ) (where f ₀ : Resonance frequency (Hz), C: capacitance (F),
(L: inductance (H)), the inductance was calculated from the resonance frequency.

The inductance was measured in the same manner even after the thermal shock test (−55 to 125 ° C.) and the heat resistance of the solder. More specifically, in a chamber at a pressure of 1 atm using carbon dioxide as a refrigerant and an electric heater as a heating source, a cycle of −55 to 125 ° C. is performed 100 times at intervals of 5 minutes, and then within 24 hours. The capacitance and impedance were measured at a voltage of 0.5 V at room temperature.

The generation of Cu-Sn intermetallic compound at the connection between the capacitor terminal electrode and the via-hole conductor on the wiring board was confirmed by an electron beam microanalyzer (EPMA). Further, the characteristic X-ray intensity of the element is calculated by the quantification by EPMA, and Cu ₃
The precipitation ratio of Sn was calculated. In addition, Sn at the connection portion
The weight ratio of / (Cu + Sn) was measured and calculated by a standard quantitative method using Cu.

Comparative Example 1 As shown in FIG. 5A, a land portion 34 made of a copper foil was formed by a transfer method at an end of a via-hole conductor 33 at a portion connected to a terminal electrode 32 of a capacitor element 31. At the time of final curing of the wiring board, the capacitor terminal electrode 32 was pressed against and connected to the land portion 34, and evaluation was performed in the same manner as described above.

Comparative Example 2 As shown in FIG. 5B, a land portion 34 made of copper foil was formed by a transfer method at the end of the via-hole conductor 33 at the portion connected to the terminal electrode 32 of the capacitor element 31. Then, the capacitor terminal electrode 32 and the land 34 are connected to each other by Pb-S
The connection was fixed at 230 ° C. with n solder 35, and the same evaluation as above was performed.

[0057]

[Table 1]

As is clear from the results shown in Table 1, according to the present invention, a conductor paste in which Cu and Sn components are mixed at a predetermined ratio is used for the via-hole conductor of the wiring board, and the outermost layer of the terminal electrode is made of Sn. Formation of the Cu-Sn intermetallic compound was confirmed by forming the containing conductor layer. In addition, due to the formation of the intermetallic compound, the heat resistance is improved as compared with the conventional connection by pressure welding or the connection by simple soldering, and the change in inductance after solder reflow is as good as 10% or less. showed that.

Incidentally, Comparative Example 1 (sample N
o. 8) and Comparative Example 2 of connection by solder (sample No. 8).
9), Sample No. 9 in which the via-hole conductor was formed only of Cu. Sample No. 10 in which the terminal electrodes of the capacitor element were soldered to the lands by soldering. In No. 9, no intermetallic compound was generated, and the rate of change in inductance exceeded 10%.

[0060]

As described above, according to the present invention, an electric element is built in an insulating substrate, and when the terminal electrode and the via-hole conductor are connected, a high electric conductivity and heat resistance are provided at the connection portion. By generating a Cu-Sn intermetallic compound having a property, even after solder reflow processing such as mounting electronic components on the surface of the wiring board, the built-in electric element and the wiring circuit of the wiring board It is possible to provide a wiring board with a built-in electric element that maintains the connectivity with the layer and has excellent reliability without changing the function of the built-in electric element.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a wiring board with a built-in electric element of the present invention.

2 (a) is a schematic perspective view, FIG. 2 (b) is a pattern diagram of a positive electrode internal electrode, and FIG. 2 (c) is a negative electrode internal electrode. FIG.

FIG. 3 is a pattern diagram of (a) a first conductor layer and (b) a pattern diagram of a second conductor layer in the wiring board of the present invention.

FIG. 4 is a process chart for manufacturing a wiring board with a built-in electric element of the present invention.

FIG. 5 is a diagram illustrating a connection state between a terminal electrode of a capacitor element and a via-hole conductor in a comparative example.

[Explanation of symbols]

 A Wiring board 1 Insulating substrate 2 Cavity 3 Capacitor element 4 Semiconductor element 5 Ceramic dielectric layer 6a Positive electrode 6b Negative electrode 7a Positive internal electrode 7b Negative internal electrode 8 First conductor layer 9 Second conductor layer 10,11 , 17 via-hole conductor

Claims (5)

[Claims] An insulating substrate containing at least an organic resin, a plurality of wiring circuit layers formed on the surface and / or inside the insulating substrate, and a metal component filled in a via hole provided inside the insulating substrate. A via-hole conductor, and an electric element built-in wiring board including an electric element having at least a pair of terminal electrodes in the insulating substrate, wherein the terminal electrode of the electric element and the via-hole conductor are directly connected to each other. And a connection part between the terminal electrode and the via-hole conductor, wherein an intermetallic compound of Cu and Sn is present. 2. The method according to claim 1, wherein the metal component in the via-hole conductor contains Cu and Sn, and the weight ratio of Sn / (Cu + Sn) is 0.5 to 0.95.
The wiring board with a built-in electric element as described in the above. 3. The wiring board with a built-in electric element according to claim 1, wherein said electric element comprises a multilayer ceramic capacitor. 4. The wiring board with a built-in electric element according to claim 1, wherein said electric element comprises a multilayer ceramic capacitor having two or more positive electrodes and two or more negative electrodes. 5. The wiring board with a built-in electric element according to claim 1, wherein a conductor layer containing at least Sn is formed on the outermost surface of the terminal electrode of the electric element.