JP2001237256A - Work mounting method and work mounting body - Google Patents
Work mounting method and work mounting bodyInfo
- Publication number
- JP2001237256A JP2001237256A JP2000046916A JP2000046916A JP2001237256A JP 2001237256 A JP2001237256 A JP 2001237256A JP 2000046916 A JP2000046916 A JP 2000046916A JP 2000046916 A JP2000046916 A JP 2000046916A JP 2001237256 A JP2001237256 A JP 2001237256A
- Authority
- JP
- Japan
- Prior art keywords
- work
- substrate
- flip chip
- underfill resin
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
Landscapes
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
(57)【要約】
【課題】 アンダーフィル樹脂内に気泡が発生するのを
防止できるワークの実装方法およびワークの実装体を提
供することを目的とする。
【解決手段】 フリップチップ11をバンプを介在させ
て搭載した基板1をプラズマ処理装置30のケーシング
34に収納し、このケーシング34内に圧力が200
[pa]〜800[pa]の範囲のプラズマ発生用ガス
を供給してプラズマ放電を発生させる。上記圧力条件下
で生じたプラズマ放電による活性物質は基板1とフリッ
プチップ11の間の隙間に効率よく進入し、基板1のレ
ジストやフリップチップ11の保護膜の表面を活性物質
の作用により良好に改質して濡れ性を向上させる。これ
により、隙間内にアンダーフィル樹脂を充填する際にア
ンダーフィル樹脂は改質された表面に良好に密着し、気
泡を生じることなく良好な樹脂充填が行える。
(57) [Problem] To provide a work mounting method and a work mounting body capable of preventing generation of air bubbles in an underfill resin. SOLUTION: A substrate 1 on which a flip chip 11 is mounted with bumps interposed is housed in a casing 34 of a plasma processing apparatus 30, and a pressure of 200 is applied in the casing 34.
A plasma discharge gas is supplied in the range of [pa] to 800 [pa] to generate plasma discharge. The active material due to the plasma discharge generated under the above pressure conditions efficiently enters the gap between the substrate 1 and the flip chip 11, and the resist of the substrate 1 and the surface of the protective film of the flip chip 11 are satisfactorily formed by the action of the active material. Modifies to improve wettability. Thereby, when filling the gap with the underfill resin, the underfill resin adheres well to the modified surface, and good resin filling can be performed without generating bubbles.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、フリップチップな
どのワークをバンプを介在させて基板などに実装するワ
ークの実装方法及びワークの実装体に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a work mounting method for mounting a work such as a flip chip on a substrate or the like with a bump interposed therebetween, and a work mounting body.
【0002】[0002]
【従来の技術】フリップチップなどのワークを基板など
のワークに実装する方法として、ワークの電極同士をバ
ンプで接合することが知られている。2. Description of the Related Art As a method of mounting a work such as a flip chip on a work such as a substrate, it is known to join electrodes of the work with bumps.
【0003】図6は従来の実装済のパッケージの断面図
である。図中、1は第1のワークである基板であり、そ
の上面には電極2が形成されている。また電極2以外の
基板1の表面にはレジスト3がコーティングされてい
る。11は第2のワークであるフリップチップであっ
て、その下面には電極12が形成されており、また電極
12以外の下面には保護膜13が形成されている。FIG. 6 is a sectional view of a conventional mounted package. In the figure, reference numeral 1 denotes a substrate serving as a first work, on which an electrode 2 is formed. The surface of the substrate 1 other than the electrodes 2 is coated with a resist 3. Reference numeral 11 denotes a flip chip as a second work, on which an electrode 12 is formed on a lower surface, and a protective film 13 is formed on a lower surface other than the electrode 12.
【0004】フリップチップ11の電極12にはバンプ
14が突設されている。フリップチップ11のバンプ1
4は加熱炉で加熱処理するなどして電極2に接着されて
いる。またフリップチップ11を基板1に搭載した後、
基板1とフリップチップ11の間にはアンダーフィル樹
脂4が充てんされている。アンダーフィル樹脂4は、フ
リップチップ11を基板1上にしっかり固着するために
充てんされる。[0004] A bump 14 is provided on the electrode 12 of the flip chip 11. Bump 1 of flip chip 11
Reference numeral 4 is bonded to the electrode 2 by performing a heat treatment in a heating furnace. After mounting the flip chip 11 on the substrate 1,
An underfill resin 4 is filled between the substrate 1 and the flip chip 11. The underfill resin 4 is filled to firmly fix the flip chip 11 on the substrate 1.
【0005】通常、アンダーフィル樹脂4は、基板1上
にディスペンサなどで塗布される。塗布されたアンダー
フィル樹脂4は、毛細管力により基板1とフリップチッ
プ11の狭い間に進入して充てんされる。その後、アン
ダーフィル樹脂4は加熱処理などにより硬化する。図6
において、鎖線で示すアンダーフィル樹脂4はディスペ
ンサで基板1に塗布された直後の状態を示しており、ま
た実線で示すアンダーフィル樹脂4は基板1とフリップ
チップ11に進入した後の状態を示している。Normally, the underfill resin 4 is applied on the substrate 1 with a dispenser or the like. The applied underfill resin 4 enters a narrow space between the substrate 1 and the flip chip 11 by capillary force and is filled. Thereafter, the underfill resin 4 is cured by a heat treatment or the like. FIG.
In the figure, the underfill resin 4 indicated by a dashed line indicates a state immediately after being applied to the substrate 1 by a dispenser, and the underfill resin 4 indicated by a solid line indicates a state after entering the substrate 1 and the flip chip 11. I have.
【0006】[0006]
【発明が解決しようとする課題】しかしながら従来の方
法では、基板1とフリップチップ11の間に進入したア
ンダーフィル樹脂4内に気泡5が発生しやすいという問
題点があった。この気泡5はフリップチップ11の固着
力を低下させ、また電極2,12を酸化させることか
ら、気泡5の発生は解消することが望ましい。気泡5の
発生原因は必ずしも明確ではないが、基板1やフリップ
チップ11などのワークの表面に対するアンダーフィル
樹脂4の濡れ性の良悪に原因するものと考えられる。ま
たこのような気泡は、フリップチップ11に限らず、ワ
ーク同士をバンプ14を介在させて実装する実装構造に
広く発生するものである。However, the conventional method has a problem that air bubbles 5 are easily generated in the underfill resin 4 which has entered between the substrate 1 and the flip chip 11. Since the bubbles 5 lower the fixing force of the flip chip 11 and oxidize the electrodes 2 and 12, it is desirable that the generation of the bubbles 5 be eliminated. Although the cause of the generation of the bubble 5 is not necessarily clear, it is considered that the cause is caused by the quality of the wettability of the underfill resin 4 to the surface of the work such as the substrate 1 and the flip chip 11. Such bubbles are widely generated not only in the flip chip 11 but also in a mounting structure in which works are mounted with the bumps 14 interposed therebetween.
【0007】そこで本発明は、アンダーフィル樹脂内に
気泡が発生するのを防止できるワークの実装方法及びワ
ークの実装体を提供することを目的とする。Accordingly, an object of the present invention is to provide a work mounting method and a work mounting body which can prevent generation of air bubbles in the underfill resin.
【0008】[0008]
【課題を解決するための手段】請求項1記載のワークの
実装方法は、第1のワーク上に第2のワークをバンプを
介して搭載する工程と、第1のワークが搭載された第2
のワークを、圧力が200[Pa]〜800[Pa]の
プラズマ雰囲気内に曝す工程と、次いで前記第1のワー
クと第2のワークの間にアンダーフィル樹脂を進入させ
る工程と、前記アンダーフィル樹脂を硬化させる工程と
を含む。According to a first aspect of the present invention, there is provided a method for mounting a work, comprising: mounting a second work on a first work via a bump; and mounting a second work on the first work.
Exposing the workpiece in a plasma atmosphere at a pressure of 200 Pa to 800 Pa, then injecting an underfill resin between the first and second works, and Curing the resin.
【0009】請求項2記載のワークの実装体は、第1の
ワーク上に第2のワークをバンプを介して搭載する工程
と、第2のワークが搭載された第1のワークを、圧力が
200[Pa]〜800[Pa]のプラズマ雰囲気内に
曝す工程と、次いで前記第1のワークと第2のワークの
間にアンダーフィル樹脂を進入させる工程と、前記アン
ダーフィル樹脂を硬化させる工程とを含む方法で製造さ
れた。According to a second aspect of the present invention, there is provided a package for a work, wherein the step of mounting the second work on the first work via bumps and the step of mounting the first work on which the second work is mounted are performed under pressure. A step of exposing to a plasma atmosphere of 200 [Pa] to 800 [Pa], a step of injecting an underfill resin between the first work and the second work, and a step of curing the underfill resin. It was manufactured by the method including.
【0010】上記構成において、アンダーフィル樹脂を
第1のワークと第2のワークの間に進入させる前に、圧
力が200[Pa]〜800[Pa]のプラズマ雰囲気
に曝す。これにより発生した酸素ラジカルなどの活性物
質は第1のワークと第2のワークの間に効率よく進入し
てその表面に接触し、この表面の物理的性質あるいは化
学的性質を改質する。その後、アンダーフィル樹脂を第
1のワークと第2のワークの間に進入させて充てんす
る。In the above configuration, before the underfill resin enters between the first work and the second work, the underfill resin is exposed to a plasma atmosphere having a pressure of 200 [Pa] to 800 [Pa]. The active substance such as oxygen radicals generated thereby efficiently enters between the first work and the second work and comes into contact with the surface, thereby modifying the physical or chemical properties of the surface. After that, the underfill resin is filled between the first work and the second work by entering the work.
【0011】[0011]
【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して説明する。図1は本発明の一実施の形態のプ
ラズマ処理装置の断面図、図2、図3、図4は本発明の
一実施の形態の実装方法の説明図、図5は本発明の一実
施の形態のプラズマ処理におけるプラズマ処理圧力と保
護膜表面接触角との関係を示すグラフである。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a plasma processing apparatus according to an embodiment of the present invention, FIGS. 2, 3 and 4 are explanatory views of a mounting method according to an embodiment of the present invention, and FIG. 4 is a graph showing the relationship between the plasma processing pressure and the protective film surface contact angle in the plasma processing of the embodiment.
【0012】まず、図1を参照してプラズマ処理装置3
0の構造を説明する。31は台板であり、その内部に電
極部32が設けられている。電極部32には高圧高周波
の電源33が接続されている。台板31上にはケーシン
グ34が開閉自在に設置されている。ケーシング34は
アース35に接続されている。ケーシング34の内部に
はパイプ36を通じてガス供給手段(図外)からプラズ
マ発生用のガスが供給される。ガス供給手段は圧力調整
機能を備えており、所望圧力のプラズマ発生用のガスを
ケーシング内に供給できるようになっている。またケー
シング34内のガスはパイプ37を通じて真空吸引され
る。38は真空吸引用のポンプである。First, referring to FIG.
The structure of 0 will be described. Reference numeral 31 denotes a base plate in which an electrode part 32 is provided. The electrode section 32 is connected to a high-voltage high-frequency power supply 33. On the base plate 31, a casing 34 is installed so as to be freely opened and closed. The casing 34 is connected to a ground 35. Gas for plasma generation is supplied to the inside of the casing 34 from gas supply means (not shown) through a pipe 36. The gas supply means has a pressure adjusting function so that a gas for generating plasma at a desired pressure can be supplied into the casing. The gas in the casing 34 is sucked in vacuum through the pipe 37. 38 is a vacuum suction pump.
【0013】電極部32上には、フリップチップ11を
搭載した基板1が収納されている。図2はこの基板1を
示している。図6に示す要素と同一要素には同一符号を
付すことにより説明は省略する。本発明で重要なこと
は、第1のワーク(基板1)上に第2のワーク(フリッ
プチップ11)を搭載した状態でケーシング34に収納
し、プラズマ処理を行うことである。The substrate 1 on which the flip chip 11 is mounted is housed on the electrode part 32. FIG. 2 shows the substrate 1. The description of the same elements as those shown in FIG. 6 will be omitted by retaining the same reference numerals. What is important in the present invention is that the second work (flip chip 11) is mounted on the first work (substrate 1) and housed in the casing 34 to perform plasma processing.
【0014】次にプラズマ処理について説明する。図1
に示すようにフリップチップ11を搭載した基板1を電
極部32上に載置してケーシング34内に収納する。次
にポンプ38を駆動してケーシング34内を真空吸引
し、またパイプ36を通じてプラズマ発生用ガスをケー
シング34内に供給する。ここではラズマ発生用ガスと
して酸素ガスを用い、供給されるプラズマ発生用ガスの
圧力は200[Pa]〜800[Pa]の範囲に設定さ
れる。Next, the plasma processing will be described. FIG.
The substrate 1 on which the flip chip 11 is mounted is placed on the electrode part 32 and stored in the casing 34 as shown in FIG. Next, the pump 38 is driven to vacuum-evacuate the inside of the casing 34, and a gas for plasma generation is supplied into the casing 34 through the pipe 36. Here, oxygen gas is used as the plasma generation gas, and the pressure of the supplied plasma generation gas is set in the range of 200 [Pa] to 800 [Pa].
【0015】次に電源33を入力して電極部32に高周
波電圧を印加する。するとケーシング34内のガスの大
部分はイオン化し、また一部分はラジカルと呼ばれる活
性に富んだ活性物質となる。このプラズマ雰囲気内に、
フリップチップ11を搭載した基板1を約20秒間曝す
ことによりプラズマ処理が行われる。すなわちイオンや
活性物質は基板1とフリップチップ11の間に進入し、
基板1やフリップチップ11の表面に接触してこの表面
にコーティングされたレジスト3や保護膜13の物理的
性質や化学的性質を改質する。この改質効果はイオンよ
りも活性力に富むラジカルの方が大きい。プラズマによ
りラジカル化するガスとしては酸素やアルゴンなどがあ
るが、実験結果によれば酸素の改質効果が良好であっ
た。Next, a power supply 33 is inputted to apply a high-frequency voltage to the electrode section 32. Then, most of the gas in the casing 34 is ionized, and part of the gas becomes an active substance having a high activity called a radical. In this plasma atmosphere,
The plasma processing is performed by exposing the substrate 1 on which the flip chip 11 is mounted for about 20 seconds. That is, ions and active substances enter between the substrate 1 and the flip chip 11,
It contacts the surface of the substrate 1 or the flip chip 11 to modify the physical and chemical properties of the resist 3 and the protective film 13 coated on the surface. This reforming effect is larger for radicals having a higher activity than ions. Examples of the gas radicalized by the plasma include oxygen and argon. According to the experimental results, the effect of reforming oxygen was good.
【0016】酸素はプラズマ化すると酸素イオンe-や
活性物質である酸素ラジカルO*となる。この酸素イオ
ンや酸素ラジカルは基板1とフリップチップ11の間の
隙間(この隙間は、上述したように一般に数10ミクロ
ンであってきわめて狭い)の間に進入し、基板1の上面
やフリップチップ11の下面に充分に接触してその強い
活性力により表面の物理的性質や化学的性質を効果的に
改質する。Oxygen is converted into oxygen ions e − and oxygen radicals O * as an active substance when converted into plasma. The oxygen ions and oxygen radicals enter the gap between the substrate 1 and the flip chip 11 (this gap is generally several tens of microns and extremely narrow as described above), and the upper surface of the substrate 1 and the flip chip 11 The surface has sufficient contact with the lower surface to effectively modify the physical and chemical properties of the surface.
【0017】以上のようにしてプラズマ処理が終了した
ならば、ケーシング34を開放して基板1を取り出す。
次に図3に示すように基板1上にディスペンサなどによ
りアンダーフィル樹脂4を塗布する。するとアンダーフ
ィル樹脂4は毛細管力により基板1とフリップチップ1
1の間にゆっくり進入し、この間にはアンダーフィル樹
脂4が充てんされる。図4は進入・充てんが終了した状
態を示している。プラズマ処理により基板1やフリップ
チップ11の表面は改質されているので気泡は生じてい
ない。次いでアンダーフィル樹脂4を加熱処理などによ
り硬化させれば、フリップチップ11は基板1にしっか
り固着されてパッケージ10(ワーク実装体)は完成す
る。このパッケージ10はアンダーフィル樹脂4内に含
まれる気泡が少ないことからフリップチップ11の固着
強度が確保され、信頼性に優れている。When the plasma processing is completed as described above, the casing 34 is opened and the substrate 1 is taken out.
Next, as shown in FIG. 3, an underfill resin 4 is applied on the substrate 1 by a dispenser or the like. Then, the underfill resin 4 is connected to the substrate 1 and the flip chip 1 by capillary force.
1, the underfill resin 4 is filled during this time. FIG. 4 shows a state in which entry and filling have been completed. Since the surfaces of the substrate 1 and the flip chip 11 have been modified by the plasma treatment, no bubbles are generated. Next, if the underfill resin 4 is cured by heat treatment or the like, the flip chip 11 is firmly fixed to the substrate 1 and the package 10 (work mounted body) is completed. Since the package 10 has few air bubbles contained in the underfill resin 4, the bonding strength of the flip chip 11 is secured and the package 10 is excellent in reliability.
【0018】ここで、図5を参照して上記プラズマ処理
におけるプラズマ処理圧力、すなわちケーシング34内
に供給されるプラズマ発生用ガス(酸素ガス)の圧力
と、改質効果との相関について説明する。図5は、プラ
ズマ発生用ガスの圧力、すなわちプラズマ処理圧力を変
化させた場合のポリイミドの保護膜表面の水滴接触角の
変化を示すものであり、水滴接触角が小さいほど表面の
濡れ性がよいことを示している。すなわち、より小さい
水滴接触角が得られるプラズマ処理条件を適用した場合
に、プラズマ処理によるレジスト3や保護膜13の表面
の改質効果がより大きい。Here, the correlation between the plasma processing pressure in the plasma processing, that is, the pressure of the plasma generating gas (oxygen gas) supplied into the casing 34, and the reforming effect will be described with reference to FIG. FIG. 5 shows the change in the contact angle of the water droplet on the surface of the polyimide protective film when the pressure of the plasma generating gas, that is, the plasma processing pressure is changed. The smaller the contact angle of the water droplet, the better the surface wettability. It is shown that. That is, when the plasma processing condition that can obtain a smaller water droplet contact angle is applied, the effect of modifying the surfaces of the resist 3 and the protective film 13 by the plasma processing is greater.
【0019】図5から判るように、プラズマ処理圧力が
200[Pa]〜800[Pa]の範囲で特に良好な濡
れ性が得られている。このようにプラズマ処理後の濡れ
性がプラズマ処理圧力に依存する理由として、以下のよ
うな推論を行うことができる。すなわち、上記範囲より
も低いプラズマ処理圧力では、プラズマ放電によって発
生する酸素ラジカルやイオンの密度そのものが低いこと
から、処理対象である隙間内に進入する活性物質の量が
少なく、したがってレジスト3や保護膜13の表面に対
する改質効果は低い。また、上記範囲よりも高いプラズ
マ処理圧力では、プラズマ放電によって発生する酸素ラ
ジカルやイオンの密度は高いものの、これらの密度があ
る程度以上に高い状態では、酸素ラジカルやイオンなど
の粒子が処理対象の隙間に到達する前に相互に衝突して
活性を失う確率が高い。As can be seen from FIG. 5, particularly good wettability is obtained when the plasma processing pressure is in the range of 200 [Pa] to 800 [Pa]. The reason why the wettability after the plasma processing depends on the plasma processing pressure can be inferred as follows. That is, when the plasma processing pressure is lower than the above range, the density of oxygen radicals and ions generated by the plasma discharge itself is low, so that the amount of the active substance that enters the gap to be processed is small. The modification effect on the surface of the film 13 is low. At a plasma processing pressure higher than the above range, the density of oxygen radicals and ions generated by the plasma discharge is high, but when these densities are higher than a certain level, particles such as oxygen radicals and ions are caught in the gap to be processed. There is a high probability of losing activity by colliding with each other before reaching.
【0020】すなわち、プラズマ処理圧力が低すぎても
また高すぎても、プラズマ放電によって発生した活性物
質が隙間内に進入する確率は小さい。換言すれば、活性
物質を狭小な隙間内に効率よく進入させるのに適した特
定のプラズマ処理圧力範囲が存在する。そしてこのプラ
ズマ処理圧力範囲内でプラズマ処理を行うことにより良
好な表面改質効果を得ることができ、実験によれば図5
に示すように、200[Pa]〜800[Pa]の範囲
が、上記の良好な表面改質効果を得る特定のプラズマ処
理圧力範囲となっている。That is, whether the plasma processing pressure is too low or too high, the probability that the active substance generated by the plasma discharge enters the gap is small. In other words, there is a specific plasma processing pressure range suitable for allowing the active substance to efficiently enter the narrow gap. By performing the plasma processing within this plasma processing pressure range, a good surface modification effect can be obtained.
As shown in (2), the range of 200 [Pa] to 800 [Pa] is a specific plasma processing pressure range for obtaining the above-mentioned good surface modification effect.
【0021】[0021]
【発明の効果】以上説明したように本発明によれば、ワ
ークの表面を圧力が200[Pa]〜800[Pa]の
範囲のプラズマ発生用ガスを供給して行われるプラズマ
処理によって改質することにより、ワーク表面を高い処
理効率で改質してワークの間に進入するアンダーフィル
樹脂に気泡が生じるのを解消でき、第1のワークを第2
のワークにしっかり実装することができる。また第1の
ワーク上に第2のワークを搭載した状態で、第1のワー
クの表面と第2のワークの表面を同時に改質できるの
で、きわめて作業性よく改質作業を行うことができる。As described above, according to the present invention, the surface of a work is modified by a plasma treatment performed by supplying a plasma generating gas having a pressure in the range of 200 [Pa] to 800 [Pa]. Thereby, it is possible to eliminate the generation of air bubbles in the underfill resin entering between the works by modifying the work surface with high processing efficiency, and to remove the first work from the second work.
Can be firmly mounted on any work. In addition, since the surface of the first work and the surface of the second work can be simultaneously reformed with the second work mounted on the first work, the reforming work can be performed with extremely high workability.
【図1】本発明の一実施の形態のプラズマ処理装置の断
面図FIG. 1 is a cross-sectional view of a plasma processing apparatus according to an embodiment of the present invention.
【図2】本発明の一実施の形態の実装方法の説明図FIG. 2 is an explanatory diagram of a mounting method according to an embodiment of the present invention;
【図3】本発明の一実施の形態の実装方法の説明図FIG. 3 is an explanatory diagram of a mounting method according to an embodiment of the present invention;
【図4】本発明の一実施の形態の実装方法の説明図FIG. 4 is an explanatory diagram of a mounting method according to an embodiment of the present invention;
【図5】本発明の一実施の形態のプラズマ処理における
プラズマ処理圧力と保護膜表面接触角との関係を示すグ
ラフFIG. 5 is a graph showing the relationship between the plasma processing pressure and the protective film surface contact angle in the plasma processing according to one embodiment of the present invention.
【図6】従来の実装済のパッケージの断面図FIG. 6 is a cross-sectional view of a conventional mounted package.
1 基板 2,12 電極 4 アンダーフィル樹脂 10 パッケージ(ワーク実装体) 11 フリップチップ 14 バンプ 30 プラズマ処理装置 34 ケーシング DESCRIPTION OF SYMBOLS 1 Substrate 2, 12 Electrode 4 Underfill resin 10 Package (work mounting body) 11 Flip chip 14 Bump 30 Plasma processing device 34 Casing
Claims (2)
介して搭載する工程と、第2のワークが搭載された第1
のワークを、圧力が200[Pa]〜800[Pa]の
プラズマ雰囲気内に曝す工程と、次いで前記第1のワー
クと第2のワークの間にアンダーフィル樹脂を進入させ
る工程と、前記アンダーフィル樹脂を硬化させる工程と
を含むことを特徴とするワークの実装方法。A step of mounting a second work on the first work via bumps; and a step of mounting the second work on the first work.
Exposing the workpiece in a plasma atmosphere at a pressure of 200 Pa to 800 Pa, then injecting an underfill resin between the first and second works, and And a step of curing the resin.
介して搭載する工程と、第2のワークが搭載された第1
のワークを、圧力が200[Pa]〜800[Pa]の
プラズマ雰囲気内に曝す工程と、次いで前記第1のワー
クと第2のワークの間にアンダーフィル樹脂を進入させ
る工程と、前記アンダーフィル樹脂を硬化させる工程と
を含む方法で製造されたことを特徴とするワークの実装
体。2. A step of mounting a second work on the first work via bumps, and a step of mounting the second work on the first work.
Exposing the workpiece in a plasma atmosphere at a pressure of 200 Pa to 800 Pa, then injecting an underfill resin between the first and second works, and And a step of curing the resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000046916A JP2001237256A (en) | 2000-02-24 | 2000-02-24 | Work mounting method and work mounting body |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000046916A JP2001237256A (en) | 2000-02-24 | 2000-02-24 | Work mounting method and work mounting body |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2001237256A true JP2001237256A (en) | 2001-08-31 |
Family
ID=18569250
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000046916A Pending JP2001237256A (en) | 2000-02-24 | 2000-02-24 | Work mounting method and work mounting body |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2001237256A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005117094A1 (en) * | 2004-05-26 | 2005-12-08 | Matsushita Electric Industrial Co., Ltd. | Plasma processing method and method for fabricating electronic component module using the same |
JP2007059441A (en) * | 2005-08-22 | 2007-03-08 | Namics Corp | Manufacturing method of semiconductor device |
JP2010192525A (en) * | 2009-02-16 | 2010-09-02 | Namics Corp | Semiconductor device and method of manufacturing the same |
JP2012069893A (en) * | 2010-09-27 | 2012-04-05 | Sekisui Chem Co Ltd | Method of mounting semiconductor chip |
JP2012074450A (en) * | 2010-09-28 | 2012-04-12 | Toppan Printing Co Ltd | Method of manufacturing semiconductor package |
-
2000
- 2000-02-24 JP JP2000046916A patent/JP2001237256A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005117094A1 (en) * | 2004-05-26 | 2005-12-08 | Matsushita Electric Industrial Co., Ltd. | Plasma processing method and method for fabricating electronic component module using the same |
JP2007059441A (en) * | 2005-08-22 | 2007-03-08 | Namics Corp | Manufacturing method of semiconductor device |
JP2010192525A (en) * | 2009-02-16 | 2010-09-02 | Namics Corp | Semiconductor device and method of manufacturing the same |
JP2012069893A (en) * | 2010-09-27 | 2012-04-05 | Sekisui Chem Co Ltd | Method of mounting semiconductor chip |
JP2012074450A (en) * | 2010-09-28 | 2012-04-12 | Toppan Printing Co Ltd | Method of manufacturing semiconductor package |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100908747B1 (en) | Adhesion Improvement Method by Plasma Treatment on Semiconductor Chip Surface | |
JP4369507B2 (en) | Bonding apparatus and bonding method | |
US7973407B2 (en) | Three-dimensional stacked substrate arrangements | |
US8597982B2 (en) | Methods of fabricating electronics assemblies | |
US20100159645A1 (en) | Semiconductor apparatus and process of production thereof | |
KR101912578B1 (en) | Passivation layer for semiconductor device packaging | |
US7828193B2 (en) | Method of mounting an electronic component and mounting apparatus | |
JP2001237256A (en) | Work mounting method and work mounting body | |
JP2002110613A (en) | Plasma cleaning apparatus and method | |
JP2648945B2 (en) | Method for manufacturing semiconductor device | |
KR950034703A (en) | Method for manufacturing semiconductor device, device therefor, and method for manufacturing liquid crystal display | |
JP2000091373A (en) | Work mounting method | |
JP2009049115A (en) | Semiconductor device and manufacturing method thereof | |
JP3427702B2 (en) | Plasma processing equipment for electronic parts | |
JP3591344B2 (en) | How to mount electronic components with bumps | |
JP4790407B2 (en) | Plasma method to remove excess molding material from substrate | |
JP3351996B2 (en) | Semiconductor device manufacturing method and semiconductor device | |
JP4134949B2 (en) | Electronic component module assembling method and plasma processing method | |
JP3203346B2 (en) | Electronic component manufacturing method | |
JP4363011B2 (en) | Substrate surface treatment method and apparatus | |
JP2002118128A (en) | Electronic component and manufacturing method thereof | |
JPH10335294A (en) | Device and method for cleaning substrate and semiconductor device manufactured by the cleaning method | |
JP2002016108A (en) | Semiconductor device and its manufacturing device | |
JP2002353257A (en) | Electronic circuit board and method for manufacturing the same | |
JP2002110735A (en) | Method for mounting flip-chip and plasma processing apparatus |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040309 |