JP2001202064A - Digital / analog conversion method, conversion circuit, electro-optical device, and analog circuit manufacturing method - Google Patents

Abstract

(57) [Problem] To provide a digital / analog conversion circuit which can operate at high speed with low power consumption, has a simple configuration, and can be realized on a substrate or the like. A charge is accumulated in a capacitor by a pulse voltage input during a charging period, and an analog voltage of the capacitor during a holding period becomes an output voltage. By controlling the pulse width of the input pulse based on the digital signal, an amount of charge corresponding to the pulse width is accumulated,
The potential of the output voltage depends on the pulse width. Due to the circuit configuration, there is no DC current path and there is no need to accumulate charges more than necessary.
A conversion becomes possible. In addition, since the circuit configuration is simple and the non-linear element can be formed by a simple process such as lamination of a metal and an insulator, a circuit can be formed on a display panel of a liquid crystal display device or the like. It is possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital / analog conversion circuit for outputting an analog voltage corresponding to an input voltage pulse width. In particular, the present invention relates to a digital / analog conversion circuit mainly used in an electro-optical device and converting an input pulse having a digitally controlled width into an analog voltage for driving pixels.

[0002]

2. Description of the Related Art In recent years, miniaturization and thinning of liquid crystal display devices and the like, high performance, and low price have been advanced, and they have become widespread for various uses. In particular, a reflective liquid crystal display device that does not require a light-emitting means such as a backlight consumes less power, and thus is particularly suitable for a portable information device or a communication device.
There is an advantage that the frequency of device charging and battery replacement can be reduced.

In such a liquid crystal display device, various methods for reproducing the intermediate luminance of the pixel have been devised and put to practical use. One of the methods for realizing such a gradation display is a method using D / A (digital / analog) conversion. In this method, image data input as a digital signal is converted into an analog voltage by D / A conversion and applied to a pixel electrode. Liquid crystal is sandwiched between the pixel electrode and the common electrode, and the liquid crystal has a physical property indicating a correlation between the applied voltage and light transmittance in a predetermined voltage range. Therefore, by combining with a reflector that reflects light, a pixel luminance corresponding to an input signal is obtained.

In the prior art, the above D / A conversion uses a voltage division by a resistor (R-DAC).
Alternatively, there is a method (C-DAC) of obtaining a predetermined voltage by using charges stored in a capacitor.

[0005]

The above-described D / A conversion element has the following problems. First, R-
In the case of the DAC system, there is a point that power is consumed by a current flowing through a resistor. Conventionally, in a display device incorporating a backlight or the like, the amount of power consumed by the D / A conversion element has not been a problem since it is relatively small. With the development of the low power consumption type, the power consumption ratio of the D / A conversion occupying the whole has increased, and it has been an issue to suppress the power amount in this part.

Secondly, in the case of the capacity of the C-DAC system, although the power consumption is not so large,
Since it takes time to charge and discharge the capacity, there is a problem that a sufficiently high-speed operation cannot be obtained. In particular, in the case of a high-definition display having a large number of pixels or a moving image display requiring a smooth movement, the timing in a display rewriting cycle becomes more critical, so that the influence of this problem is increased.

Third, a TFT (thin film transistor)
In the case where a driver for driving a liquid crystal is built in a display panel having a pixel matrix, the conventional D / A conversion element occupies a large area and cannot be mounted on the panel. There is a problem that it has to be provided outside. If D /
If an A-conversion circuit can be formed on a display panel, the display device can be configured very compactly and with a small number of components. Therefore, such a technique is required.

The present invention has been made in view of the above circumstances, and is intended to operate on low power consumption, obtain a sufficiently high operation speed, and be realized on a display panel based on a glass substrate or the like. It is an object of the present invention to provide a digital / analog conversion circuit that can be used and an electro-optical device using the same.

[0009]

In order to solve the above-mentioned problems, the present invention converts a plurality of bits of digital data to be converted into a pulse signal corresponding to the digital data,
The pulse signal is applied to a capacitor through a non-linear element to charge the capacitor, and the charged voltage of the capacitor is output as a converted voltage.
The gist is an analog conversion method.

According to such a configuration of the present invention, by applying a pulse voltage having a width corresponding to the input digital data, an amount of charge corresponding to the pulse width is accumulated in the capacitor. Since a voltage corresponding to the charge amount is output as a converted voltage, digital / analog conversion can be realized.

The present invention also provides a signal having a first pulse width of a preset first voltage and a pulse width corresponding to digital data to be converted, which is formed by a preset second voltage. Is superimposed to form a charging signal, and the charging signal is applied to a capacitor through a non-linear element to charge the capacitor. After the charging signal is output, the charging signal is formed by a preset third voltage. A digital / analog conversion method, wherein the offset signal is applied to the capacitor via the nonlinear element, and after switching to the offset signal, a terminal voltage of the capacitor is output as a converted voltage. I do.

According to such a configuration of the present invention, a charge corresponding to the input digital data is accumulated in the capacitor, and a voltage corresponding to the charge is output as a converted voltage. Analog conversion can be realized.

The signal of the first pulse width of the first voltage acts so that a fixed amount of charge is stored in the capacitor regardless of the input digital data. There is an effect that the lower limit of the amount can be charged in a fixed time. Since the second pulse signal superimposed on the pulse width of the first voltage has a width corresponding to the input digital data, the second pulse signal acts to accumulate a variable portion of the variable charge amount in the capacitor. . In addition, since the first pulse signal and the second pulse signal are superimposed, it is not necessary to take the timing of applying each voltage individually, and this digital / analog conversion method can be applied to a circuit or a device where charging time is critical. This is advantageous in terms of timing when applied.

Further, in this method, it is assumed that the voltage of the charging signal and the voltage of the offset signal have the same sign. Therefore, no matter how small the amount of charge stored in the capacitor is, the absolute value of the converted output voltage does not fall below the absolute value of the offset voltage. Therefore, by determining the voltage of the offset signal in accordance with the range of the desired output voltage, the amount of charge stored in the capacitor can be minimized, and therefore, the voltage of the input pulse and the capacitance of the capacitor can be reduced. This makes it possible to increase the degree of freedom in designing a circuit or device to which the method is applied.

According to the present invention, there is provided a conversion means for converting a plurality of bits of digital data to be converted into a pulse signal corresponding to the digital data, a nonlinear element to which the pulse signal is applied, and an output of the nonlinear element. A digital / analog conversion circuit, comprising: a capacitor to be applied; and outputting a charge voltage of the capacitor as a converted voltage after cutting off the pulse signal.

With such a configuration of the present invention, the above-described digital / analog conversion method can be realized as a circuit.

Further, since there is no path through which a direct current flows, the amount of current flowing through the present circuit can be suppressed low, so that the power consumption can be reduced as compared with the conventional digital / analog conversion circuit using voltage division of resistors. There is.
Further, since there is no output delay due to a large number of capacitors, there is an effect that a higher-speed operation can be realized as compared with the digital / analog conversion circuit based on voltage division of the capacitors in the related art. Further, a portion of the circuit for converting the width of the pulse signal into an output voltage by charging and discharging has a simple configuration of a nonlinear element and a capacitor, and has an effect that it can be realized with a relatively small area on a substrate or the like.

According to the present invention, a signal having a first pulse width of a preset first voltage and a pulse width corresponding to digital data to be converted, which is formed by the preset second voltage. A charging signal forming circuit that superimposes the second pulse signal to form and output a charging signal, outputs the charging voltage, and then outputs an offset signal formed by a preset third voltage; A non-linear element to which a charging signal and the offset signal are applied, and a capacitor to which an output of the non-linear element is applied, and a terminal voltage of the capacitor after the charging signal forming circuit switches an output to the offset signal. Is output as a converted voltage.

With such a configuration of the present invention, the digital / analog conversion method described above can be realized as a circuit. Further, as described above, since the pulse signal of the first voltage and the pulse signal of the second voltage are superimposed, a variable amount of charge in a desired range can be stored in the capacitor in a minimum necessary time. Further, as described above, since the offset signal is output after the output of the charging signal, an output voltage in a desired range can be realized with a minimum necessary amount of accumulated charge. As a result, there is a margin in the capacity and the like of the capacitor in circuit design, and there is an effect that it can be realized with a relatively small area on a substrate or the like.

In the present invention, the non-linear element may be a metal-insulator-metal obtained by laminating chromium (Cr) or aluminum (Al) electrodes on anodized tantalum (Ta) or aluminum (Al). It is preferable to have the following structure.

With such a configuration of the present invention, a non-linear element having current-voltage characteristics suitable for digital / analog conversion with low power consumption can be realized. In addition, since such a structure can be formed on a substrate, when the digital / analog conversion circuit according to the present invention is used in an electro-optical display device or the like, it is possible to incorporate the circuit on a display panel. This has the effect of reducing the size of the device.

In the present invention, the metal-insulator-
It is preferable that the nonlinear element having a metal structure has a back-to-back structure.

According to such a configuration of the present invention, the metal 1
Since a non-linear element having a symmetric structure of -insulator-metal 2-insulator-metal 1 is used in the circuit, a current-voltage characteristic symmetrical with respect to the polarity of voltage application can be obtained.

Therefore, when the digital / analog conversion circuit according to the present invention is used in an electro-optical display device or the like, even if the AC drive for inverting the polarity of the applied voltage every one horizontal scanning period is performed, the output voltage due to the difference in the polarity is obtained. Since there is no difference, the effect that the accuracy of gradation display can be improved can be obtained.

In the present invention, the nonlinear element is preferably a diode using p-type or n-type silicon (Si).

With such a configuration of the present invention, it is possible to realize a nonlinear element having current-voltage characteristics suitable for digital / analog conversion with low power consumption. In addition, since such a structure can be formed on a substrate, when the digital / analog conversion circuit according to the present invention is used in an electro-optical display device or the like, it is possible to incorporate the circuit on a display panel. There is an effect that the size can be reduced.

In the present invention, it is preferable that the non-linear element is constituted by connecting two diodes arranged in opposite directions in parallel.

According to such a configuration of the present invention, since a non-linear element having a symmetrical polarity is used in the circuit, a current-voltage characteristic that is symmetric with respect to the polarity of the applied voltage can be obtained.

Therefore, when the digital / analog conversion circuit according to the present invention is used in an electro-optical display device or the like, even if the AC drive for inverting the polarity of the applied voltage is performed every horizontal scanning period, the output voltage due to the difference in the polarity is obtained. Since there is no difference, the effect that the accuracy of gradation display can be improved can be obtained.

In the present invention, it is preferable that the capacitance of the capacitor is in a range of 2 to 8 times the capacitance of the nonlinear element.

According to such a configuration of the present invention, the dynamic range of the output voltage can be widened. Therefore, when an electro-optical display device or the like is configured using the digital / analog conversion circuit according to the present invention, it is advantageous in controlling gray scale display. In addition, since the resistance value of the nonlinear element can be made sufficiently large by such a configuration of the present invention, power consumption can be reduced.

Also, the present invention provides a method for controlling a plurality of pixels arranged in a matrix on a substrate, a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate, A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one for each data line Provided above, comprising data line driving means for driving the data line, wherein the data line driving means converts display data into a pulse signal having a width corresponding to the display data;
An electro-optical device includes a non-linear element to which the pulse signal is applied, and a capacitor to which an output of the non-linear element is applied, and outputs a charging voltage of the capacitor to the data line. .

According to such a configuration of the present invention, a voltage corresponding to display data is applied to a pixel using a digital / analog conversion circuit which is relatively simple, can operate at high speed, and consumes low power. Thus, an electro-optical device that performs gradation display can be realized. Since the configuration of the digital / analog conversion circuit is simple, the configuration of the digital / analog conversion portion provided on the pixel panel or in the peripheral portion can be simplified. In addition, since high-speed operation is possible, a margin can be provided for display timing, and high-definition display can be performed and a scanning cycle can be shortened. In addition, since the digital / analog converter has low power consumption, an effect of further lowering power consumption can be obtained in a device such as a reflection type liquid crystal display device which has low power consumption.

Further, the present invention provides a method for controlling a plurality of pixels arranged in a matrix on a substrate, a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate, A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one for each data line And a data line driving unit for driving the data line, wherein the data line driving unit is configured to add a second pulse to a signal of a first pulse width of a first voltage set in advance. A charge signal is formed by superimposing a second voltage having a pulse width corresponding to the display data, which is formed by the third voltage, and the charge signal is output. After the charge signal is output, the second charge signal is formed by a preset third voltage. Off A charging signal forming circuit for outputting a reset voltage, a non-linear element to which the charging signal and the offset signal are applied, and a capacitor to which an output of the non-linear element is applied. The present invention provides an electro-optical device characterized by outputting to an electro-optical device.

According to such a configuration of the present invention, as described above, the timing of applying the charging voltage can be effectively used by superimposing the pulses of the first and second voltages, and By applying a voltage, even when a digital / analog converter is provided on a substrate, it can be realized with a small area. Thereby, there is an effect that high-speed operation and downsizing of the entire apparatus can be realized.

In the present invention, the data line driving means has a switching means at an output portion to the data line, and the switching means turns off when the charging signal is applied to the nonlinear element. Preferably, the terminal of the capacitor is electrically disconnected from the data line, and when the offset signal is applied, the terminal is turned on to electrically connect the terminal of the capacitor and the data line.

According to such a configuration of the present invention, when accumulating charges in the capacitor by the pulse signal generated in accordance with the input digital signal, the influence of the wiring capacitance of the data line and other stray capacitance is reduced. can do. Therefore, the circuit operation can be made more efficient,
The effect that the precision of digital / analog conversion can be improved is obtained.

Further, in the present invention, it is preferable that the capacitor is a wiring capacitance of the data line.

According to such a configuration of the present invention, it is not necessary to provide a capacitor in the data line driving means, so that the circuit configuration can be further simplified and the device can be downsized.

Also, the present invention provides a method for controlling a plurality of pixels arranged in a matrix on a substrate, a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate, A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one for each data line A data line driving unit for driving the data line, wherein the data line driving unit converts display data into a pulse signal corresponding to the display data, and the pulse signal is applied to the data line driving unit. The first and second nonlinear elements, the first and second capacitors to which respective outputs of the first and second nonlinear elements are respectively applied, and the charging voltage of the first and second capacitors are set in advance. And gist an electro-optical device characterized by comprising a second switching means for outputting to the data lines alternately based on the scanning timing of the scanning line.

According to such a configuration of the present invention, first,
Since the charge signal of the second capacitor and the offset signal are output to one data line at different timings, it is possible to increase the time during which the voltage resulting from the digital / analog conversion is output to the data line.

In the electro-optical device having such a configuration,
A pulse signal of a charge signal is generated based on data for one pixel, the first and second capacitors are charged at a shifted timing, and an output voltage is continuously applied to one pixel at another timing. For example, the driving time of one pixel can be extended. Further, a pulse signal of the charging signal is generated based on the data of two pixels, respectively, and the first and second charging signals are respectively generated.
If the second capacitor is charged and the output voltage is applied to different pixels at different timings, the number of driving pixels per unit time can be increased. As a result, it is possible to obtain a high-definition display and a smooth moving image display by high-speed scanning.

Also, the present invention provides a method for controlling a plurality of pixels arranged in a matrix on a substrate, a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate, A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one for each data line And a data line driving unit for driving the data line, wherein the data line driving unit is configured to add a second pulse to a signal of a first pulse width of a first voltage set in advance. A charging signal is formed by superimposing a second pulse signal having a pulse width corresponding to the display data, which is formed by the voltage of the display signal, and the charging signal is output. Is First and second charging signal forming circuits for outputting an offset signal, first and second nonlinear elements to which the output of the charging signal forming circuit is applied, and respective outputs of the first and second nonlinear elements And second switching means for alternately outputting the charging voltage of the first and second capacitors to the data line based on the scanning timing of the scanning line. The gist of the present invention is an electro-optical device that is provided.

According to such a configuration of the present invention, first,
Since the charging voltages of the second capacitor are output to one data line at different timings, it is possible to increase the time during which the voltage resulting from the digital / analog conversion is output to the data line. In addition, as described above, it is possible to obtain an effect that high-definition display and smooth moving image display by high-speed scanning can be realized.

Also, according to such a configuration of the present invention,
As described above, by superimposing pulses of the first and second voltages, it is possible to effectively use the timing of applying the charging voltage, and by applying the offset voltage, the digital / analog conversion unit is mounted on the substrate. Even when it is provided above, it can be realized with a small area. Thereby, there is an effect that high-speed operation and downsizing of the entire apparatus can be realized.

In the present invention, it is preferable that the capacitance of the capacitor is at least three times the capacitance between a pixel electrode and a common electrode in the pixel.

According to such a configuration of the present invention, the electric charge is accumulated by a capacitance sufficiently larger than the capacitance of the pixel, and the level of the output voltage is controlled by the amount of the electric charge. Thus, the effect that the accuracy of gradation display of the electro-optical device can be improved can be obtained.

Further, in the present invention, it is preferable that the capacitance of the capacitor is at least ten times the capacitance between the pixel electrode and the common electrode in the pixel.

According to such a configuration of the present invention, the electric charge is accumulated with a much larger capacity than the capacity of the pixel,
Since the level of the output voltage is controlled by the amount of charge, the accuracy of the digital / analog conversion is further improved, so that the accuracy of the gradation display of the electro-optical device can be further improved.

Further, according to the present invention, tantalum (T
a) a first step of forming a pattern of input electrode wiring and output electrode wiring with aluminum (Al);
A second step of forming an oxide layer having a thickness in the range of 20 nm to 80 nm by anodizing the input electrode wiring and the output electrode wiring, and forming the oxide layer on the oxide layer at a temperature of 300 ° C. to 500 ° C. A third step of performing an annealing treatment at a temperature within a range of not more than a degree, and forming the oxide layer formed on the input electrode wiring and the output layer formed on the output electrode wiring by aluminum (Al) or chromium (Cr). A fourth step of forming an electrode pattern for bridge-connecting the oxide layer.
The gist is a method for manufacturing an analog conversion circuit.

According to such a configuration of the present invention, the following nonlinear element can be formed on the substrate. That is, the electrode at one end formed in the first step, the insulating layer formed in the second and third steps, the intermediate electrode formed in the fourth step, and the second and This is a nonlinear element in which the insulating layer formed in the third step and the electrode at the other end formed in the first step are electrically connected in series. Further, since such a device manufactured by the method of the present invention has a back-to-back structure, it has positive-negative symmetric voltage-current characteristics with respect to polarity. For example, in an electro-optical display device, the polarity of an applied voltage is changed for each line. Suitable for an AC drive circuit for reversing.

Also, the present invention provides a first step of forming a pattern of an input electrode wiring and an output electrode wiring on a substrate by using a polysilicon film, and a step of forming a pattern on the input electrode wiring and the output electrode wiring by a chemical vapor deposition apparatus. Hydrogen-treated silicon nitride (SiN _x : H) of at least 20 nanometers 8
A second step of forming an insulating layer by forming a film to a thickness of 0 nm or less; and forming the insulating layer formed on the input electrode wiring and the insulating layer formed on the output electrode wiring. And a third step of forming an electrode pattern for bridge connection.

According to such a configuration of the present invention, the following nonlinear element can be formed on the substrate. That is, the electrode at one end formed in the first step, the insulating layer formed in the second step, the intermediate electrode formed in the third step, and the second electrode
A non-linear element in which an insulating layer formed in the process and an electrode on the other end formed in the first process are electrically connected in series. Further, since such a device manufactured by the method of the present invention has a back-to-back structure, it has positive-negative symmetric voltage-current characteristics with respect to polarity. For example, in an electro-optical display device, the polarity of an applied voltage is changed for each line. Suitable for an AC drive circuit for reversing.

In the present invention, on the substrate,
It is preferable to have a capacitance formation step of forming a capacitance element with the same structure and process as the storage capacitance of the pixel.

According to such a configuration of the present invention, it is possible to form and provide a capacitor dedicated to the digital / analog conversion circuit in parallel with the process of forming the storage capacitor of the pixel portion, and to provide the capacitor dedicated to the digital / analog conversion circuit. Since the process of forming the capacitor and the process of forming the pixel electrode can be shared, there is an effect of reducing the manufacturing cost and the manufacturing time.

Further, in the present invention, on the substrate,
It is preferable to have a switching means forming step of forming a switching element for turning on / off the digital / analog conversion output with the same structure and process as the pixel switching thin film transistor.

According to such a configuration of the present invention, it is possible to provide the output switching element of the digital / analog conversion circuit on the same panel as the pixel portion of the electro-optical device, and it is possible to reduce the size of the device. There is. Also,
Since the process of forming the output switching element of the digital / analog conversion circuit and the process of forming the pixel switching element can be shared, there is an effect of reducing the manufacturing cost and the manufacturing time.

[0058]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a basic configuration of a D / A (digital / analog) conversion circuit according to the first embodiment. In this figure, reference numeral 1 is an equivalent circuit of the nonlinear element, and reference numeral 2 is a capacitor. The non-linear element 1 and the capacitor 2 are connected in series so that one end of the non-linear element 1 receives an input voltage pulse Vin.
And outputs the potential Vout at the connection portion with the.

FIG. 2 is a graph showing current-voltage characteristics of the nonlinear element 1. As shown in this figure, the nonlinear element 1 has a very high resistance value in a voltage range smaller than a predetermined voltage, but as the applied voltage increases,
The resistance value gradually decreases, and a large amount of current flows. The nonlinear element 1 also has a capacitance component in the element itself, as shown in the equivalent circuit in FIG. The specific configuration, structure, and manufacturing method of such a nonlinear element 1 will be described later.

Next, the principle of D / A conversion by the circuit shown in FIG. 1 will be described. FIG. 3A is a timing chart showing respective waveforms of the input voltage Vin and the output voltage Vout of the D / A conversion circuit. In FIG. 3A, the waveform of the input voltage Vin is indicated by a dotted line 101, and the output voltage V
Out waveforms are indicated by solid lines 102, respectively. The minimum unit of the operation of this circuit is composed of two phases, a charging period and a holding period. The range indicated by t1 in FIG. 3A is the charging period, and the range indicated by t2 is the holding period. In FIG. 3A, the charging period t1 and the holding period t2
Are the same length, but they need not be the same in the practice of the present invention.

First, when a pulse voltage having a potential of + V1 is input during the charging period, first, Vout is determined according to the capacitance ratio of the capacitance component included in the non-linear element 1 and the capacitor 2.
, The charging of the capacitor 2 via the non-linear element 1 starts, and the output voltage Vout gradually rises accordingly. After a certain time,
The potential of V2 is added, and the input voltage Vin becomes (V1 + V
2), and the output voltage Vout rises accordingly. Here, the time during which (V1 + V2) is input, that is, the pulse width is td1. The amount of charge stored in the capacitor 2 and the magnitude of Vout reflecting the amount of charge are represented by the magnitudes of pulse voltages + V1 and + V2, and t1 and td.
It is determined by the time at which they are applied, such as one.

The resistance value of the non-linear element is the voltage applied to the non-linear element, that is, the input voltage Vin and the output voltage Vo.
ut, it changes with a relatively low resistance during the charging period t1 to which a high write voltage is applied, so that the capacitor 2 is charged.
In the holding period described below, the resistance is increased and works to hold the electric charge stored in the capacitor 2.

Next, when the input voltage Vin falls to + V3 at the beginning of the holding period, the output voltage V is adjusted according to the capacitance ratio of the capacitor 2 and the capacitor included in the nonlinear element 1.
Out also falls, but thereafter, since the potential applied to the non-linear element 1 is small and the resistance of the non-linear element is large, the electric charge accumulated in the capacitor 2 is not discharged, and the magnitude of Vout also changes. do not do.

In a display device having a resolution such as VGA to XGA, the charging period t1 and the holding period t2 are on the order of tens to hundreds of microseconds or less.

As a result of the above operation, the output voltage Vout during this holding period has a positive correlation with the amount of electric charge stored in the capacitor 2, so that the voltage (V1 + V2) is obtained by pulse width modulation (PWM) of the digital signal. Pulse width td
By controlling 1, an analog voltage output corresponding thereto can be obtained. Input pulse potentials V1, V2,
As V3, an appropriate value according to a desired output voltage range and various circuit constants such as a resistance value and a capacitance value is used.

In the waveform shown in FIG. 3A, a positive voltage is input during the first charging period, and a negative voltage is input during the next charging period. This figure shows a case where a pixel is driven by a voltage whose polarity is inverted for each scanning line in a liquid crystal display device or the like. This circuit is configured so that the input / output relationship has a positive / negative symmetric characteristic that does not depend on the polarity of the voltage.

One of the following two types can be used as the nonlinear element of this circuit. First, MIM (metal-in-metal) in which electrodes such as chromium or aluminum are laminated on anodized tantalum or aluminum.
A sulator-metal element having a metal-insulator-metal structure. In order to obtain the above-mentioned polarity symmetrical input / output characteristics, the MIM element has a back-to-back structure in which the MIM elements are connected in series in opposite directions. Specifically, for example, an element having a laminated structure of chromium-tantalum oxide film-tantalum tantalum oxide film-chromium is used.

The second is a diode structure using p-type or n-type silicon. In order to obtain polarity symmetrical input / output characteristics in this diode structure, a ring structure (DR) in which two diode elements are connected in parallel in opposite directions is used.

Next, a description will be given of a first embodiment in which a liquid crystal display device (electro-optical device) is configured using the above-described D / A conversion circuit. FIG. 4 is a circuit diagram illustrating a D / A conversion unit and a pixel unit of the liquid crystal display device according to the same embodiment.
In this figure, reference numeral 10 denotes a D / A conversion unit, and reference numeral 20 denotes a pixel unit.

In the pixel section 20, the pixels 11 are arranged in a matrix, and the data lines 14 are arranged vertically and the scanning lines 1 are arranged horizontally.
5 are provided. The on / off control of the pixel electrode switching element 12 in the pixel 11 is performed by the voltage of the scanning line 15, and the voltage of the data line 14 is applied to the pixel electrode only when it is on. The light transmittance of the liquid crystal 13 sandwiched between the pixel electrode and the common electrode changes according to the applied voltage.

The D / A conversion section 10 is provided with a D / A conversion circuit including a nonlinear element 1 and a capacitor 2 corresponding to each data line 14. In addition, this D /
The D / A conversion output switching element 3 provided in the output part of the A conversion circuit and realized by a transistor is on / off controlled by the voltage of the D / A conversion timing switching signal line 4.

FIG. 5 is a block diagram showing the overall configuration of the present apparatus including peripheral circuits. In FIG.
Denotes a liquid crystal panel substrate, and 32 denotes a scanning driver for driving the scanning lines 15. Further, the data driver 33 receives ± V1, ± (V1 + V2), ± V3 voltages from the voltage supply source 34 and sends a pulse waveform corresponding to the pulse width data output from the data modulation circuit 35 to the D / A converter 10. Output.

Next, the circuit operation of the present apparatus will be described.
The input display data is first converted by the data modulation circuit 35 into pulse input timing data corresponding to the luminance of each pixel. This conversion is performed as follows. The data modulation circuit 35 is provided with a pulse input timing storage means realized by a semiconductor ROM or the like.
This pulse input timing storage means stores at which timing during the charging period a pulse having a potential of (V1 + V2) should be raised in accordance with each luminance.

For example, as shown in FIG.
In order to input a pulse having a width of 1, the potential is set to V1 at the time when the time (t1-td1) has elapsed after the start of the charging period.
(V1 + V2). Since the entire apparatus is synchronized by the reference clock pulse generated by the reference clock generation circuit 36, specifically, the above timing is controlled using the number of reference clock pulses. Although the clock pulse width td1 and the transmittance of the pixel have a correlation, the relationship is non-linear due to the stray capacitance of the data line 14 and the electro-optical characteristics of the liquid crystal. Accordingly, the pulse input timing storage means stores, for example, 64 reference clock pulse count values corresponding to each stage for 64 levels of gradation display from 0 to 63.

The thus generated pulse timing data for each pixel is passed from the data modulation circuit 35 to the data driver 33, and each pixel is driven using this data as follows. The scanning driver 32 sequentially scans the scanning lines 15 from the top based on the input vertical synchronization signal and horizontal synchronization signal. FIGS. 3C and 3D are timing charts showing the potentials of two adjacent scanning lines. As shown, the potential of the scanning line 15 at the timing of scanning is “H”. Level, and at other timings the level becomes “L”.

In synchronization with the scanning timing, the data driver 33 controls the basic potentials ± V1, ± (V1 + V2), ± V3 supplied from the voltage supply source 34 based on the timing data passed from the data modulation circuit 35. Is used to generate a voltage pulse having a waveform as shown in FIG.
The data is input to a D / A conversion circuit corresponding to each pixel of the A conversion unit 10.

FIG. 6 is a circuit diagram showing a configuration of a pulse wave generation circuit built in data driver 33. The data driver 33 switches between the six types of voltages received from the voltage supply source 34 and the common voltage COM by inputting the signals S1 to S7 to the switches 41 to 47, generates a desired pulse waveform, and generates a D / A Output to the converter.

A pulse signal as shown in FIG. 3B is supplied to the D / A conversion timing switching signal line 4. During the charging period, since the pulse potential is “L”, the D / A conversion output switching element 3 is turned off,
The output voltage of the D / A conversion circuit is not transmitted to the data line 14,
Therefore, the electric charge is stored in the capacitor 2 without leaking to the floating capacitance of the data line 14. In the holding period, the D / A conversion timing switching signal line 4 becomes “H” level, the D / A conversion output switching element 3 is turned on, and the output voltage of the D / A conversion circuit is applied to the data line 14. Is done.

As shown in FIG. 3, the timing of the scanning of the scanning line 15 and the timing of the application of the output voltage of the D / A conversion circuit to the data line 14 are synchronized. When the scanning line 15 is at “H” level, the pixel electrode switching element 12 connected to the scanning line 15 is turned on, and the data line 14 connected to the pixel electrode switching element 12 is turned on.
Is applied to the pixel electrode, and the liquid crystal 13 of the pixel changes to a state corresponding to the applied voltage. When the level is at the “L” level, the pixel electrode switching element 12 is turned off.

As described above, the digital signal based on the input image data is converted into an analog voltage by the D / A conversion circuit, and this voltage is applied to the pixel electrode in synchronization with the scanning line timing. Perform gradation display.

In the present device, the range of the voltage applied to the pixel electrode is determined by the liquid crystal used, and the resistance value and the capacitance value of the nonlinear element 1 and the capacitor 2 are taken into consideration so that the voltage range can be realized. And the basic voltage V1,
(V1 + V2) and V3 are selected in advance so that they can be supplied from the voltage supply source.

Further, the pixel transmittance according to the pulse width is measured by an experiment in advance, and the pulse width of each signal is determined from the measurement result so that the equally spaced gray scales according to the display data can be reproduced. The pulse input timing data based on this is stored in the pulse input timing storage means in the data modulation circuit 35.

In this embodiment, the scanning driver 3
2. Although the data driver 33 and the D / A converter 10 are formed on the liquid crystal panel substrate 31, one or both of the scanning driver 32 and the data driver 33 may be incorporated in an IC or the like outside the substrate. In addition, D / A
The conversion unit 10 may be incorporated in an IC or the like outside the substrate.

Next, a second embodiment of the electro-optical device according to the present invention will be described. FIG. 7 is a circuit diagram showing a configuration of a D / A conversion unit and a pixel unit of the liquid crystal display device according to the same embodiment. The circuit shown in this figure is different from the circuit of the first embodiment shown in FIG.
It does not have a dedicated conversion capacitor.
The point is that the capacity 51 of the data line 14 disposed at 0 is used. With this configuration, the D / A conversion unit 10
The / A conversion output switching element 3 and the D / A conversion timing switching signal line 4 are not required, and the circuit configuration can be further simplified.

The D / A conversion and the pixel drive timing of this device will be described with reference to FIG. FIG. 3 shows the D / A conversion circuit.
A voltage pulse having a waveform and timing as shown in FIG.

In the first charging period shown in FIG. 3A, the potential levels of all the scanning lines 15 are "L",
Therefore, since all the pixel electrode switching elements 12 are turned off, positive charges are accumulated in the wiring capacitance 51 by the input positive potential pulse. In the next holding period, the input potential falls to V3 and the input pulse width td1
Is applied to the data line 14. At this time, the non-linear element constituting the D / A converter has a low applied voltage and therefore has a high resistance, and the analog potential of the data line is maintained. In synchronization with this, as shown in FIG. 3C, the potential level of the scanning line 15 currently being scanned becomes “H”, and the pixel electrode switching element 12 connected to this scanning line 15 is turned on. Data line 14
Is applied to the pixel electrode. In the next charging period and holding period, a pulse of a negative potential is input to the D / A conversion circuit, and the same operation is performed for the next scanning line 15.

Parts other than the D / A conversion section 10 and the pixel section 20 are the same as those in the first embodiment, as shown in FIG.
The device configuration is as shown in FIG.

The D / A converter in this embodiment has a simple structure without a dedicated capacitor, a D / A conversion output switching element, and a D / A conversion timing switching signal line. There is a merit that it is easier to form.

Next, a third embodiment of the electro-optical device according to the present invention will be described. FIG. 8 is a circuit diagram showing a configuration of a D / A conversion unit and a pixel unit of the liquid crystal display device according to the same embodiment. The feature of this configuration is that two sets of D / A conversion circuits and a D / A conversion output switching element connected thereto are present in parallel, and their outputs are connected to one data line 14. That is.

The nonlinear elements 1a and 1b receive separate input signals, respectively, and the D / A conversion output switching elements 3a and 3b are connected to separate D / A conversion timing switching signal lines 4a and 4b, respectively.
On / off control.

The operation timing of the present apparatus will be described with reference to the drawings. FIG. 9 shows the D / A conversion unit 10 and the pixel unit 2 of this device.
6 is a timing chart showing the operation of the "0". In this figure, the waveforms shown in (a) and (b) are input voltage pulses applied to the nonlinear elements 1a and 1b, respectively. For example, “Ha (m)” in the drawing represents a horizontal scanning period in which pixels connected to the m-th scanning line 15 are scanned via the nonlinear element 1a. Similarly, "Hb (m)"
Is a horizontal scanning period in which scanning is performed via the nonlinear element 1b, and "Hb (m)" has a phase delayed by half a horizontal scanning period from "Ha (m)".

FIGS. 9 (c) and (d) show D
5 is a signal waveform of the / A conversion timing switching signal lines 4a and 4b. These two are alternately "H" and "L"
Are transmitted, so that the respective D / A conversion output switching elements 3a and 3b are turned on during the holding period of each D / A conversion circuit.

FIG. 9E shows the waveform of the pulse signal of the m-th scanning line 15. During the first half of the period in which this pulse rises to the “H” level, the voltage output via the D / A conversion output switching element 3a is applied to the data line 14, and during the second half of the same period,
The voltage output via the D / A conversion output switching element 3b is applied to the data line 14. in this way,
The D / A conversion output is applied to the pixel electrode throughout one horizontal scanning period shown in FIG. FIG. 9F shows the pulse waveform of the (m + 1) -th scanning line 15. In this horizontal scanning period, the same operation is performed by a negative input voltage.

As described above, the present apparatus is one unit smaller than the apparatus described in the first and second embodiments.
There is a timing advantage that a driving period twice as long as a pixel can be taken. That is, at the timing shown in FIG. 3, the first half of the scan selection period assigned to the pixel is used for charging the D / A conversion unit capacitor, and the second half of the scan selection period is used for writing to the pixel. All the time in the selection period can be used for writing to the pixel. This is particularly effective for a display having a large number of scanning lines and a short selection period per scanning line.

Further, since the signal of each pixel is determined by the combination of the drive signals composed of two parts such as "Ha (m)" and "Hb (m)", more precise gradation control becomes possible. There is also a merit. That is, each D / A
The conversion unit generates data for 32 gradations and combines them to obtain an output voltage for 64 gradations.

The pixel connected to one scanning line 15 during both the period when the voltage is output via the switching element 3a and the period when the voltage is output via the switching element 3b as described above. Instead of applying voltage to the electrodes,
The scanning of the next scanning line 15 may be started at the timing of switching between the switching elements 3a and 3b.
In this case, the waveform of the pulse signal of the scanning line 15 is as shown in FIG.
(G), (h), (i), and (j).

By performing such an operation, as in the previous example, the entire time of the scanning selection period can be used for writing to the pixel. In this case, if the polarity is inverted for each scanning line, the signal shown in FIG. 9B needs to be obtained by inverting the polarity, and Ha () in FIGS. 9A and 9B is used. m) and Hb (m) are applied signals to adjacent scanning lines.

The first to third embodiments of the electro-optical device have been described above. Next, the capacity of the D / A conversion circuit incorporated in these devices will be described. First, the capacitance C2 of the capacitor 2 is twice to 8 times the capacitance C1 of the nonlinear element 1.
Desirably, it is desirably in the range of twice, and particularly desirably about four times. The same applies to the nonlinear element 1 and the wiring capacitance 51 in FIG.

The reason is that, when the above ratio is about four times, the dynamic range of the analog output voltage can be maximized, which is advantageous for the gradation display. It is because it has become. When the input voltage is V, the voltage applied to the nonlinear element 1 at the timing when the input voltage is applied is V · C2
/ (C1 + C2), however, if the above ratio is twice or less, a sufficient voltage is not applied to the nonlinear element 1, which is inconvenient. Further, due to the structure of the nonlinear element 1 in which the insulating thin film is sandwiched between metals, the resistance value of the element has a positive correlation with its capacitance. Therefore, in a circuit configuration in which this ratio becomes 8 times or more, the resistance value becomes relatively small together with the capacitance of the nonlinear element 1, which is inconvenient from the viewpoint of reducing power consumption.

Next, the capacitance C2 is desirably at least three times the capacitance of the liquid crystal per pixel, and more desirably at least ten times. When this ratio is low, especially when the ratio of the liquid crystal becomes relatively large and becomes three times or less,
During the holding period, the capacitor potential of the D / A converter cannot be accurately transmitted to the pixels, and the accuracy of gradation display cannot be increased.

In the construction of the device, the two described here are used.
The capacitance value is determined so as to satisfy the two conditions, and a capacitor suitable for this is incorporated in the circuit, or the thickness of the data line 14 is determined so as to obtain the wiring capacitance 51 suitable for this.

The characteristics of the nonlinear element 1 are such that when the applied voltage changes in the range of 4 V to 10 V, the value of the flowing current changes by 100 times or more.

Next, a manufacturing method for forming such a D / A conversion circuit on a liquid crystal panel substrate will be described.

First, a first method for forming an MIM element having a back-to-back structure as a nonlinear element on a substrate will be described.

In this method, first, in a first step, an electrode of tantalum or aluminum is formed on a base film formed of a Ta or Si oxide film on a glass substrate. FIG. 10A is a plan view at the stage when the electrodes are formed, and FIG.
It is sectional drawing in line 591 of (a). In FIG. 10, reference numeral 501 denotes a substrate, 502 denotes a base film on the substrate, 51
Reference numerals 1 and 521 denote electrodes of the nonlinear element formed by the present process.

Next, in a second step, using citric acid or the like as a chemical conversion solution, a voltage of 10 V to 40 V is applied.
The electrodes 511 and 521 are anodized. As a result, an oxide layer having a thickness in the range of 20 nm to 80 nm is formed on the electrode surface. FIG. 11A is a plan view at the stage when the oxide layer is formed, and FIG.
FIG. 12B is a cross-sectional view taken along line 592 of FIG. In FIG. 11, reference numerals 512 and 522 denote oxide layers formed on the electrodes 511 and 521, respectively. The oxide layers 512 and 522 serve as insulating films in the nonlinear element formed by this process.

Next, in a third step, annealing is performed at a temperature of 300 to 500 degrees Celsius for about one hour. Oxidation layers 512 and 522 are denser by this annealing treatment, so that the reliability of the formed element is improved.

Finally, in a fourth step, a pattern of the upper electrode is formed of aluminum or chromium. FIG. 12A is a plan view at the stage when the upper electrode is formed, and FIG. 12B is a cross-sectional view taken along a line 593 in FIG. In FIG. 12, reference numeral 531 denotes an upper electrode, and the upper electrode 531
2 and 522 are formed in such a pattern as to bridge-connect.

According to the above-described process, FIG.
510 and 520 are formed. For example, when an electrode is formed using tantalum in the first step and an electrode is formed using aluminum in the fourth step, the tantalum-electrode is formed between the electrodes 511 and 521. A non-linear element having a back-to-back structure of tantalum oxide-aluminum-tantalum oxide-tantalum is formed on a substrate.

Next, a second method for forming a non-linear element having a back-to-back structure on a substrate will be described. First,
In the first step of this method, a pattern of an input electrode and an output electrode is formed by a polysilicon film on a substrate. FIGS. 10A and 10B are a plan view and a cross-sectional view of the substrate at the stage when these electrodes are formed.
Is the same as

Next, in a second step, a PECVD (Plasma Enhancer) is formed on the input electrode and the output electrode.
hydrogenated silicon nitride (S) by a ced Chemical Vapor Deposition (plasma chemical vapor deposition) system.
iN _x : H) is formed to a thickness of 20 nm to 80 nm to form an insulating layer. Plan views and cross-sectional views of the substrate at the stage when these insulating layers are formed are the same as those in FIGS. 11A and 11B, respectively.

Finally, in a third step, an upper electrode for bridge-connecting the insulating layer formed on the input electrode and the insulating layer formed on the output electrode is formed. FIGS. 12A and 12B are a plan view and a cross-sectional view of the substrate at the stage when the upper electrode is formed.
Is the same as

A diode using a junction of p-type and n-type semiconductors may be used as a non-linear element. At this time, in order to obtain positive-negative symmetry in the electrical characteristics of the nonlinear element, it is preferable to adopt a ring structure in which two diodes arranged in opposite directions are connected in parallel.

The various manufacturing methods for forming the non-linear element on the substrate have been described above. However, when a capacitor dedicated to the D / A conversion circuit is provided on the same substrate, the same process and the same as the pixel holding capacity of the pixel portion are performed. It can be formed in a structure. When the D / A conversion output switching element is provided on the same substrate, the D / A conversion output switching element can be formed by the same process and structure as the pixel electrode switching TFT in the pixel portion.

As described above, by providing the D / A conversion circuit on the same substrate as the pixels, the size of the device can be reduced, and the cost can be reduced by the common manufacturing process. is there.

The D / A conversion method, the D / A conversion circuit, and the method of manufacturing the D / A conversion circuit according to the present invention described above can be applied to both reflective and transmissive liquid crystal devices.
In a reflection type liquid crystal device that does not require a light emitting unit such as a backlight, the advantage of lower power consumption of the D / A conversion circuit is even greater. The reason is that the reflection type has a relatively high power ratio of the D / A conversion circuit in the power consumption of the entire device.

Next, an application example utilizing the effects of the present invention will be described. FIG. 13A is an external view of a portable telephone terminal incorporating the liquid crystal display device according to the present invention. The portable telephone terminal 1000 uses a liquid crystal display panel 1001 to transmit various information such as operation menus and communication contents. It is displayed.

FIG. 13B is an external view of a wristwatch incorporating the liquid crystal display device according to the present invention. The wristwatch displays information such as time and calendar on a liquid crystal display panel 1101.

FIG. 13C is an external view of a portable information terminal incorporating the liquid crystal display device according to the present invention. The portable information terminal 1200 has a function of a personal computer or a PDA (Personal Digital Assistant), and various information is displayed on the liquid crystal display panel 1206 according to these functions.

Since all of the devices shown in FIGS. 13A to 13C use a reflection type liquid crystal display device, and also employ the D / A conversion circuit according to the present invention,
The power consumption is further reduced as compared with the prior art.
Therefore, the frequency of charging and battery replacement can be reduced, and the effect of improving user convenience can be obtained.

In the above description, the liquid crystal device in which the pixel luminance is controlled by the voltage applied to the liquid crystal has been described. However, the electro-optical material is sandwiched between the pixel electrode and the opposing common electrode. The present invention can be applied to an electro-optical device that performs display or the like based on the physical characteristics of the device. Such an electro-optical device includes, in addition to a liquid crystal device, a plasma display, an EL (electroluminescence), an FED (field emission device), and the like, but the application of the present invention is not limited to these.

[0122]

As described above, according to the present invention, a D / A conversion circuit that can operate at high speed with a simple structure and consumes low power, and an electro-optical device that realizes gradation display using the same. It is possible to realize the device. Further, since the configuration is simple, the D / A conversion circuit can be formed on the same substrate as the pixel portion, and the degree of freedom in designing the device is improved. As a result, it is possible to reduce the size, cost, high definition, and power consumption of the electro-optical device capable of displaying gradation.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a D / A conversion circuit according to an embodiment of the present invention.

FIG. 2 is a graph showing current-voltage characteristics of a nonlinear element included in the D / A circuit according to the first embodiment.

FIG. 3 is a timing chart showing the operation timing of the D / A circuit according to the first embodiment;

FIG. 4 is a circuit diagram showing a main configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of the liquid crystal display device according to the same embodiment.

FIG. 6 is a circuit diagram showing a configuration of a voltage pulse generation circuit built in a data driver of the liquid crystal display device according to the same embodiment.

FIG. 7 is a circuit diagram showing a main configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 8 is a circuit diagram showing a main configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 9 is a timing chart showing operation timings of the liquid crystal display device according to the same embodiment.

FIG. 10 is a plan view (a) and a cross-sectional view (b) of a substrate at the stage when input / output electrodes are formed in the method of manufacturing a D / A conversion circuit according to one embodiment of the present invention.

FIG. 11 is a plan view (a) and a cross-sectional view (b) of a substrate at a stage where an insulating layer is formed in the method of manufacturing a D / A conversion circuit according to the same embodiment.

FIG. 12 is a plan view (a) and a cross-sectional view (b) of a substrate at a stage where an upper electrode is formed in the method for manufacturing a D / A conversion circuit according to the same embodiment.

FIG. 13 is an external view of various devices to which the liquid crystal display device according to one embodiment of the present invention is applied.

[Explanation of symbols]

 1, 1a, 1b Non-linear element 2, 2a, 2b Capacitor 3, 3a, 3b D / A conversion output switching element 4, 4a, 4b D / A conversion timing switching signal line 10 D / A conversion unit 11 Pixel 12 Pixel electrode switching Element 13 Liquid crystal 14 Data line 15 Scan line 20 Pixel section 31 Liquid crystal panel substrate 32 Scan driver 33 Data driver 34 Voltage supply 35 Data modulation circuit 36 Reference clock generation circuit 41-47 Switch 51 Wiring capacitance 501 Substrate 502 Underlayer 511, 512 Electrodes 521, 522 Oxide layer (insulating layer) 531 Upper electrode 1001, 1101, 1206 Liquid crystal display panel

Continuation of the front page (72) Inventor Shira Takahashi 3-3-5 Yamato, Suwa-shi, Nagano F-term in Seiko Epson Corporation 2H093 NA16 NC13 NC21 NC34 NC35 ND32 ND39 ND49 5C006 AA15 AA16 AA17 AF83 BB16 BB28 BC12 BC13 BC20 BF36 BF37 FA12 FA41 FA47 GA02 GA03 5C080 AA10 BB05 DD08 DD22 DD26 EE19 EE29 FF12 JJ02 JJ03 JJ04 JJ05 JJ06 5J022 AB08 BA06 CE01 CF07 CG01

Claims (21)

[Claims] 1. Converting a plurality of bits of digital data to be converted into a pulse signal corresponding to the digital data, applying the pulse signal to a capacitor via a non-linear element to charge the capacitor, and charging the capacitor A digital / analog conversion method comprising outputting a voltage as a converted voltage. 2. A signal having a first pulse width of a preset first voltage and a second pulse having a pulse width corresponding to digital data to be converted, which is formed by the preset second voltage. A pulse signal is superimposed to form a charge signal. The charge signal is applied to a capacitor through a non-linear element to charge the capacitor. After the charge signal is output, an offset signal formed by a third voltage set in advance Is applied to the capacitor via the non-linear element, and after switching to the offset signal, the terminal voltage of the capacitor is output as a converted voltage. 3. A conversion unit for converting a plurality of bits of digital data to be converted into a pulse signal corresponding to the digital data, a nonlinear element to which the pulse signal is applied, and a capacitor to which an output of the nonlinear element is applied. And a digital-to-analog conversion circuit that outputs a charged voltage of the capacitor charged by the pulse signal as a converted voltage. 4. A signal having a first pulse width of a preset first voltage and a second pulse having a pulse width corresponding to digital data to be converted, which is formed by a preset second voltage. A charge signal forming circuit for forming a charge signal by superimposing a pulse signal, outputting the charge signal, outputting the charge signal, and then outputting an offset signal formed by a preset third voltage; A non-linear element to which an offset signal is applied, and a capacitor to which an output of the non-linear element is applied, wherein after the charging signal forming circuit switches the output to the offset signal, the terminal voltage of the capacitor is converted. A digital / analog conversion circuit for outputting as a voltage. 5. The non-linear element has a metal-insulator-metal structure in which tantalum (Ta) or aluminum (Al) is anodized and chromium (Cr) or aluminum (Al) electrodes are laminated. The digital / analog conversion circuit according to claim 3 or 4, wherein: 6. The digital / analog conversion circuit according to claim 5, wherein the nonlinear element having a metal-insulator-metal structure has a back-to-back structure. 7. The digital / analog conversion circuit according to claim 3, wherein the nonlinear element is a diode using p-type or n-type silicon (Si). 8. The non-linear element according to claim 2, wherein the two non-linear elements are arranged in opposite directions.
9. The digital / analog conversion circuit according to claim 8, comprising a parallel connection of two diodes. 9. The digital / analog conversion circuit according to claim 3, wherein the capacitance of the capacitor is in a range of 2 to 8 times the capacitance of the nonlinear element. 10. A plurality of pixels arranged in a matrix on a substrate; a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate; A plurality of switching means for driving the pixels controlled by signals of the scanning lines and the data lines; a scanning line driving means for scanning the scanning lines; one or more for each data line; A data line driving unit for driving the data line, wherein the data line driving unit converts display data into a pulse signal corresponding to the display data; and a non-linear circuit to which the pulse signal is applied. An electro-optical device comprising: an element; and a capacitor to which an output of the non-linear element is applied, and outputs a charging voltage of the capacitor to the data line. 11. A plurality of pixels arranged in a matrix on a substrate, a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate, and A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one or more for each data line; Data line driving means for driving the data line, wherein the data line driving means converts a signal having a first pulse width of a first voltage set in advance to:
A charge signal is formed by superimposing a second voltage having a pulse width corresponding to the display data, which is formed by a preset second voltage, and the charge signal is formed and output. A charging signal forming circuit that outputs an offset signal formed by the voltage of No. 3, a non-linear element to which the charging signal and the offset signal are applied, and a capacitor to which an output of the non-linear element is applied. Wherein the terminal voltage is output to the data line. 12. The data line driving means includes switching means at an output portion to the data line, wherein the switching means is turned off when the charging signal is applied to the non-linear element, and the switching of the capacitor is performed. 11. The device according to claim 10, wherein a terminal is electrically disconnected from the data line, and the terminal is turned on when the offset signal is applied to electrically connect a terminal of the capacitor and the data line. Item 12. The electro-optical device according to item 11. 13. The electro-optical device according to claim 10, wherein the capacitor is a wiring capacitance of the data line. 14. A plurality of pixels arranged in a matrix on a substrate; a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate; A plurality of switching means for driving the pixel controlled by signals of the scanning line and the data line; a scanning line driving means for scanning the scanning line; one or more for each data line; A data line driving unit for driving the data line, wherein the data line driving unit converts display data into a pulse signal corresponding to the display data; and a first to which the pulse signal is applied. , A second non-linear element, first and second capacitors to which respective outputs of the first and second non-linear elements are respectively applied, and a charge voltage of the first and second capacitors. Electro-optical device characterized by comprising a second switching means for outputting to the data lines alternately, the based on the scanning timing of the line. 15. A plurality of pixels arranged in a matrix on a substrate; a plurality of intersecting data lines and a plurality of scanning lines arranged between the pixels on the substrate; A plurality of switching means for driving the pixels controlled by signals of the scanning lines and the data lines; a scanning line driving means for scanning the scanning lines; one or more for each data line; Data line driving means for driving the data line, wherein the data line driving means converts a signal having a first pulse width of a first voltage set in advance to:
A charge signal is formed by superimposing a second pulse signal having a pulse width corresponding to the display data, which is formed by a preset second voltage, and the charge signal is formed and output. First and second charging signal forming circuits for outputting an offset signal formed by a third voltage; first and second non-linear elements to which the output of the charging signal forming circuit is applied; First and second capacitors to which respective outputs of the second nonlinear element are respectively applied, and charging voltages of the first and second capacitors are alternately output to the data lines based on the scanning timing of the scanning lines. An electro-optical device, comprising: a second switching unit configured to: 16. The electro-optical device according to claim 10, wherein the capacitance of the capacitor is three times or more the capacitance between a pixel electrode and a common electrode in the pixel. 17. The electro-optical device according to claim 16, wherein the capacitance of the capacitor is at least ten times the capacitance between a pixel electrode and a common electrode in the pixel. 18. A first step of forming a pattern of an input electrode wiring and an output electrode wiring on a substrate using tantalum (Ta) or aluminum (Al), and anodizing the input electrode wiring and the output electrode wiring. A second step of forming an oxide layer having a thickness in the range of 20 nm to 80 nm, and a third step of annealing the oxide layer at a temperature in the range of 300 ° C. to 500 ° C. A fourth step of forming an electrode pattern for bridging the oxide layer formed on the input electrode wiring and the oxide layer formed on the output electrode wiring with aluminum (Al) or chromium (Cr). A method for manufacturing a digital / analog conversion circuit, comprising: 19. A first step of forming a pattern of an input electrode wiring and an output electrode wiring on a substrate by using a polysilicon film, and hydrogen processing is performed on the input electrode wiring and the output electrode wiring by a chemical vapor deposition apparatus. Silicon nitride (SiN
_x : H) in a thickness of not less than 20 nm and not more than 80 nm to form an insulating layer; and the insulating layer and the output electrode wiring formed on the input electrode wiring. A third step of forming an electrode pattern for bridge-connecting the insulating layer formed thereon; and a method of manufacturing a digital / analog conversion circuit. 20. The method according to claim 18, further comprising the step of forming a capacitor on the substrate by the same structure and process as the storage capacitor of the pixel.
10. The method for manufacturing a digital / analog conversion circuit according to item 9. 21. A process for forming a switching means for forming a switching element for turning on / off a digital / analog conversion output on the substrate with the same structure and process as the pixel switching thin film transistor. 21. The method for manufacturing a digital / analog conversion circuit according to any one of claims 20 to 20.