JP2001186543A - Data coder and decoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently encode and decode data of a plurality of channels. SOLUTION: The data coder and decoder of this invention is provided with an Lch use MPEG moving picture coding means 10 and an Rch use MPEG moving picture coding means 12. The Rch use MPED moving picture coding means 12 uses image data of Lch to encode image data of Rch, thereby reducing the code quantity. A control means 14 automatically writes a reference image also to an area for the Rch, when the Lch use MPEG moving picture coding means 10 writes its own reference image to an Lch area of an image data storage means 16, so as to supply the reference image according to a read request from the Rch use MPEG moving picture coding means 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a data encoding apparatus and a decoding apparatus, and more particularly to an apparatus for efficiently encoding (encoding) and decoding (decoding) data of a plurality of channels such as MPEG stereoscopic image data. .

[0002]

2. Description of the Related Art Conventionally, M is used to encode a moving image.
PEG technology is used, and it has been proposed to apply this technology to stereoscopic images. In the MPEG encoder of a three-dimensional moving image, when encoding an image of one eye (for example, right eye), the encoding is performed by referring to an image of another eye (for example, left eye). This utilizes the fact that the image for the left eye and the image for the right eye are similar to each other. If the image for the left eye and the image for the right eye are separately encoded by this method, a code twice as large as one channel is used. Although the amount is necessary, the same image quality can be obtained with a code amount about 1.5 times.

FIG. 19 shows a conventional three-dimensional moving image MPEG.
A configuration block diagram of the encoder is shown. MPEG
In the encoding of, compression encoding is performed by referring to the past or future images that are similar to each other. There are three types of MPEG images, I (Intra) picture and P (Predicted) picture, respectively.
A picture is called a B (Bidirectional) picture. An I picture is a DC in block units, like JPEG.
Compression encoding is performed by transforming into a frequency transform domain by T (discrete cosine transform) and quantization. P pictures are compression-encoded by referring only to past I or P pictures. B pictures are compression-encoded by referring to past and future I pictures and / or P pictures, or both. At this time, the decoder side decodes the decoded I picture or P picture based on the decoded I picture or P picture, and the encoder side also has to perform the encoding under the same conditions. It is necessary to hold a P picture image as a reference image.

In FIG. 19, a right channel Rch (for right eye) encoder 100 and a left channel Lch (for left eye)
An encoder 200 is provided. The Rch encoder 100 encodes using the reference image from the L channel encoder 200 (of course, the Lch encoder
The encoder 200 may encode using the reference image from the Rch encoder). First, the Lch encoder 200 will be described.

When an I picture is input, it is stored in the frame memory FM201 and then subjected to scan conversion in units of macroblocks (16 × 16 pixels in luminance, 8 × 8 pixels in color difference). Then, the DCT unit 203 performs a DCT transform on a block basis (8 × 8 pixels), and a quantization unit Q204
Is quantized by The quantized image data is variable-length coded by a variable-length coding unit VLC 205, compression-coded, temporarily stored in a buffer 206, and output at a predetermined rate. On the other hand, the quantized I picture data is supplied to an inverse quantization unit IQ207 and an inverse DCT unit (IDCT) 20.
8 and as a reference image, the frame memory FM21
0 is stored.

When a P picture is input, once FM2
After that, scan conversion is performed for each block. The reference image stored in the FM 210 and the P picture data to be encoded are detected by the detection unit ME212.
The comparison is performed in units of macroblocks to detect a motion vector. After detecting how much each macroblock moves, the motion compensation unit MC211 uses this information to
The corresponding data is read from the reference image stored in 210, and the difference between them is calculated by the difference unit 202, and the difference value is DCT-transformed and quantized. When the difference value is compression-coded, the motion vector is also coded.

When a B picture is input, first, F
Image data is stored in M201, and the order of encoding is changed. This is because in the case of a B picture, reference encoding is performed from past and future images. The compression encoding of the image data corresponding to the future in display time used for reference is performed, and after the decoded image is stored in the FM 210, the reference encoding of the B picture is executed.

[0008] The Rch encoder 100 is the same as the Lch encoder 200. However, the reference image from the Lch encoder is supplied to the frame memory FM114, and reference encoding is performed using the reference image stored in the FM114.

An MPEG decoder for a three-dimensional moving image is shown in FIG.
9 has a function basically opposite to that of the encoder shown in FIG. 9, and performs variable length decoding, inverse quantization, and inverse DCT on an input bit stream. In the case of an I picture, it is output as it is, and in the case of a P picture or B picture, motion compensation is performed on the result of variable length decoding. The decoded I picture or P picture is stored in the frame memory FM as a reference image, and motion compensation is performed using the reference image stored in the frame memory FM.
The I picture, the P picture, and the B picture are output in the order in which they are decoded. Since this order is different from the original display order, the order is switched by the last-stage changeover switch and output. When decoding with the Rch decoder, an image decoded with the Lch decoder is used as a reference image.

[0010]

On the other hand, when encoding or decoding Rch using Lch, it is necessary to reduce the entire circuit scale by using an LSI. FIG. 20 shows an example of a circuit configuration using an MPEG encoder that is implemented as an LSI. The encoder LSI 300 includes the encoder 100 shown in FIG.
Various functional blocks for realizing the function of the (or encoder 200) are provided. An SDRAM 400 for controlling a frame memory and a buffer function of the encoder is provided outside, and the encoder LSI 300
A memory arbiter 401 controls data access. That is, each block in the encoder LSI 300 issues a data write / read request to the memory arbiter 401, and the memory arbiter 401 performs arbitration within a predetermined time to perform encoding. For example, when an I picture is input, the input data is stored in the SDRAM 400 via the memory arbiter 401. Then, the I picture data is read out at an appropriate timing in response to a request from the encoder LSI 300, supplied to the DCT block 403 and the quantization block 404, and further subjected to variable length coding by the VLC block 405.
The compression-encoded data is written to the SDRAM via the memory arbiter 401, read at an appropriate timing, and output at a predetermined rate.

Also, an inverse quantization block 407 and an inverse DC
Decode in the T block 408 and the memory arbiter 401
Is stored in the SDRAM 400 as a reference image. When reference encoding a P picture or a B picture,
The reference image stored in the SDRAM 400 is read and used.

When encoding or decoding single channel data, the configuration shown in FIG. 20 may be used. However, as described above, when encoding or decoding two channel data of Rch and Lch efficiently,
A problem is how to use an external memory such as an SDRAM to supply data of one channel to the other channel. Conventionally, no specific system has been proposed which efficiently encodes the other channel data by referring to one channel data by using such an LSI encoder and an external memory, and further decodes the data. Was.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the related art, and has as its object to provide an apparatus capable of efficiently encoding and decoding data using an external memory. is there.

[0014]

In order to achieve the above object, the present invention provides a data encoding apparatus for encoding data of a second channel using data of a first channel,
First encoding means for encoding the data of the first channel and decoding the encoded data to generate first data for reference; and data for the second channel based on the first data for reference. And a second encoding unit that decodes the encoded data to generate second reference data, and a first encoding unit that stores the first reference data.
Storage means, second storage means for storing the reference second data, and reference first data generated by the first encoding means written into the first storage means; And control means for writing the reference first data from the second storage means and supplying the reference first data to the second encoding means. The first data for reference and the second data for reference are local decode data of the own channel required at the time of encoding in each channel, and the second encoding means uses the first data for reference by using the first data for reference. Is encoded. At this time, the first data for reference needs to be stored in the second storage means for accessing the data by the second encoding means. In the present invention, the control means stores the first data for reference in the first storage means. And the first reference data is written to the second storage means, so that the second encoding means can perform encoding using this. Note that the first encoding unit and the second encoding unit may be implemented as LSIs, and the first and second storage units may be configured as external memories separate from these LSIs. The first and second storage units need not necessarily be separate, and the first storage unit and the second storage unit may be configured by logically dividing a single memory area.

The control means includes a determining unit for determining whether the first data for reference is data to be used by the second encoding means, and the determining unit determines whether the first data for reference is the first data. (2) a temporary storage unit for temporarily storing the first data for reference when it is determined that the data is to be used by the encoding means, and a timing for writing the second data for reference to the second storage means. It is preferable to have a control unit that writes the first reference data stored in the temporary storage unit to the second storage unit. When writing the first data for reference to the second storage means, it may not be possible to immediately write the data. Therefore, the timing at which the first data is temporarily stored in the temporary storage unit and the data can be written to the second storage means, that is, the second encoding means The first data for reference is written at a timing when a write request is issued from the first device. As a result, the first reference data is written into the second storage means instead of the second reference data.

Further, the present invention is a data encoding device for encoding data of a second channel using data of a first channel, wherein the data of the first channel is encoded and encoded. First encoding means for decoding data to generate first data for reference, encoding the data of the second channel based on the first data for reference, decoding the encoded data for reference Second encoding means for generating second data for reference, first storage means for storing the first data for reference, second storage means for storing the second data for reference, and the first encoding means Control means for writing the first data for reference generated in step 1 into the first storage means, and supplying the first data for reference to the second encoding means, wherein the control means The first data is A discriminating unit for discriminating whether or not the data is to be used by the second encoding unit; and when the discriminating unit determines that the first data for reference is data to be used by the second encoding unit, The first reference data is written in a third storage unit independent of the first and second storage units, and is stored in the third storage unit at a timing at which the second reference data is read from the second storage unit. A control unit that reads the first data for reference and supplies the read first data to the second encoding unit. The first data for reference and the second data for reference are local decode data of the own channel required at the time of encoding in each channel, and the second encoding means uses the first data for reference by using the first data for reference. Is encoded. On this occasion,
The first data for reference needs to be stored in the second storage means for accessing the data by the second encoding means. In the present invention, the control means writes the first data for reference to the first storage means and , The first data for reference to the third data
Write to storage means.

The second code accessed by the second encoding means
The first reference data is stored in a third storage unit independent of the storage unit, and is read from the third storage unit and supplied to the second encoding unit, so that the first reference data is stored in the second encoding unit. Is simplified. The reading of the first data for reference from the third storage means is performed at the timing of reading the second data for reference from the second storage means by the second encoding means, so that the reference is performed instead of the second data for reference. The first data for use is read.

Here, at least one of the first, second and third storage means is an SDRAM, and the SDRAM
It is preferable that the data is output at a timing earlier than the data output timing requested by the second encoding means by a predetermined clock. SDR as encoding means and storage means
Since the control means is interposed between the AM and the AM, the data path length becomes long and the encoding means may not be able to receive data at the original timing. Therefore, in SDRAM, the second
By outputting the data at a timing earlier than the timing required by the encoding means, the delay caused by the control means is canceled and the data can be received at a predetermined timing.

The data of the first channel is an MPE.
It is preferable that the data of the second channel is one of the left and right image data of the G stereoscopic image, and the data of the second channel is the other of the left and right image data of the MPEG stereoscopic image. In this case, the first encoding means may use the MPE
Encoding the I picture and the P picture in the G stereoscopic image, the second encoding means encoding the I picture and the B picture in the MPEG stereoscopic image, and encoding the B picture as a backward reference image. It is preferable to use the image at the same time decoded by the first encoding unit. Since B pictures are coded with reference to past and future pictures, future pictures are required in terms of display time during B picture coding, and the image order is changed. When a B-picture is encoded on the first channel, necessary image data cannot be obtained because the first channel is replaced when the image data of the first channel is referred to on the second channel. Therefore, the second
By limiting the encoding of the first channel to be referred to by the channel to the I picture and the P picture, the encoding of the second channel can be performed efficiently.

Further, the present invention provides a data decoding device for decoding data of the second channel using data of the first channel. The apparatus decodes the data of the first channel and generates first reference data, and decodes the data of the second channel based on the first data for reference. , Reference second
A second decoding unit for generating data; a first storage unit for storing the first data for reference; a second storage unit for storing the second data for reference; Writing the first reference data into the first storage means, writing the first reference data into the second storage means, reading the first reference data from the second storage means, and reading the second decoding data from the second storage means. Control means for supplying to the conversion means. The first data for reference and the second data for reference are decode data of the own channel necessary for decoding in each channel, and the second decoding means uses the first data for reference by using the first data for reference. Decrypt the data. At this time, the first data for reference needs to be stored in the second storage means for accessing the data by the second decoding means. In the present invention, the control means stores the first data for reference in the first storage means. Write to
Since the first data for reference is written in the second storage means, the second encoding means can perform encoding using this. The first decoding means and the second decoding means may be implemented as an LSI, and the first and second storage means may store these LSIs.
It may be configured as an external memory separate from I. First
The first storage means and the second storage means are not necessarily required to be separate, and the first storage means and the second storage means can be constituted by logically dividing a single memory area.

The control means includes: a determination section for determining whether the first data for reference is data to be used by the second decoding means; and a determination section for determining whether the first data for reference is the first data by the determination section. (2) a temporary storage unit for temporarily storing the first data for reference when it is determined that the data is to be used by the decoding means, and a timing for writing the second data for reference to the second storage means; It is preferable to have a control unit that writes the first reference data stored in the temporary storage unit to the second storage unit.

Further, the present invention is a data decoding device for decoding data of a second channel using data of a first channel, wherein the data decoding device decodes the data of the first channel and obtains a first A first encoding unit for generating data; a second decoding unit for decoding the data of the second channel based on the first data for reference; and a second decoding unit for generating second data for reference; A first storage unit for storing one set of data, a second storage unit for storing the second reference data, and writing the first reference data generated by the first encoding unit to the first storage unit. Control means for supplying the first reference data to the second decoding means, wherein the control means determines whether the first reference data is data to be used in the second decoding means. Judgment to judge When the first data for reference is determined to be data to be used by the second decoding means, the first data for reference is independent of the first and second storage means. Control for reading the first reference data stored in the third storage means at the timing of writing to the third storage means and reading the second reference data from the second storage means, and supplying the read first data to the second decoding means And a part. The first data for reference and the second data for reference are decode data of the own channel necessary for decoding in each channel, and the second decoding means uses the first data for reference by using the first data for reference. Decrypt the data. At this time, the first data for reference needs to be stored in the second storage means for accessing the data by the second decoding means. In the present invention, the control means stores the first data for reference in the first storage means. And the first data for reference is written to the third storage means. The first reference data is stored in a third storage unit independent of the second storage unit accessed by the second decoding unit, and read out from the third storage unit and supplied to the second decoding unit. The control of supplying the first data for reference to the second decoding means is simplified. Note that the reading of the first reference data from the third storage means is performed at the timing of reading the second reference data from the second storage means by the second decoding means, so that the reference is performed instead of the second reference data. The first data for use is read.

At least one of the first, second, and third storage means is an SDRAM, and the SDRAM may output data at a timing earlier than a data output timing requested by the second decoding means by a predetermined clock. It is suitable.

The data of the first channel is MPE
It is preferable that the data of the second channel is one of the left and right image data of the G stereoscopic image, and the data of the second channel is the other of the left and right image data of the MPEG stereoscopic image.

[0025]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIG. 1 shows a conceptual configuration diagram of an encoder according to the present embodiment. An Lch MPEG moving picture coding means 10 and an Rch MPEG moving picture coding means 12 are provided. Lch MPEG video encoding means 1
0 and the Rch MPEG moving picture encoding means 12 are preferably both implemented as LSIs, and the input Lc
The h image data and the Rch image data are compression-encoded.
The function of compression encoding is the same as that of the prior art shown in FIG. 19 or FIG.

On the other hand, an image data storage means 16 is provided as an external memory separately from the Lch MPEG moving picture coding means 10 and the Rch moving picture coding means 12, and functions as a frame memory and a buffer. . The image data storage means 16 is, specifically, an SRAM or DRA
M or SDRAM, preferably SDRAM. Data transmission / reception between the Lch MPEG moving picture encoding means 10 and the image data storage means 16 and the Rch MP
Transmission and reception of data between the EG moving picture coding means 12 and the image data storage means 16 are controlled by the control means 14, and the control means 14 controls the Lch MPEG moving picture coding means 10
The reference image (first reference data) locally decoded in step (1) is stored in the image data storage unit 16, and the reference image is supplied to the Rch MPEG moving image encoding unit 12. The image data storage means 16 may be divided into two for Rch and Lch, and the area may be divided for Rch and Lch as a single memory.

FIG. 2 shows a map in the image data storage means 16. Area for storing input frames,
An Lch MP includes an area for storing a reference frame, a frame buffer, and a bit stream buffer.
The EG moving picture coding means 10 accesses the memory (or area) for Lch, and the moving picture coding means 12 for Rch.
The Rch moving image coding means 12 accesses the Rch memory (or area). The reference image data (first reference data) locally decoded by the Lch MPEG moving image encoding unit 10 for reference encoding is Lch
Is written to the reference frame of the memory for reading and is read to encode a P picture or the like. However, since this reference image is simultaneously used for encoding by Rch, Rc
Rc accessed by the MPEG moving image encoding means 12 for h
It must be present in the reference frame of the memory for h.

Therefore, the control means 14 controls the case where the reference image data is written in the reference frame of the Lch memory, and this reference image is used for the Rch moving image encoding means 12.
When the reference image can be used in the above, the reference image is automatically written also in the reference frame of the Rch memory. As a result, the Rch moving image encoding unit 12 can also use the Lch reference image by accessing the Rch memory.

FIGS. 3 and 4 schematically show the states of the images encoded by the Lch MPEG moving picture coding means 10 and the Rch moving picture coding means 12, respectively. In the Lch MPEG moving picture encoding means 10,
As shown in (a), the picture is encoded as I picture I ₀ , P picture P ₁ , P ₂ , P ₃ ,..., And the Rch video encoding means 12 encodes I picture as shown in (b). Encode as picture I ₀ , B picture B ₁ , B ₂ , B ₃ ,. The Lch MPEG moving image encoding means 10
Encoding only a picture and a P picture, and encoding only an I picture and a B picture by the Rch moving picture coding means 12 is because, if a B picture is introduced by the Lch MPEG moving picture coding means 10, the picture exchange is performed. This is because, when reference is made on the Rch, the reference image on the Lch corresponding to the same time cannot be read. The specific encoding procedure is as follows. That is, as shown in FIG. 4, the Lch MPEG moving picture encoding means 10 encodes I ₀ and encodes P ₁ with reference to this I ₀ . In the Rch moving image encoding unit 12, the Lch MPEG moving image encoding unit 10
Of one frame is delayed relative to the processing by encoding I _0, then encoding the B ₁ with reference to P ₁ supplied from the I ₀ and Lch self channel. Delaying the processing of the Rch moving image encoding means 12 by one frame requires I ₀ and P ₁ to encode B _1. However, if processing of Rch and Lch is performed simultaneously, B ₁ local decoded image of P ₁ necessary when encoding, i.e. the reference picture because unavailable. Control means in FIG. 1 14 has, for example, function of supplying a reference image P ₁ of the Lch required when encoding the B ₁ in Rch to Rch moving image encoding means 12.

FIG. 5 shows a specific configuration of the control means 14 in FIG. As the image data storage means 16, an Lch image data storage means 16a and an Rch image data storage means 16b are provided independently. The image data storage means 16a and 16b
It can be composed of a DRAM. The image data storage unit 16a basically stores an Lch local decoded image (first reference data), and stores the image data in the image data storage unit 1a.
6b basically stores an Rch local decoded image (reference second data), but an Lch local decoded image is also written in the image data storage unit 16b as described later.

In the figure, the control means 14 comprises a discriminating section 14
a, a control unit 14b, and a storage unit 14c. The determination unit 14a determines whether the reference image is a reference image to be used by the Rch MPEG moving image encoding unit 12 when the Lch MPEG moving image encoding unit 10 issues a request to write a reference image, For example, Rch
It is determined whether or not the P1 picture required when the B1 picture is encoded by the MPEG moving image encoding means 12 for use. Specifically, the Lch MPEG moving picture encoding means 10 and the image data storage means 16a are connected by two types of signal lines, and one direction is an address and a control signal (ch).
ip Select, Write, RAS, CAS, etc.), and data is bidirectional. By monitoring the address and the control line, it is possible to determine which address is to be accessed, and whether to write or read. Therefore, the determination unit 14a determines that the reference image is to be written, and
Is output to

In general, in memory access using the SDRAM, a target word is not directly accessed, but
First, a unit of a page composed of several words (for example, 256 words) is selected, and then a two-stage access for selecting a target word from the page is performed. Selecting this page is called RAS access, and selecting a word in the page is called CAS access. SDRA
In M, the address lines necessary for the RAS access and the CAS access are shared, and are used in a time-division manner (for example, the RAS address is input first, and the CAS address is input two clocks later). In SDRAM, when different words on the same page are successively accessed, both the RAS and CAS addresses are required for selecting the first word, but the second and subsequent words can be selected only with the CAS address. Thus, the total data access time can be reduced. Further, burst transfer is also possible for words of consecutive addresses, and further shortening is possible. As described above, in the SDRAM, a united area (there is a possibility of continuous access) is allocated to the same page.
In the present embodiment, a reference image corresponds to this set of data, and different reference images are assigned to different pages. Therefore, by monitoring the RAS address, it is possible to determine whether it is a reference image of its own channel (Lch reference image) or a reference image of another channel (Rch reference image).

The control unit 14b sends the Rch
When it is input that the reference image to be used is written, the reference image data is written into the image data storage means 16b for Rch. However, since it is not usually possible to write simultaneously, the reference image data is once written in the storage unit 14c such as a FIFO. Thereafter, the reference image data is read from the storage unit 14c at a predetermined write timing, specifically, the write timing of the Rch MPEG moving image encoding unit 12, and is written to the image data storage unit 16b. As a result, the MPEG moving image encoding means for Rch 1
This means that the reference image to be used in step 2 is automatically written in the image data storage means 16b, and the Rch MPEG moving image encoding means 12 can read and use the read image.

FIG. 6 shows a processing flowchart of the control means 14 in FIG. First, the determination unit 14a
It is determined whether or not reference image data to be used in Rch has been written (S101). This determination can be made from the RAS access address and the control signal as described above. And a storage unit 1 such as a FIFO
This reference image data is once written in 4c (S10).
2). Next, it is determined whether or not writing to the Rch SDRAM, that is, the image data storage unit 16b is possible (SSD).
103) If the writing is possible, the storage unit 1
The reference image data is read from 4c and written into the image data storage unit 16b (S104). From the viewpoint of the Rch MPEG moving picture encoding means 12, the local decoded image of the own channel is originally stored in the image data storage means 1.
6b, the reference image data supplied from the Lch is stored instead, and the B picture is encoded using this reference image.

FIG. 7 shows a timing chart of the processing described above. It is assumed that the Rch MPEG moving picture encoding means 12 accesses R1, R2, R3, and R4 sequentially as local code images. However,
The Lch MPEG moving image encoding means 10 uses the reference image L0
Is accessed, the reference image is stored in the image data storage unit 16b instead of R4, and Rch encoding is performed using this L0.

FIG. 8 shows an example of the image data stored in the image data storage means 16a and 16b by the processing described above. (A) shows the contents of the image data storage means 16a for Lch, and (b) shows the contents of the image data storage means 16b for Rch. Images to be encoded are sequentially input to the input buffer of the Lch image data storage unit 16a. Then, a local decoded image of the encoded image data is stored in the reference frame. On the other hand, images to be encoded are sequentially input to the input buffer of the image data storage means 16b for Rch, and an image obtained by locally decoding the encoded image is stored in the reference frame (reference frame 1). Further, a reference image supplied from the Lch is stored in another reference frame (reference frame 2) of the Rch image data storage unit 16b. Therefore, for example, when encoding Frame2 (R) in the Rch, the F2 of the locally decoded image stored in the reference frame 1 is encoded.
It can be encoded using frame1 (R) and the same-time reference image Frame2 (L) supplied from the Lch. From this figure, it can be understood that the MPEG moving image encoding unit for Rch 12 can encode using both the local decoded image and the reference image supplied from the Lch when encoding the image.

In this embodiment, since the control means 14 is interposed between the coding means and the image data storage means 16a and 16b, which are external SDRAMs, the data path becomes long. Delay time increases by the means. Since the operation of the SDRAM is synchronized with the system clock, if the increase in the delay time exceeds the clock boundary, operation at that frequency becomes impossible. In order to prevent this, the control means 14 latches one clock data to divide the data path into two parts, SDRAM-control means 14 and control means 14-encoding means, and each delay time is clock cycle. It is necessary to make it fit. At this time, in the memory access from the viewpoint of the encoding means, some countermeasures are required because the number of clocks required from the output of the address to the reception of the data increases by one. In the SDRAM, the number of clocks can be set at the time of initialization. Therefore, for example, in the case of an SDRAM used with the number of clocks = 3, changing the setting value to the number of clocks = 2 gives a margin for one clock, and even if the control means 14 latches one clock, the coding means Will not be affected. That is, the encoding means requests data from the SDRAM under the condition that the number of clocks = 3. The SDRAM does not output data with the number of clocks = 3 after receiving this request, but outputs data to the control means 14 with the number of clocks = 2 at a timing earlier by one clock. In the control means 14,
The data is output to the encoding means with a delay of one clock. Then, from the viewpoint of the encoding unit, the data is received at the clock number = 3 as requested, so that the subsequent processing can be performed despite the presence of the control unit 14.

FIG. 9 shows a timing chart of the processing described above. The encoding means 10, 12
S and CAS are output in a time sharing manner to read out desired data.

At this time, it is assumed that the encoding means 10 and 12 perform data processing with the number of clocks = 3. SDRAM
, The data Da0, Da1,... Are output to the control means 14 two clocks after the address is specified (Data1). The control means 14 delays the data input from the SDRAM by one clock and outputs the data. Then, the data Da0, Da1,... Received by the encoding means 10, 12 can be received with the number of clocks = 3 delayed by three clocks after the address is specified (DATA2). An encoding process can be performed.

FIG. 10 shows another configuration of the control means 14 in FIG. The control unit 14 according to the present embodiment includes a determination unit 1 in addition to the control unit 14b and the storage unit 14c.
4d, 14e and 14f. An image data storage means 16 composed of an SDRAM is provided as an external memory, and the inside of the image data storage means 16 is logically divided into areas for Lch and Rch.

The discriminating units 14d and 14e respectively determine Lc
MPEG moving image encoding means 10 for h and MPE for Rch
The access timing of the G moving picture coding unit 12 is determined and supplied to the control unit 14b. Further, the discriminating unit 14f calculates Lc
Based on the address signal from the MPEG moving image encoding unit for h, it is determined whether or not the data to be written into the image data storage unit 16 is reference image data to be used in the Rch, and outputs to the control unit 14b.

The control section 14b includes discriminating sections 14d, 14e,
And the output from 14f, the reference image data of Lch is written in the memory area for Rch of the image data storage means 16. When the memory accesses of the Lch and the Rch collide based on the outputs from the determination units 14d and 14e, the reference image data is written into the storage unit 14c once, and
The reference image data is written to the Rch memory area of the image data storage means 16 at the timing when the access contents do not collide, and the access from the Rch MPEG moving picture encoding means 12 is enabled.

FIG. 11 shows a processing flowchart of the control means 14 in the present embodiment. First, the determination unit 14f determines whether or not the access content of the Lch is writing of reference image data to be used in the Rch (S
201). Since the data cannot normally be immediately written to the image data storage means (SDRAM) 16, the image data is temporarily stored in the storage unit 14c such as a FIFO (S20).
2). Then, it is determined by the determining units 14d and 14e whether or not the image data can be written into the image data storage unit 16 (S203). If the access is possible without collision, the reference image data is read from the storage unit 14c and the image is read. The data is written in the Rch memory area of the data storage means 16 (S204). As a result, the Rch MPEG moving image encoding unit 12 can encode its own channel using the Lch reference image.

FIG. 12 shows still another configuration of the control means 14 in FIG. The control means 14 according to the present embodiment includes, in addition to the control unit 14b, a determination unit 14g,
4h and a switching unit 14i. In addition,
Image data storage means 1 for Lch as an external memory
6a, an image data storage unit 16c is provided in addition to the Rch image data storage unit 16b.

The determination unit 14g determines whether the write request from the Lch MPEG moving picture encoding means 10 is reference image data to be used for the Rch, and
b. On the other hand, the discriminating unit 14h outputs the Rch MPE.
The read request from the G moving picture encoding unit 12 is Lch
And supplies the reference image data to the control unit 14b. The control unit 14b includes the determination unit 1
Based on the output from 4g, the reference image data of Lch to be used in Rch is written in the image data storage unit 16c. The image data storage means 16c is the image data storage means 1
Since the memory is independent of the memory 6a and the image data storage means 16b, writing and reading can be performed at an arbitrary timing irrespective of access to these memories. Then, based on the output from the determination unit 14h, the Rch MP
When there is a request to read the Lch reference image from the EG moving image encoding unit 12, the reference image data is read from the image data storage unit 16c and supplied to the switching unit 14i. The switching unit 14i switches to the reference image supplied from the control unit 14b in response to a request from the MPEG moving image encoding unit 12 for Rch, and converts the reference image into an Rch as if it were an encoded image of its own channel. For M
It is supplied to the PEG moving picture encoding means 12. The image data storage unit 16b for Rch needs to store the decoded image specific to the Rch and the reference image supplied from the Lch, so that the processing in the control unit 14 is complicated. The storage means 16c is provided, and the data read from the image data storage means 16b is replaced, so that the reference image data of Lch can be converted to Rc with a relatively simple configuration.
h.

FIG. 13 shows a processing flowchart of the control means 14 in this embodiment. First, the determination unit 14g determines whether or not a request to write reference image data to be used in Rch is made (S301). Next, the reference image data is stored in an image data storage means (SDRAM) 16c.
(S302), and the MPE for Rch is determined by the determination unit 14h.
It is determined whether or not a request to read reference image data corresponding to Lch has been made from the G moving image encoding unit 12 (S
303). In this case, since encoding needs to be performed using Lch reference image data, it is necessary to replace the image data. Therefore, the image data storage means 16b
Instead of reading out and supplying image data from L, reference image data of Lch stored in the image data storage means 16c is read out and supplied (S304).

FIG. 14 shows the memory contents of the image data storage means 16a, 16b, 16c in the present embodiment. In the figure, (a) shows the image data storage means 1
6a and (b) show the memory contents of the image data storage means 16b, and (c) show the memory contents of the image data storage means 16c. Image data to be encoded is sequentially input to the input buffer of the Lch image data storage unit 16a, and a reference image in which the encoded image is further locally decoded is stored in the reference frame. The reference image is stored in the image data storage unit 16c, and is read out and used when encoding by the Rch MPEG moving image encoding unit 12.
Specifically, for example, when the Frame2 (R) is encoded by the Rch MPEG moving image encoding unit 12, Frame1 (R) which is a decoded image of its own channel and Frame2 (L) supplied from the Lch are necessary. Access to SDRAM, but Frame2 (L)
It is determined that the access corresponds to the reading of the image data, and is not read out from the image data storage unit 16b but is read out from the image data storage unit 16c and supplied. Thereby, L is stored in the image data storage unit 16b.
There is no need to write reference image data from the channel.

Although the embodiment of the encoder has been described above, other configurations are also possible. For example, in the configuration of FIG. 5, a switching unit is provided instead of the storage unit 14c, and R
When a request to read the reference image of Lch is made from the MPEG moving image encoding unit for ch 12, the switching unit does not read the image data from the Rch memory area of the image data storage unit but stores the image data in the Lch memory area. Alternatively, the stored reference image may be read and supplied. Also in this case, it is not necessary to write the Lch reference image data in the Rch memory area of the image data storage unit 16.

FIG. 15 is a conceptual block diagram of a decoder for decoding image data, that is, a bit stream, encoded by the encoder according to the present embodiment. Lch MPEG moving picture decoding means 50 and Rc
h MPEG moving image decoding means 52 is provided. Lc
hMPEG video decoding means 50 and MPEG for Rch
The moving image decoding means 52 is preferably implemented as an LSI, and decodes the input bit streams to restore the original Lch and Rch images.

On the other hand, an image data storage means 56 is provided as an external memory separately from the Lch moving picture decoding means 50 and the Rch moving picture decoding means 52, and functions as a frame memory and a buffer. The image data storage means 56 is specifically an SRAM, a DRAM, or an SDRAM, and is preferably an SDRAM. Lc
Transmission / reception of data between the MPEG moving image decoding unit for h 50 and the image data storage unit 56 and transmission / reception of data between the Rch moving image decoding unit 52 and the image data storage unit 56 are controlled by the control unit 54. By the control means 54, Lc
The reference image locally decoded by the h moving image decoding unit 50 is stored in the image data storage unit 56, and the reference image is supplied to the Rch MPEG moving image decoding unit 52. The image data storage means 56 is for Rch and Lch
The area may be divided into a single memory for Rch and Lch.

The control means 54 is for the case where the reference image data is written in the reference frame of the Lch memory,
When the reference image is a reference image that can be used by the Rch moving image decoding unit 12, the reference image is automatically written also in the reference frame of the Rch memory. As a result, the Rch video decoding means 52 also
The Lch reference image can be used by accessing the storage memory.

The Lch moving picture decoding means 50 decodes an I picture and a P picture, and the Rch moving picture decoding means 52 decodes an I picture and a B picture.

FIG. 16 shows the control means 54 in FIG.
Is shown. Note that the image data storage means 56 includes an Lch image data storage means 56.
a and Rch image data storage means 56b are provided independently. Image data storage means 56a and 56b
Can be composed of an SDRAM.

In FIG. 16, the control means 54 includes a discriminating unit 54a, a control unit 54b, and a storage unit 54c. When a request to write a reference image is made from the Lch MPEG moving image decoding unit 50, the determination unit 54a determines whether the reference image is a reference image to be used by the Rch MPEG moving image decoding unit 52. Determine.
The Lch MPEG moving picture decoding means 50 and the image data storage means 56a are connected by two kinds of signal lines, and one direction is an address and a control signal (chip select, W).
write, RAS, CAS, etc.), and bidirectional is data. By monitoring the address and the control line, it is possible to determine which address is to be accessed, and whether the data is to be written or read. Therefore, the determination unit 54a determines that the reference image is to be written and outputs it to the control unit 54b.

The control unit 54b sends the Rch
When it is input that the reference image to be used is written, the reference image data is written to the image data storage means 56b for Rch. However, since it is not usually possible to write simultaneously, the reference image data is once written into the storage unit 54c such as a FIFO. Thereafter, the reference image data is read from the storage unit 54c at a predetermined write timing, specifically, at the write timing of the Rch MPEG moving image decoding unit 52, and is written into the image data storage unit 56b. Thereby, the MPEG moving image decoding means 5 for Rch
This means that the reference image to be used in step 2 has been automatically written into the image data storage means 56b, and the Rch MPEG moving image decoding means 52 can read this and decode it on its own channel.

Also in this embodiment, the decoding means and the image data storage means 56a, which is an external SDRAM,
Since the control means 54 is interposed between the SDRAM and the data 56b, it is preferable that the SDRAM outputs data faster by a predetermined number of clocks than the timing required by the decoding means, as in the case of encoding. For example, the decoding means requests data from the SDRAM under the condition that the number of clocks = 3. The SDRAM does not output data with the number of clocks = 3 after receiving this request, but outputs data to the control means 54 with the number of clocks = 2 at a timing earlier by one clock. The control means 54 outputs the data to the decoding means with a delay of one clock, so that the decoding means receives the data with the number of clocks = 3 as requested. Despite the existence, the subsequent processing can be advanced.

FIG. 17 shows the control means 54 shown in FIG.
Another configuration is shown. The control unit 54 according to the present embodiment includes determination units 54d, 54e, and 54f in addition to the control unit 54b and the storage unit 54c. As an external memory, an image data storage means 56 composed of an SDRAM is provided, and the inside of the image data storage means 56 is logically divided into areas for Lch and Rch.

The discriminating units 54d and 54e respectively determine Lc
MPEG moving image decoding means 50 for h and MPE for Rch
The access timing of the G moving image decoding unit 52 is determined and supplied to the control unit 54b. In addition, the determination unit 54f determines Lc
Based on the address signal from the MPEG moving image decoding unit 50 for h, it is determined whether or not the data to be written in the image data storage unit 56 is reference image data to be used in the Rch, and output to the control unit 54b.

The control section 54b includes discriminating sections 54d, 54e,
And 54f, the reference image data of Lch is written in the memory area for Rch of the image data storage means 56. When the memory accesses of the Lch and the Rch collide with each other based on the outputs from the determination units 54d and 54e, the reference image data is temporarily written to the storage unit 54c.
The reference image data is written to the Rch memory area of the image data storage means 56 at the timing when the access contents do not collide, and the access from the Rch MPEG moving picture decoding means 52 is enabled.

The specific processing is as follows. First,
The determining unit 54f determines whether the access content of the Lch is the writing of reference image data to be used in the Rch. Then, usually, the image data storage means (SDR
AM) 56, so once
O or the like is stored in the storage unit 54c. Then, the determination unit 54
It is determined from d and 54e whether or not the image data can be written to the image data storage means 56. If the access can be made without collision, the reference image data is read out from the storage section 54c and read for the Rch of the image data storage means 56. Write to memory area.

Thereafter, the control unit 54b sets the Rch MPEG
In response to a read request from the moving picture decoding means 52, the reference picture data is read and supplied to the Rch. As a result, the MPEG moving image decoding means for Rch 12
The own channel can be decoded using the reference image of the channel.

FIG. 18 shows the control means 54 shown in FIG.
Is shown. In the present embodiment, the control unit 54 includes, in addition to the control unit 54b, a determination unit 54g,
54h and a switching unit 54i. As an external memory, an image data storage unit 56c is provided in addition to the Lch image data storage unit 56a and the Rch image data storage unit 56b. These memories can be constituted by SDRAMs.

The determination unit 54g determines whether the write request from the Lch MPEG moving image decoding unit 50 is reference image data to be used for the Rch, and
b. On the other hand, the discriminating unit 54h outputs the Rch MPE.
The read request from the G moving image decoding unit 52 is Lch
, And supplies the reference image data to the control unit 54b. The control unit 54b includes the determination unit 5
Based on the output from 4g, the reference image data of Lch to be used in Rch is written in the image data storage means 56c. The image data storage means 56c is provided for the image data storage means 5
Since it is a memory independent of the memory 6a and the image data storage means 56b, writing and reading can be performed at an arbitrary timing regardless of access to these memories. Then, based on the output from the determination unit 54h, the Rch MP
When a request to read a local decoded image is received from the EG moving image decoding unit 52, the image data storage unit 56
The reference image data is read from c and supplied to the switching unit 54i. The switching unit 54i converts the Lch reference image into the Rc reference image as if it were a decoded image of its own channel.
This is supplied to the MPEG moving image decoding means 52 for h. In the embodiment described above, the image data storage means 5 for Rch
6b requires the storage of the decoded image specific to the Rch and the reference image supplied from the Lch, which complicates the processing in the control unit 54. As described above, the third image data storage unit 56c is provided, By exchanging the data read from the storage unit 56b, the Lch reference image data can be supplied to the Rch with a relatively simple configuration.

The specific processing is as follows. First,
The determining unit 54g determines whether the request is a request to write reference image data to be used in Rch. Next, the reference image data is stored in the image data storage means (SDRAM) 56c, and it is determined by the determination unit 54h whether the Rch MPEG moving image decoding means 52 has issued a read request for reference image data corresponding to Lch. judge. In this case, Lch
Need to be decoded using the reference image data, and the image data needs to be replaced. Therefore, instead of reading and supplying the image data from the image data storage unit 56b, the reference image data of Lch stored in the image data storage unit 56c is read and supplied. Rch
The MPEG moving image decoding means 52 decodes the Rch image based on the supplied reference image data.

As described above, the embodiment of the present invention
The case of encoding and decoding the G moving image has been described. However, the moving image data is not left and right moving image data, but is data including a plurality of other channels, and the data of one channel is used to encode or decode the other channel. It can also be applied to technology.

Although the SDRAM is used as an external memory in the present embodiment, the present invention is not limited to this and can be applied to any memory.

[0068]

According to the present invention, memories and buffers necessary for encoding or decoding are combined as an external memory, and even when the configuration is downsized, one channel data is used to efficiently store the other channel data. Can be encoded or decoded.

[Brief description of the drawings]

FIG. 1 is a basic configuration diagram of an encoder according to an embodiment.

FIG. 2 is a diagram showing storage contents of an image data storage unit in FIG. 1;

FIG. 3 is a diagram illustrating Lch and Rch encoded images in the embodiment.

FIG. 4 is a diagram illustrating an encoding order of Lch and Rch in the embodiment.

FIG. 5 is a configuration block diagram of a control unit in FIG. 1;

FIG. 6 is a processing flowchart in the configuration of FIG. 5;

FIG. 7 is a processing timing chart in the configuration of FIG. 5;

8 is a diagram showing storage contents of an image data storage means in the configuration of FIG. 5;

FIG. 9 is a timing chart of memory access according to the embodiment.

FIG. 10 is a block diagram showing another configuration of the control means in FIG. 1;

FIG. 11 is a processing flowchart in the configuration of FIG. 10;

FIG. 12 is a block diagram showing another configuration of the control means in FIG. 1;

FIG. 13 is a processing flowchart in the configuration of FIG. 12;

FIG. 14 is a diagram showing storage contents of an image data storage unit in the configuration of FIG. 12;

FIG. 15 is a basic configuration diagram of a decoder according to the embodiment.

FIG. 16 is a block diagram showing a configuration of a control unit in FIG.

FIG. 17 is a block diagram showing another configuration of the control means in FIG. 15;

FIG. 18 is a block diagram showing another configuration of the control means in FIG.

FIG. 19 is a configuration diagram of a conventional three-dimensional moving image MPEG encoder.

FIG. 20 is a configuration diagram when an encoder is formed into an LSI and an external memory is used.

[Explanation of symbols]

MPEG moving picture encoding means for 10 Lch, 12 Rc
h MPEG moving picture encoding means, 14 control means, 16
Image data storage means, 50 Lch MPEG moving image decoding means, 52 Rch MPEG moving image decoding means, 54 control means, 56 image data storage means.

 ──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Hideo Hirono 2-5-5 Keihanhondori, Moriguchi-shi, Osaka F-term in Sanyo Electric Co., Ltd. 5C059 KK10 KK15 MA00 MA04 MA05 MA14 MA23 ME01 PP04 PP13 UA02 UA32 UA34 5C061 AA29 AB01 AB08 AB11 AB12 AB24 5C078 BA21 CA00 CA01 CA35 DA01 DA02 9A001 BB03 BB06 DZ15 HH27 KZ26

Claims (11)

[Claims] 1. A data encoding device that encodes data of a second channel using data of a first channel, wherein the data encoding device encodes the data of the first channel and decodes the encoded data. First encoding means for generating first data for reference, and encoding the data of the second channel based on the first data for reference, and decoding the encoded data to obtain second data for reference. A second encoding unit for generating the first data for reference; a second storage unit for storing the second data for reference; and a second storage unit for storing the second data for reference. The first data for reference is written to the first storage means, the first data for reference is written to the second storage means, the first data for reference is read from the second storage means, and the second encoding is performed. By means Data encoding apparatus characterized by comprising: a supply control means. 2. The apparatus according to claim 1, wherein the control unit determines whether the first reference data is data to be used by the second encoding unit, and the determination unit. A temporary storage unit that temporarily stores the first reference data when it is determined that the first data for reference is data to be used by the second encoding unit; The first reference memory stored in the temporary storage unit at the timing of writing to the second storage unit.
A data encoding device, comprising: a control unit that writes data to the second storage unit. 3. A data encoding device for encoding data of a second channel using data of a first channel, the data encoding device encoding the data of the first channel and decoding the encoded data. First encoding means for generating first data for reference using the first data for reference, encoding the data of the second channel based on the first data for reference, and decoding the encoded data to obtain second data for reference. A second encoding unit for generating the first data for reference; a second storage unit for storing the second data for reference; and a second storage unit for storing the second data for reference. Control means for writing the first reference data to the first storage means and supplying the first reference data to the second encoding means, wherein the control means comprises: Is the second code Means for determining whether or not the data is to be used by the means; and if the first data for reference is determined to be data to be used by the second encoding means, 1 data is written in a third storage means independent of the first and second storage means, and the reference data stored in the third storage means is read at the timing when the second reference data is read from the second storage means. And a control unit for reading out the first data and supplying it to the second encoding means. 4. The apparatus according to claim 1, wherein at least one of said first, second and third storage means is S
A data encoding apparatus, comprising: a DRAM, wherein the SDRAM outputs data at a timing earlier than a data output timing requested by the second encoding means by a predetermined clock. 5. The apparatus according to claim 1, wherein the data of the first channel is one of left and right image data in an MPEG stereoscopic image, and the data of the second channel is an MPEG stereoscopic image. A data encoding device, which is one of right and left image data of an image. 6. The apparatus according to claim 5, wherein said first encoding means includes an I-bit in said MPEG stereoscopic image.
Picture and a P picture.
Picture and a B picture, and
When encoding a picture, a data encoding apparatus using an image at the same time decoded by the first encoding unit as a backward reference image. 7. A data decoding device for decoding data of a second channel using data of a first channel, wherein the data decoding device decodes the data of the first channel and generates first data for reference. First decoding means, second decoding means for decoding the data of the second channel based on the first data for reference and generating second data for reference, and storing the first data for reference A first storage unit for storing, the second storage unit for storing the second data for reference, and writing the first data for reference generated by the first decoding unit to the first storage unit, Control means for writing first data into the second storage means, reading the first reference data from the second storage means, and supplying the read first data to the second decoding means. Place. 8. The apparatus according to claim 7, wherein the control unit determines whether the first reference data is data to be used by the second decoding unit, and the determination unit. A temporary storage unit that temporarily stores the first reference data when it is determined that the first data for reference is data to be used by the second decoding unit; The first reference memory stored in the temporary storage unit at the timing of writing to the second storage unit.
A data decoding device, comprising: a control unit that writes data to the second storage unit. 9. A data decoding device for decoding data of a second channel using data of a first channel, wherein the data decoding device decodes the data of the first channel and generates first data for reference. A first encoding unit, a second decoding unit that decodes the data of the second channel based on the first data for reference, and generates second data for reference, and stores the first data for reference. A first storage unit that stores the second data for reference; and a first storage unit that writes the first data for reference generated by the first encoding unit to the first storage unit. Control means for supplying first data to the second decoding means, wherein the control means determines whether or not the first data for reference is data to be used in the second decoding means. The discriminator to When the determination unit determines that the first data for reference is data to be used by the second decryption unit, the first data for reference is converted to a third data independent of the first and second storage units. A control unit that reads the first reference data stored in the third storage unit at a timing of writing to the storage unit and reading the second reference data from the second storage unit and supplying the read first data to the second decoding unit; A data encoding device, comprising: 10. The apparatus according to claim 7, wherein at least one of the first, second, and third storage units is a storage device.
A data decoding apparatus, wherein the SDRAM outputs data at a timing earlier than a data output timing requested by the second decoding means by a predetermined clock. 11. The apparatus according to claim 7, wherein the data of the first channel is one of left and right image data in an MPEG stereoscopic image, and the data of the second channel is an MPEG stereoscopic image. A data decoding device, which is one of the left and right image data of an image.