JP2001109530A - Constant voltage generation circuit, nonvolatile memory, and semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a constant-voltage generating circuit which can generate a constant voltage irrelevantly to temperature variation, power source variation, or manufacture variance. SOLUTION: The constant-voltage generating circuit comprises a reference voltage generating circuit (30) which generates a reference voltage, a current-voltage converting circuit (20) composed of a resistance and Zener diodes (Dz1 to Dzn) connected to the resistance in series, a current control means (50) which can control a current supplied to the current-voltage converting circuit, and a voltage comparing circuit (40) which controls the current control means by comparing the voltage obtained by the current-voltage converting circuit with the reference voltage from the reference voltage generating circuit, and generates a constant voltage clamped with the stepped- down voltage at the resistance of the current-voltage converting circuit compared with the reference voltage; and the reference voltage generating circuit is composed of a voltage generating means (32) which is connected to a variable resistance and a variable resistance means in series and can compensate temperature characteristics of the Zener diodes with its temperature characteristics and a constant-current circuit (33) which supplies a current to the voltage generating means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage generating circuit, and more particularly to a constant voltage generating circuit capable of generating a constant voltage irrespective of temperature changes, power supply fluctuations and manufacturing variations. The present invention relates to a technique which is effective when used in a constant voltage generation circuit for generating a write voltage and an erase voltage in a nonvolatile semiconductor memory.

[0002]

2. Description of the Related Art In recent years, microcomputers having a nonvolatile memory as a built-in memory have been provided. Since the nonvolatile memory retains its stored contents even when the power is turned off, a microcomputer incorporating the nonvolatile memory is extremely effective for a mobile phone or the like that requires low power consumption.

Since a nonvolatile memory requires a higher voltage or a negative voltage than a normal LSI power supply voltage at the time of writing or erasing, a boosting circuit such as a charge pump circuit or a constant voltage generating circuit is provided inside the chip. It often has an internal power supply circuit.

On the other hand, in a nonvolatile memory, information is stored by applying a write voltage or an erase voltage to a storage element such as a MOSFET having a floating gate and changing the threshold value. In addition, since the change of the threshold value of the storage element needs to be performed with high precision so as to fall within a predetermined voltage range, the write operation in the nonvolatile memory is considerably more than in the volatile memory such as SRAM or DRAM. Long millisecond order time (eg 10m
S, etc.).

[0005]

Therefore, shortening the writing and erasing times in the non-volatile memory is extremely important for increasing the speed and improving the throughput of a system such as a microcomputer or an IC card incorporating the same.
Furthermore, in order to shorten the time for writing and erasing in a nonvolatile memory, it is important to improve the accuracy of the writing voltage and the erasing voltage, and a constant voltage that generates a constant voltage regardless of manufacturing variations, temperature changes, and power supply fluctuations. A generating circuit is desired.

FIG. 11 shows an example of a constant voltage generating circuit studied by the present inventors. The constant voltage generating circuit shown in FIG. 1 has two Zener diodes D connected in series.
z1, Dz2 and current control MOS transistor Qc
and a voltage supply circuit for generating a gate voltage of the current control MOS transistor. The zener diodes Dz1 and Dz2 are connected to output terminals of a booster circuit 10 such as a charge pump, and are generated by the booster circuit. The negative voltage is clamped by the reverse voltage of the Zener diodes Dz1 and Dz2.

This constant voltage generating circuit limits the current drawn from the Zener diodes Dz1 and Dz2 by the booster circuit 10 by the MOS transistor Qcr, and controls the control signals C1 to C5 applied to the voltage supply circuit, thereby controlling the voltage. The level of the output voltage Vout can be adjusted by changing the voltage output from the supply circuit, that is, the gate bias voltage of the transistor Qcr.

However, in the constant voltage generating circuit of the type described above, the current flowing through the Zener diodes Dz1 and Dz2 changes due to the temperature change and the fluctuation of the power supply voltage, so that the output voltage changes and the manufacturing voltage increases. It has been clarified that there is a problem that it is difficult to accurately set the output voltage value because the characteristics of the circuit elements constituting the voltage supply circuit change separately due to the variation.

An object of the present invention is to provide a constant voltage generating circuit capable of generating a constant voltage regardless of a temperature change.

Another object of the present invention is to provide a constant voltage generating circuit capable of generating a constant voltage regardless of power supply fluctuation.

Still another object of the present invention is to provide a constant voltage generating circuit capable of generating a constant voltage regardless of manufacturing variations.

An object of the present invention is to provide a nonvolatile memory capable of shortening a write / erase time.

An object of the present invention is to provide a technique which enables a system such as a semiconductor integrated circuit such as a microcomputer having a built-in non-volatile memory or an IC card to operate at high speed and to improve the throughput.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0015]

The following is a brief description of an outline of typical inventions disclosed in the present application.

That is, a reference voltage generation circuit for generating a reference voltage, a current-voltage conversion circuit including a resistor and a Zener diode connected in series with the resistance, and a current flowing through the current-voltage conversion circuit can be controlled. Current control means,
A voltage comparison circuit that controls the current control means by comparing the voltage converted by the current-voltage conversion circuit with the reference voltage from the reference voltage generation circuit, and is clamped by the current-voltage conversion circuit including the zener diode. A constant voltage generating circuit configured to generate a constant voltage, wherein the reference voltage generating circuit is connected in series with the variable resistance means and the temperature characteristic of the zener diode can be compensated by its own temperature characteristic. And a constant current circuit for flowing a current through the voltage generating means.

According to the above means, the temperature characteristics of the Zener diode are compensated by the temperature characteristics of the voltage generating means, so that a stable constant voltage can be generated irrespective of temperature fluctuations. Moreover, an arbitrary constant voltage can be generated by setting the resistance value of the variable resistance means.

When the current-voltage conversion circuit has a plurality of zener diodes in series, the reference voltage generation circuit includes the same number of voltage generation means as the zener diodes of the current-voltage conversion circuit and the variable resistors. It is better to connect them in series. Thus, the temperature characteristics of the Zener diode can be relatively easily compensated for by the temperature characteristics of the voltage generating means, and a stable constant voltage can be generated regardless of temperature fluctuations.

Alternatively, in the case where the current-voltage conversion circuit has n series (n is a positive integer) zener diodes in series form, two or more resistance elements are connected in series with the zener diode and the resistance elements are connected. It is preferable that the voltage divided by 1 / n by the resistance division is supplied to the voltage comparison circuit. Thus, the temperature characteristic of the Zener diode can be compensated by one voltage generating means by the temperature characteristic of the voltage generating means, and a stable constant voltage can be generated regardless of temperature fluctuation.

Further, it is preferable that the constant current circuit of the reference voltage generation circuit includes a transistor to which a constant voltage is applied to a control terminal, and a resistance element connected in series with the transistor. As a result, the current-voltage conversion circuit and the reference voltage generation circuit each have two sets of resistors in the same manner, so that even if the resistance value varies due to manufacturing variations, the voltage from the current-voltage conversion circuit and the reference voltage generation circuit Since the voltages supplied to the comparison circuits change in the same manner, the changes in the same phase with respect to the voltage comparison circuit cancel each other out, so that a stable constant voltage can be generated regardless of manufacturing variations.

The variable resistance means of the reference voltage generating circuit includes a plurality of divided resistors in series and a plurality of transistors connected in parallel with the respective divided resistors and having a control signal applied to a control terminal. Can be configured.
Thus, the constant voltage generated by the control signal after the completion of the circuit can be adjusted or changed.

The constant voltage generating circuit according to the present invention is preferably incorporated in a nonvolatile memory as a circuit for generating a write voltage or an erase voltage, for example. In such a nonvolatile memory,
Since the accuracy of the generated voltage is high, the writing time and the erasing time are shortened.

Further, a nonvolatile memory having the constant voltage generation circuit according to the present invention as a write voltage or erase voltage generation circuit is built in a semiconductor integrated circuit such as a microcomputer. In such a semiconductor integrated circuit, since the accuracy of the generated voltage is high, the writing time and the erasing time are short, and high-speed operation is possible.

Further, a non-volatile memory having the constant voltage generating circuit according to the present invention as a writing voltage or erasing voltage generating circuit or a semiconductor integrated circuit such as a microcomputer incorporating the same is mounted on one insulating substrate. I
A system such as a C card is configured. In such a system, since the accuracy of the generated voltage is high, the writing time and the erasing time are shortened, and the system throughput is improved.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of the constant voltage generating circuit according to the present invention.

The constant voltage generating circuit of this embodiment includes a booster circuit 10 including a charge pump and a power supply voltage terminal Vc.
c, and resistors R1, R2 connected in series between the output terminal
And a current-voltage conversion circuit 20 composed of n-stage Zener diodes Dz1 to Dzn, a reference voltage generation circuit 30 capable of setting the level of a generated voltage, a set reference voltage Vref, and a voltage converted by the current-voltage conversion circuit. A voltage comparison circuit 40 for comparing a voltage (potential of a connection node n1 between the resistors R1 and R2), connected between the booster circuit 10 and an output terminal, and controlled to be turned on and off by an output of the voltage comparison circuit 40; Switch means 50 for controlling the current drawn from current-to-voltage conversion circuit 20 by booster circuit 10
It is composed of

The reference voltage generation circuit 30 comprises a variable resistance means 31, a bipolar transistor 32 and a constant current circuit 33 connected in series between a power supply voltage terminal Vcc and a ground terminal. 3
Reference numeral 2 designates an emitter voltage of the transistor 32, that is, a potential of a connection node n2 between the bipolar transistor 32 and the constant current circuit 33, as a reference voltage Vref. It is supplied to a voltage comparison circuit 40 at the subsequent stage. Further, the constant current circuit 33 is a
It comprises an SFET Qc and a bias circuit 34 for biasing the gate terminals of the resistors Rc and Qc to flow a constant current.

Further, the bias circuit 34 has a voltage of about 1.2 V generated by a reference voltage generating circuit having no power supply voltage dependency, such as a band gap reference circuit (not shown).
And a level shift circuit LSF for level-shifting the reference voltage Vbg to a voltage such as 0.6 V and outputting the output voltage of the level shift circuit LSF to an inverting input terminal (+).
And the operational amplifier AMP whose source voltage of the constant current MOSFET Qc is fed back to the non-inverting input terminal (-).

The output voltage of the operational amplifier AMP is applied as a bias voltage to the gate of the constant current MOSFET Qc, whereby the MOSFET Qc
Is configured such that its source voltage is biased to have a potential of about 0.6 V, which is the same as the input potential of the inverting input terminal of the operational amplifier AMP, and a stable constant current Io flows through the constant current MOSFET Qc. Have been. Further, the constant current Io is supplied to the series-connected variable resistor 31 and the diode-connected bipolar transistor 32 so that the transistor 32 and the MOSFET Qc
A constant voltage Vref determined by the value of the current Io, the resistance value of the variable resistor 31, and the base-emitter voltage of the bipolar transistor 32 is generated at the connection node n2.

The constant voltage generation circuit of this embodiment compares the reference voltage Vref generated by the reference voltage generation circuit 30 with the potential of the node n1 of the current-to-voltage conversion circuit 20 by the voltage comparison circuit 40. Is the reference voltage Vref
While the voltage is higher than that, the output of the comparison circuit 40 is at a high level, the switch means 50 is turned on, and the boosting circuit 10 causes the current-to-voltage conversion circuit 20 to draw a current. Further, the potential of the node n1 of the current-voltage conversion circuit 20 is equal to the reference voltage Vr.
When it becomes lower than ef, the output of the comparison circuit 40 becomes low level, the switch means 50 is turned off, and the current drawn from the current-voltage conversion circuit 20 by the booster circuit 10 is cut off.

By such a feedback operation,
The constant voltage generating circuit according to the embodiment is configured such that the reverse voltage (about 6) of the Zener diodes Dz1 to Dzn of the current-voltage converting circuit 20 is used.
V) and the voltage drop due to the current flowing through the resistors R1 and R2, the negative output voltage Vou which is lower by 12 to 13 V than the power supply voltage Vcc when there are two Zener diodes, for example.
t and a negative output voltage Vout 17 to 18 V lower than the power supply voltage Vcc when there are three Zener diodes.
Is output. The level of the output voltage Vout is controlled by the variable resistor 3 of the reference voltage generation circuit 30 as described later.
The resistance value can be arbitrarily set within a certain range by adjusting the resistance value. Here, as for the output voltage Vout, the Zener voltage of each of the Zener diodes Dz1 to Dzn is Vz, the voltage drop across the resistor R1 and the variable resistor 31 is Vr1 and Vr31, and the base-emitter voltage of the bipolar transistor 32 is VBE. And a constant potential represented by the following equation: Vout = Vcc- (nVz + Vr1 + VBE + Vr31).

Further, in the constant voltage generating circuit of this embodiment, the value of the series-connected resistors R1 and R2 constituting the current-to-voltage conversion circuit 20 is changed by the Zener diode connected in series with these resistors R1 and R2. Assuming that the number of Dz1 to Dzn is n, (R1 + R2) / R1 ≒ n is set. As a result, the potential fluctuation at the node n1 due to the temperature characteristics of the n Zener diodes Dz1 to Dzn is offset by the potential fluctuation at the node n2 due to the temperature characteristic of one bipolar transistor 32, and the temperature stabilizes regardless of the temperature fluctuation. As a result, the voltage Vout is output.

That is, in the constant voltage generating circuit of this embodiment, the change in the characteristics of the resistor R1 and the variable resistor 31 due to the change in the ambient temperature is given to the output because the temperature change has the same phase as the input to the voltage comparison circuit 40. The effect is reduced and the temperature coefficient of the resistor is considerably smaller than the temperature coefficient of the Zener diode or transistor. Therefore, the voltage of the node n1 is exclusively the Zener diodes Dz1 to Dz1.
zn has a positive temperature characteristic due to the temperature characteristic of
The voltage of 2 has a negative temperature characteristic due to the temperature characteristic of the bipolar transistor 32. In this embodiment, the influence of the temperature characteristics of the Zener diodes Dz1 to Dzn on the voltage of the node n1 is determined by the resistances R1 and Rz.
2 to R1 / (R1 + R2). That is, the change rate of the output voltage when the ambient temperature fluctuates by δT is represented by δVout / δT, and the Zener diodes Dz1 to Dz
Assuming that the respective temperature coefficients of zn are δVz / δT and the temperature coefficient of the bipolar transistor 32 is δVBE / δT, δVout / δT = n (δVz / δT) * R1 / (R1 + R
2) It is expressed by + δVBE / δT.

Here, the temperature coefficient δ of the Zener diode
Vz / δT and temperature coefficient δV of bipolar transistor
BE / δT has almost the opposite characteristic, that is, δVz / δT = −δV
Since it can be regarded as BE / δT, n * R1 / (R1 + R2) = 1
At this time, it can be seen that the output voltage change rate δVout / δT becomes zero. In this embodiment, as described above, the values of the resistors R1 and R2 are (R1 + R2) / R1 ≒ n
It is set to be. Therefore, δVout /
δT = 0, and the output voltage Vout is constant irrespective of temperature fluctuation, that is, has no temperature dependency.

The values of the resistors R1 and R2 are (R1 + R
2) The reason that (R1 + R2) / R1 ≒ n is set instead of / R1 = n is that the Zener diodes Dz1 to Dz1
Since the temperature coefficient δVz / δT of Dzn and the temperature coefficient δVBE / δT of the bipolar transistor 32 are not completely equal, the resistance ratio is corrected to the resistances R1 and R2 in consideration of the difference or the like. Incidentally, when the number of Zener diodes Dz1 to Dzn is two (n = 2), R
When 1 ≒ R2 and 3 (n = 3), it is R2 ≒ 2R1.

Further, the constant voltage generating circuit of this embodiment
As shown in FIG. 1, two voltages compared by the voltage comparison circuit 40, that is, the connection node n1 and the connection node n
Resistors R1 and R2 and resistors 31 and Rc are connected to both sides of the resistor 2, respectively. Therefore, even if the values of the resistors vary due to manufacturing variations in the process, the above four resistors vary in the same manner. That is, the higher the value of one resistor, the higher the value of the other resistor, and the lower the value of one resistor, the lower the value of the other resistor. As a result, even if there is a manufacturing variation in the resistance, the potential of the node n1 determined by the ratio of the resistors R1 and R2 and the node n2 determined by the ratio of the resistors 31 and Rc
Is relatively constant. Similarly, even when the power supply voltage Vcc fluctuates, the fluctuations in the potential of the node n1 and the potential of the node n2 due to the fluctuation are caused by the resistances R1 and R2 and the resistance 3
1 and Rc, the amount of change is reduced by the resistance ratio, so that the constant voltage Vout is stable against power supply voltage fluctuation.
Can be output. Accordingly, it is desirable that the resistance ratio between the resistors R1 and R2 and the resistance ratio between the resistors 31 and Rc be close to each other.

The constant voltage generating circuit of this embodiment has a resistor 31
Is configured to be able to change the value of. Hereinafter, a specific example of the resistor 31 having a variable resistance value will be described with reference to FIG.

As shown in FIG.
Is composed of a plurality of divided resistors VR1 to VRm, and MOSFETs Qv1 to Qvm to which control signals C1 to Cm are applied to gate terminals respectively in parallel with the divided resistors VR1 to VRm.

The variable resistor 31 is connected to each of the divided resistors VR1 to VR1.
When MOSFETs Qv1 to Qvm connected in parallel with VRm are turned off by control signals C1 to Cm applied to their gate terminals, the corresponding divided resistors are enabled,
When Qv1 to Qvm are turned on, both terminals of the corresponding divided resistor are short-circuited, and the divided resistor is invalidated.

The control signals C1 to Cm are used to measure the level of the voltage output from the constant voltage generation circuit and to enable the output voltage to be at a desired level.
1 to VRm, and the corresponding MOSFET Q
It is decided to turn on v1 to Qvm. Although not particularly limited, the control signals C1 to Cm are configured to be provided from a register set to output a desired control signal or a setting circuit including a nonvolatile storage element. Instead of providing a setting circuit including a register or a nonvolatile storage element set to output a desired control signal, a fuse element for determining the input of those signals may be provided.

As described above, the level of the reference voltage Vref generated by the reference voltage generating circuit 30 is arbitrarily set by setting the resistance value of the variable resistor 31 as a whole by the enabled divided resistors. Is supplied to the voltage comparison circuit 40 and compared with the voltage of the current-voltage conversion circuit 20, and the output thereof controls the switch means 50 to output the constant voltage Vout according to the reference voltage Vref. Further, the variation in the resistance value (sheet resistance) of each resistor is controlled by adjusting the resistance ratio of the resistors R1 and R2 and the resistance ratio of the resistors 31 and Rc, thereby compensating for the temperature dependency and the power supply voltage dependency, and thereby stabilizing the constant voltage Vout. Will be output.

In the embodiment shown in FIG. 3, x bipolar transistors Tr1 to Trx whose bases and collectors are combined and function as diodes are provided in parallel, and the number of transistors, ie, x, is increased. By reducing it, the emitter current can be adjusted.

Further, in this embodiment, the diode-connected bipolar transistor 32 is used, but a PN junction diode can be used instead of the transistor. However, in that case, the power supply voltage terminal Vcc
It is desirable that the connection between the diode and the variable resistor 31 between the node and the node n2 be opposite to that in FIG. When a bipolar transistor is used as shown in FIG. 1, the relationship between the resistor 31 and the transistor 32 does not matter which one is on the power supply voltage Vcc side. Further, the constant voltage generation circuit of the embodiment of FIG. 1 can be applied to a case where the booster circuit 10 is a constant current source or a constant current circuit provided outside the chip, thereby outputting a stable constant voltage. Can be done.

FIG. 2 shows a second embodiment of the constant voltage generating circuit according to the present invention. While the constant voltage generating circuit of the embodiment of FIG. 1 outputs a negative constant voltage,
The constant voltage generating circuit of FIG. 2 is an embodiment that outputs a positive constant voltage, and the configuration of the circuit is the same as that of the embodiment of FIG. 1 except that the relationship of the power supply voltage is reversed from that of the embodiment of FIG. So that
Identical or equivalent circuits and elements are denoted by the same reference numerals, and detailed description is omitted.

FIG. 4 shows a third embodiment of the constant voltage generating circuit according to the present invention. In this embodiment, when there are two Zener diodes, the temperature dependency of the Zener diode is canceled by the temperature dependency of one bipolar transistor 32 of the reference voltage generating circuit 30 by the resistance ratio of the resistors R1 and R2. Instead, the reference voltage generation circuit 30
Is provided with two bipolar transistors in series, so that the temperature dependence of the Zener diode is offset by the temperature dependence of the two bipolar transistors 32a and 32b. Since the temperature characteristic of the Zener diode is close to the temperature characteristic of the PN junction diode between the base and the emitter of the bipolar transistor,
The configuration as shown in FIG. 4 can also reduce fluctuations in output voltage due to temperature fluctuations.

FIG. 5 shows a fourth embodiment of the constant voltage generating circuit according to the present invention. While the constant voltage generation circuit of the embodiment of FIG. 4 outputs a negative constant voltage,
The constant voltage generating circuit of FIG. 5 is an embodiment that outputs a positive constant voltage, and the configuration of the circuit is the same as that of the embodiment of FIG. 4 except that the relationship of the power supply voltage is opposite to that of the embodiment of FIG. So that
Identical or equivalent circuits and elements are denoted by the same reference numerals, and detailed description is omitted.

FIG. 6 shows a fifth embodiment of the constant voltage generating circuit according to the present invention. This embodiment is different from the voltage comparison circuit 40 shown in FIG.
In the next stage, such as a Schmitt circuit in which the threshold voltage when the output changes from high level to low level is lower than the threshold voltage when the output changes from low level to high level The output signal has a circuit 60 having a hysteresis characteristic. As a result, it is possible to prevent the output of the voltage comparison circuit 40 from being changed due to, for example, power supply noise and the like, and the switching means 50 from being unnecessarily turned on and off.

FIG. 7 shows a sixth embodiment of the constant voltage generating circuit according to the present invention. In the first to fifth embodiments, the switch means 50 is provided between the booster circuit 10 and the current-to-voltage converter 20. On the other hand, in the embodiment of FIG. An AND gate GT for supplying and shutting off a clock signal φc supplied to the pump 10 is provided. When the clock signal φc is cut off, the boosting circuit 10 stops the boosting operation, and the current drawn from the current-voltage conversion circuit 20 decreases. Therefore, the AND gate GT is the same as the switch means 50 in the first to fifth embodiments. Will work. Although not particularly limited, in this embodiment, an oscillation circuit OSC for generating a clock signal φc is provided on the same chip as the constant voltage generation circuit.

In this embodiment, the AND gate G
The supply of the clock to the booster circuit may be controlled by using the same switch means (for example, MOSFET) as in the first to fifth embodiments in place of T, or in the first embodiment.
In the fifth to fifth embodiments, instead of providing the switch means 50 between the booster circuit 10 and the current-voltage conversion circuit 20,
An AND gate G for supplying or cutting off the clock signal φc may be provided at a stage preceding the booster circuit 10.

FIG. 8 shows an electrically writable and erasable E as an example of a nonvolatile memory in which the constant voltage generation circuit according to the present invention is applied as a generation circuit for a write voltage or an erase voltage.
1 shows a schematic configuration of an EPROM (electrically erasable programmable read only memory). In FIG. 8, reference numeral 11 denotes a memory array in which memory cells as nonvolatile storage elements each composed of a MOSFET having a floating gate are arranged in a matrix, and 12 denotes a memory array based on externally input write data via an I / O buffer 13. A write / erase circuit for writing / erasing the memory array 11.

Reference numeral 14 denotes an address register for holding an externally input address signal via the I / O buffer 13. Reference numeral 15 denotes an X address taken into the address register 14 from a word line in the memory array 11. An X decoder 16 selects one word line corresponding to Y, a Y decoder 16 decodes a Y address taken into the address register 14 and selects a data line corresponding to the Y address, and 17 reads from the memory cell array 11. A sense amplifier that amplifies and outputs the data obtained.

Further, in the flash memory circuit of this embodiment, in addition to the above-mentioned circuit blocks, control signals such as an external chip select signal CS and a read / write control signal R / W are sent to each circuit block inside the memory. A control circuit 18 for converting the control signal into a control signal; a power supply circuit 70 for generating a voltage required inside the chip such as a write voltage, an erase voltage, a read voltage, a verify voltage based on a power supply voltage Vcc supplied from the outside; A desired voltage is selected from these voltages according to the state (mode) and the write / erase circuit 1 is selected.
2, a power supply switching circuit 71 for supplying power to the X decoder 15, the Y decoder 16, and the like.

The constant voltage generating circuit according to the present invention described with reference to FIGS. 1 to 7 is provided in the power supply circuit 70 as a circuit for generating a write voltage or an erase voltage. The nonvolatile memory having the constant voltage generation circuit according to the present invention as a generation circuit for a write voltage or an erase voltage has an advantage that the write time and the erase time are shortened because the accuracy of the generated voltage is high. .

FIG. 9 shows a schematic configuration of a microcomputer as an example of a semiconductor integrated circuit incorporating the above-mentioned nonvolatile memory.

In FIG. 9, NVM is a nonvolatile memory circuit having a configuration as shown in FIG. 8, and CNT controls writing, erasing, reading (including verify reading) and the like for the memory circuit NVM. Memory control circuit (memory controller), CPU is a central processing unit that decodes program instructions and performs various operations and data processing, RAM is a high-speed random access memory that temporarily stores data and provides a work area for the central processing unit CPU , BUS are the central processing unit CPU and the memory circuit N.
A bus that connects between the VM, the memory controller CNT, and the high-speed memory RAM, and a BSC is a bus controller as a system control circuit that controls the occupation right of the bus. In this system, the nonvolatile memory NVM is C
It is used to store programs executed by the PU and fixed data used in the programs.

Although not particularly limited, for example, the control signals C1 to Cm supplied for setting the generated voltage, that is, the resistance value of the variable resistor 31, in the reference voltage generating circuit 30 constituting the constant voltage generating circuit of FIG. , A control register CTR provided in the memory controller CNT
For example, the power supply circuit 7 provided in the nonvolatile memory NVM
It is configured to be supplied to a constant voltage generation circuit within 0. In a semiconductor integrated circuit such as a microcomputer having a built-in nonvolatile memory having the constant voltage generation circuit according to the present invention as a write voltage or erase voltage generation circuit, the accuracy of the generated voltage is high. There is an advantage that the time and the erasing time are shortened, and high-speed operation becomes possible.

Although not shown in FIG. 9, in the case of a microcomputer such as a single-chip microcomputer, in addition to the above-mentioned circuit blocks, a DMA (direct memory) between an internal memory and an external memory is used. Memory access)
DMA transfer control circuit for controlling transfer, interrupt control circuit for determining the occurrence and priority of an interrupt request to the CPU and issuing an interrupt, serial communication interface circuit for performing serial communication with an external device, various timer circuits, analog An A / D converter for converting signals and digital signals, a watchdog timer for system monitoring, an oscillator for generating a clock signal required for system operation, and the like are provided as necessary.

FIG. 10 shows a configuration example of an IC card (memory card) as an example of a system using a nonvolatile memory. Although the IC card of this embodiment is not particularly limited, n nonvolatile memory chips FM1 to FMn
And a controller chip CONT having functions such as switching of an interface and a bus with the outside, formation of a selection signal for each memory chip based on an address signal and a control signal, generation and check of an ECC code, and commands supplied from the outside. A microprocessor CPU that performs write / read control on the nonvolatile memory chip based on the information is mounted on the printed circuit board 100 and is entirely molded with resin or the like.

The controller chip CONT includes an address & control bus 11 formed on the substrate 100.
1 and the data bus 112, are connected to the non-volatile memory chips FM1 to FMn, and are connected to external terminals 114 inserted into a card slot of an external personal computer main body. Access is configured to be performed via the controller chip CONT.
From the microprocessor CPU to the memory chips FM1 to F
A control signal may be supplied to Mn.

In this embodiment, although not particularly limited, the constant voltage generation circuit according to the present invention generates a write voltage Vw, a read voltage Vr, an erase voltage Ve, a write verify voltage Vwv, an erase verify voltage Vev, and the like. A power supply circuit is provided in the controller chip CONT,
The generated power supply voltage is configured to be supplied to each of the nonvolatile memory chips FM1 to FMn via the power supply line group 113. 116 is the controller chip C
An external power supply terminal to which a power supply voltage Vcc supplied to the ONT and the nonvolatile memory chips FM1 to FMn is applied;
Reference numeral 17 denotes an external ground terminal to which a ground potential is applied.

The function of the controller chip CONT may be constituted by one or several semiconductor chips, but may be constituted by one gate array. Also,
Controller chip CONT and microprocessor CP
Instead of mounting the memory chips FM1 to FMn on the substrate from U, an IC card mounting a microcomputer chip as shown in FIG. 9 is also possible.

An IC in which a non-volatile memory having the constant voltage generating circuit according to the present invention as a writing voltage or erasing voltage generating circuit or a semiconductor integrated circuit such as a microcomputer incorporating the same is mounted on one insulating substrate. In a system such as a card, the accuracy of the generated voltage is high, so the writing time and erasing time are short,
There is an advantage that the throughput of the system is improved.

Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the invention. Needless to say. For example, in the above-described embodiment, the EEPROM and the semiconductor integrated circuit including the EEPROM have been described. However, the present invention is not limited thereto, and may be similarly applied to a flash memory and a semiconductor integrated circuit including the same.

In the above description, the case where the invention made by the present inventor is mainly applied to a constant voltage generating circuit built in a nonvolatile memory, which is the application field of the background, has been described. However, the present invention can be widely used for a semiconductor integrated circuit for generating a constant voltage or a reference voltage for generating a constant voltage or a semiconductor integrated circuit having a built-in constant voltage generating circuit.

[0065]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, according to the present invention, a constant voltage generating circuit capable of generating a constant voltage regardless of a temperature change is obtained. Further, a constant voltage generation circuit capable of generating a constant voltage regardless of power supply fluctuation is obtained. Further, a constant voltage generation circuit capable of generating a constant voltage regardless of manufacturing variations can be obtained.

When the constant voltage generation circuit of the present invention is incorporated in a nonvolatile memory as a write voltage or erase voltage generation circuit, the write / erase time can be shortened. Further, in a system such as a semiconductor integrated circuit such as a microcomputer having a built-in nonvolatile memory having the constant voltage generating circuit of the present invention as a writing voltage or erasing voltage generating circuit or an IC card, the speed and throughput are improved. The effect is that it can be achieved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of a constant voltage generating circuit according to the present invention.

FIG. 2 is a circuit configuration diagram showing another embodiment of the constant voltage generation circuit according to the present invention.

FIG. 3 is a circuit diagram showing a more specific configuration example of the constant voltage generation circuit of FIG. 1;

FIG. 4 is a circuit configuration diagram showing a third embodiment of the constant voltage generation circuit according to the present invention.

FIG. 5 is a circuit diagram showing a fourth embodiment of the constant voltage generation circuit according to the present invention.

FIG. 6 is a circuit configuration diagram showing a modification of the constant voltage generation circuit according to the present invention.

FIG. 7 is a circuit configuration diagram showing another modification of the constant voltage generation circuit according to the present invention.

FIG. 8 is a block diagram showing a configuration example of a nonvolatile memory in which the constant voltage generation circuit according to the present invention is incorporated as a circuit for generating a write voltage or an erase voltage.

FIG. 9 is an overall block diagram showing a schematic configuration of an example of a microcomputer as an example of a semiconductor integrated circuit incorporating a nonvolatile memory to which the constant voltage generation circuit according to the present invention is applied.

FIG. 10 is a block diagram showing an example of an IC card having a built-in nonvolatile memory to which the constant voltage generation circuit according to the present invention is applied.

FIG. 11 is a circuit diagram showing an example of a constant voltage generation circuit studied prior to the present invention.

[Explanation of symbols]

 Reference Signs List 11 memory array 12 write / erase circuit 13 I / O buffer 14 address register 15 row decoder 16 column decoder 17 sense amplifier 18 control circuit 70 power supply circuit 71 power supply switching circuit 10 booster circuit 20 current-voltage conversion circuit 30 reference voltage generation circuit 32 voltage Generation means 33 Constant current circuit 40 Voltage comparison circuit 50 Current control means

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shihisa Yamamoto 5-22-1, Josuihoncho, Kodaira-shi, Tokyo Inside Hitachi Super LSI Systems Co., Ltd. (72) Inventor Takeo Kanai Tokyo 5-22-1, Kamizuhoncho, Kodaira-shi, Tokyo F-term in Hitachi Ultra-SII Systems Co., Ltd. 5G065 AA00 EA01 GA06 HA04 JA01 LA01 MA09 NA02 NA04 NA07 5H420 NA03 NA31 NB02 NB35 NC03 NC18 NC26 NC31 NE23

Claims (8)

[Claims] 1. A reference voltage generation circuit for generating a reference voltage, a current-voltage conversion circuit including a resistor and a Zener diode connected in series with the resistance, and a current flowing through the current-voltage conversion circuit can be controlled. Current control means, and a voltage comparison circuit for controlling the current control means by comparing the voltage converted by the current-voltage conversion circuit with the reference voltage from the reference voltage generation circuit, and comprising the zener diode A constant voltage generation circuit configured to generate a constant voltage clamped by a voltage conversion circuit, wherein the reference voltage generation circuit is connected in series with the variable resistance means and the temperature characteristic of the Zener diode. Characterized by comprising voltage generating means which can be compensated for by the temperature characteristics of the above and a constant current circuit for supplying a current to the voltage generating means. Raw circuit. 2. When the current-to-voltage conversion circuit has a plurality of series-structured zener diodes, the reference voltage generation circuit includes the same number of voltage generation means as the zener diodes of the current-to-voltage conversion circuit. The constant voltage generating circuit according to claim 1, wherein the constant voltage generating circuit is connected in series with the constant voltage generator. 3. When the current-voltage conversion circuit has n (n is a positive integer) series-type Zener diodes, two or more resistive elements are connected in series with the Zener diode, and these resistive elements are connected. 2. The constant voltage generation circuit according to claim 1, wherein a voltage divided by 1 / n by said resistance division is supplied to said voltage comparison circuit. 4. The constant current circuit of the reference voltage generation circuit, wherein the constant current circuit includes a transistor having a constant voltage applied to a control terminal, and a resistor connected in series with the transistor. The constant voltage generation circuit according to claim 3. 5. The variable resistance means of the reference voltage generation circuit includes a plurality of divided resistors in series, and a plurality of transistors connected in parallel with each of the divided resistors and having a control signal applied to a control terminal. 5. The constant voltage generating circuit according to claim 1, wherein the constant voltage generating circuit is configured. 6. A non-volatile memory comprising the constant voltage generation circuit according to claim 1, 2, 3 or 4 as a circuit for generating a write voltage or an erase voltage applied to a storage element. 7. A nonvolatile memory according to claim 6, a memory control circuit for controlling said nonvolatile memory to perform write and read operations, and a control signal for controlling an operation state of said nonvolatile memory. And a system control circuit for forming a semiconductor integrated circuit. 8. A semiconductor integrated circuit according to claim 7, or a nonvolatile memory according to claim 6, a memory control circuit for controlling said nonvolatile memory to perform write and read operations, and A system control circuit for forming a control signal for controlling an operation state of the system is mounted on one insulating substrate.