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JP2001102252A - Method of manufacturing solid electrolytic capacitor - Google Patents

Method of manufacturing solid electrolytic capacitor

Info

Publication number
JP2001102252A
JP2001102252A JP27792699A JP27792699A JP2001102252A JP 2001102252 A JP2001102252 A JP 2001102252A JP 27792699 A JP27792699 A JP 27792699A JP 27792699 A JP27792699 A JP 27792699A JP 2001102252 A JP2001102252 A JP 2001102252A
Authority
JP
Japan
Prior art keywords
capacitor element
capacitor
circuit board
electrode
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27792699A
Other languages
Japanese (ja)
Other versions
JP3568432B2 (en
Inventor
Yasuhiro Kishimoto
泰広 岸本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electronic Components Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electronic Components Co Ltd, Sanyo Electric Co Ltd filed Critical Sanyo Electronic Components Co Ltd
Priority to JP27792699A priority Critical patent/JP3568432B2/en
Publication of JP2001102252A publication Critical patent/JP2001102252A/en
Application granted granted Critical
Publication of JP3568432B2 publication Critical patent/JP3568432B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • H01G4/236Terminals leading through the housing, i.e. lead-through

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a small-sized chip capacitor having large capacitance. SOLUTION: In a method of manufacturing a solid electrolytic capacitor, in which a capacitor element 2 having an anode lead 11 led out at one end thereof, and a cathode formed on the outer peripheral surface is resin-sealed, in order to improve the volume ratio of the capacitor element to a capacitor finished product, the capacitor element 2 is bonded on the inner surface of a circuit board 3 which has a positive electrode and negative electrode both on the inner and outer surfaces thereof and the electrodes having the same polarity are connected to each other via through-holes, so that the negative electrode on the surface and the cathode of the capacitor element 2 are electrically connected, and after the anode lead 11 of the capacitor element 2 is connected to the positive electrode, the outer surface of the circuit board 3 is exposed and the capacitor element 2 is resin-sealed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップタイプの固
体電解コンデンサの製造方法において、コンデンサ完成
品に対するコンデンサ素子の体積比率を向上させたチッ
プコンデンサの製法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip-type solid electrolytic capacitor, and more particularly to a method for manufacturing a chip capacitor in which the volume ratio of a capacitor element to a finished capacitor is improved.

【0002】[0002]

【従来の技術】固体電解コンデンサは、図3に示し公知
の如く、一端に陽極リード(11)が導出されている弁作用
金属からなる焼結体等(例えばタンタル焼結体)に誘電体
酸化皮膜、固体電解質層、カーボン層、銀ペースト層を
順次形成し、コンデンサ素子(2)を完成する。次に、予
め所定の寸法に折り曲げた2つのリードフレーム(21)(2
2)の内、一方のリードフレームを陽極リード(11)に溶接
接合し、他方のリードフレーム(22)を銀接着剤(4)によ
って銀ぺースト層に接着接続する。次に、トランスファ
ーモールド等により、リードフレーム(21)(22)の先端側
を露出させた状態にコンデンサ素子(2)を樹脂封止す
る。最後に、外装樹脂(6)の外側に導出されたリードフ
レーム(21)(22)を所定の寸法に折り曲げてプラス電極及
びマイナス電極を形成してコンデンサを完成する。
2. Description of the Related Art As shown in FIG. 3, a solid electrolytic capacitor is made of a dielectric material such as a sintered body (for example, a tantalum sintered body) made of a valve metal having an anode lead (11) led out at one end. A film, a solid electrolyte layer, a carbon layer, and a silver paste layer are sequentially formed to complete the capacitor element (2). Next, the two lead frames (21) (2
Of 2), one lead frame is welded to the anode lead (11), and the other lead frame (22) is adhesively connected to the silver paste layer with the silver adhesive (4). Next, the capacitor element (2) is resin-sealed by transfer molding or the like so that the leading ends of the lead frames (21) and (22) are exposed. Finally, the lead frames (21) and (22) led out of the exterior resin (6) are bent to predetermined dimensions to form a plus electrode and a minus electrode, thereby completing the capacitor.

【0003】[0003]

【本発明が解決しようとする課題】上記従来技術による
方法では、プラス側に陽極リード(11)とリードフレーム
(21)との接続のための溶接代(23)を、マイナス側にリー
ドフレーム(21)の折り曲げ代(24)をとる必要がある。例
えば、長さ7.3mm、幅4.3mmのサイズ(以下、「Dケ
ース」という)のコンデンサの場合、プラス側及びマイ
ナス側の外装樹脂(6)の肉厚L1、L2は、それぞれ約
1.8mmであった。また、従来は外装樹脂(6)の外側で
リードフレーム(21)(22)を折り曲げる必要があり、モー
ルド後の外装樹脂(6)の長さは、Dケースの規格値7.
3mmに対してリードフレーム(21)の厚み分だけ小さく成
型する必要があった(図3参照)。
In the method according to the prior art, the anode lead (11) and the lead frame are provided on the plus side.
The welding margin (23) for connection with the (21) needs to be provided, and the lead frame (21) must have a bending margin (24) on the minus side. For example, in the case of a capacitor having a length of 7.3 mm and a width of 4.3 mm (hereinafter, referred to as "D case"), the thickness L1 and L2 of the plus side and minus side exterior resin (6) are about 1 respectively. It was .8 mm. Conventionally, it is necessary to bend the lead frames (21) and (22) outside the exterior resin (6), and the length of the exterior resin (6) after molding is 7.
It was necessary to mold the lead frame (21) to be smaller than 3 mm by the thickness of the lead frame (21) (see FIG. 3).

【0004】上記の例では、モールド後の外装樹脂(6)
の長さは7.1mmに成型されている。そのため従来技術
による方法では、コンデンサ完成品に対するコンデンサ
素子の体積比率(以下、単に「体積比率」という)を十分
に大きくとることができず、体積比率は下記の表1のと
おり約20.4%に止まっていた。表1はDケースで高
さ1.8mmのコンデンサの場合の例である。本発明は、
上記問題を解決し、体積比率の向上により小型で大容量
のチップコンデンサを提供するものである。
In the above example, the exterior resin (6) after molding is used.
Is molded to 7.1 mm in length. Therefore, in the method according to the prior art, the volume ratio of the capacitor element to the completed capacitor product (hereinafter simply referred to as “volume ratio”) cannot be sufficiently large, and the volume ratio is about 20.4% as shown in Table 1 below. Was stopped at Table 1 shows an example in the case of a capacitor having a height of 1.8 mm in the D case. The present invention
An object of the present invention is to solve the above problem and provide a small and large-capacity chip capacitor by improving the volume ratio.

【0005】[0005]

【表1】 [Table 1]

【0006】[0006]

【課題を解決する手段】本発明の固体電解コンデンサの
製造方法は、一端に陽極リード(11)を導出し、外周面に
陰極を形成したコンデンサ素子(2)に対して樹脂封止を
行う固体電極コンデンサの製法において、内外両面に夫
々プラス電極とマイナス電極を有し、同極どうしをスル
ーホールで導通した回路基板(3)の内面に前記コンデン
サ素子(2)を接着して該面のマイナス電極とコンデンサ
素子(2)の陰極を電気的に接続するとともにコンデンサ
素子(2)の陽極リード(11)をブラス電極に接合した後、
回路基板(3)の外面を露出させてコンデンサ素子(2)に
対して樹脂封止を行うことを特徴とする。
According to the method for manufacturing a solid electrolytic capacitor of the present invention, an anode lead (11) is led out at one end and a capacitor element (2) having a cathode formed on the outer peripheral surface is sealed with a resin. In the method of manufacturing an electrode capacitor, the capacitor element (2) is adhered to the inner surface of a circuit board (3) having a positive electrode and a negative electrode on both the inner and outer surfaces, respectively, and having the same polarity through a through hole, thereby forming a negative electrode. After electrically connecting the electrode and the cathode of the capacitor element (2) and bonding the anode lead (11) of the capacitor element (2) to the brass electrode,
It is characterized in that the outer surface of the circuit board (3) is exposed and resin sealing is performed on the capacitor element (2).

【0007】[0007]

【作用及び効果】回路基板(プリントサーキッドボード)
(3)にコンデンサ素子(2)を接着接続することにより、
体積比率を大きくすることができるため、小型で大容量
のコンデンサを得ることができる。また、従来のリード
フレーム(21)を省略できるため、等価直列抵抗(ESR)
の小さいコンデンサを製造できる。さらに、従来使用し
ていたリードフレーム(21)が不要となり、リードフレー
ム(21)の接合、折り曲げの手間が省ける。
[Function and effect] Circuit board (printed circuit board)
By bonding the capacitor element (2) to (3),
Since the volume ratio can be increased, a small-sized and large-capacity capacitor can be obtained. Also, since the conventional lead frame (21) can be omitted, the equivalent series resistance (ESR)
Capacitor with a small size can be manufactured. Furthermore, the lead frame (21) conventionally used becomes unnecessary, and the labor of joining and bending the lead frame (21) can be omitted.

【0008】[0008]

【発明の実施の形態】固体電解コンデンサは、図10に
示す如く、一端に陽極リード(11)を導出し、外周面に陰
極を形成したコンデンサ素子(2)に対して樹脂封止を行
っている。コンデンサ素子(2)は、タンタル(Ta)、ア
ルミニウム(Al)、ニオブ(Nb)、チタン(Ti)等の弁
作用金属の表面に、陽極酸化等の方法により、誘電体酸
化皮膜を生じさせ、該皮膜上にポリピロール、ポリチオ
フェン、ポリアニリン等の高分子有機半導体を固体電解
質として形成せしめた後、カーボン層、銀ペースト層を
順次形成して完成する。銀ペースト層(図示せず)が陰極
となっている。上記コンデンサ素子(2)は公知技術(例
えば特開平8−148392(H01G9/00))によ
って作製することができるので、コンデンサ素子そのも
のの製法の説明は省略する。以下の実施例では、弁作用
金属としてタンタル焼結体(1)を、固体電解質としてポ
リピロールを採用した。
BEST MODE FOR CARRYING OUT THE INVENTION As shown in FIG. 10, an anode lead (11) is led out at one end of a solid electrolytic capacitor, and a capacitor element (2) having a cathode formed on the outer peripheral surface is subjected to resin sealing. I have. The capacitor element (2) forms a dielectric oxide film on the surface of a valve metal such as tantalum (Ta), aluminum (Al), niobium (Nb), and titanium (Ti) by a method such as anodic oxidation. After a polymer organic semiconductor such as polypyrrole, polythiophene, or polyaniline is formed on the film as a solid electrolyte, a carbon layer and a silver paste layer are sequentially formed to complete the process. A silver paste layer (not shown) serves as a cathode. Since the capacitor element (2) can be manufactured by a known technique (for example, JP-A-8-148392 (H01G9 / 00)), the description of the method of manufacturing the capacitor element itself is omitted. In the following examples, a tantalum sintered body (1) was employed as a valve metal and polypyrrole was employed as a solid electrolyte.

【0009】「実施例1」タンタル焼結体(1)は、図1
0に示す如く、扁平直方体であり、長手方向と直交する
一端面から長手方向に陽極リード(11)を導出している。
コンデンサの製法に際し、まず、図4のように回路基板
(3)を作製する。本実施例は、Dケースのコンデンサを
製造する場合の例であり、図4では、1枚の回路基板
(3)で360個(30×6×2)のコンデンサを製造する
レイアウトを示している。回路基板(3)には、厚み0.
2mmのガラス布・エポキシ樹脂銅張積層板を用いた。
Example 1 A tantalum sintered body (1) is shown in FIG.
As shown at 0, the anode lead (11) is a flat rectangular parallelepiped, and the anode lead (11) is led out in the longitudinal direction from one end face orthogonal to the longitudinal direction.
When manufacturing the capacitor, first, as shown in FIG.
(3) is prepared. This embodiment is an example of manufacturing a D-case capacitor, and FIG. 4 shows one circuit board.
(3) shows a layout for manufacturing 360 (30 × 6 × 2) capacitors. The circuit board (3) has a thickness of 0.
A 2 mm glass cloth / epoxy resin copper-clad laminate was used.

【0010】本実施例で用いた回路基板(3)のパターン
を図5及び図6に示す。ここでは、コンデンサ素子(2)
が接着される面を内面とし、その反対の面を外面として
いる。また、内面のプラス電極(31)は外面のプラス電極
(31)と、内面のマイナス電極(32)は外面のマイナス電極
(32)とそれぞれスルーホール(33)で電気的に接続されて
いる。内面の電極のパターンを図5に、外面の電極のパ
ータンを図6に示す。さらに、回路基板(3)のすべての
マイナス電極(32)は、図5及び図6に示すように電気的
に接続されている。これは、後述するエージングの際の
便宜のためである。
FIGS. 5 and 6 show patterns of the circuit board (3) used in this embodiment. Here, the capacitor element (2)
The surface to be bonded is defined as the inner surface, and the opposite surface is defined as the outer surface. The inner positive electrode (31) is the outer positive electrode.
(31) and the inner negative electrode (32) are the outer negative electrode.
(32) and are electrically connected to each other by through holes (33). FIG. 5 shows the pattern of the electrodes on the inner surface, and FIG. 6 shows the pattern of the electrodes on the outer surface. Further, all the negative electrodes (32) of the circuit board (3) are electrically connected as shown in FIGS. This is for convenience in aging described later.

【0011】次に、コンデンサ素子(2)の陽極リード(1
1)を回路基板(3)内面のプラス電極(31)に、外周銀ペー
スト層を回路基板(3)の内面のマイナス電極(32)にそれ
ぞれ接続する。このとき、コンデンサ素子(2)の外周銀
ペースト層(陰極)は回路基板(3)のマイナス電極(32)に
直接に銀接着剤(4)を用いて接着接続し、陽極リード(1
1)は一定の長さで約90度に曲げてからプラス電極(31)
に銀接着剤(4)を用いて接着接続する。次に、エポキシ
樹脂等の外装樹脂(6)を高さが一定になるように回路基
板(3)の上から塗布する。本実施例では外装樹脂(6)の
高さが約1.6mmになるように塗布した。その後、15
0℃の硬化炉に30分入れることにより外装樹脂(6)を
硬化させる。
Next, the anode lead (1) of the capacitor element (2)
1) is connected to the plus electrode (31) on the inner surface of the circuit board (3), and the outer peripheral silver paste layer is connected to the minus electrode (32) on the inner surface of the circuit board (3). At this time, the outer silver paste layer (cathode) of the capacitor element (2) is adhesively connected directly to the negative electrode (32) of the circuit board (3) using a silver adhesive (4), and the anode lead (1) is formed.
1) is a fixed length, bent to about 90 degrees, and then a plus electrode (31)
Is connected by using a silver adhesive (4). Next, an exterior resin (6) such as an epoxy resin is applied from above the circuit board (3) so that the height is constant. In the present embodiment, the coating was performed such that the height of the exterior resin (6) was about 1.6 mm. Then 15
The exterior resin (6) is cured by placing it in a curing oven at 0 ° C. for 30 minutes.

【0012】次に、回路基板(3)を製品単位に切り分け
る前に、個々のコンデンサに直流電圧を印加することに
より、漏れ電流の低減を目的としてエージングを行う。
プラス電極(31)はそれぞれ独立しているため、コンデン
サ毎に接続する必要があるが、マイナス電極(32)は共通
であるから、一ヶ所に電源に接続すれば足りる利点があ
る。最後に、ダイシングにより所定の大きさにカット
し、チップコンデンサ(40)が完成する。
Next, before cutting the circuit board (3) into product units, aging is performed for the purpose of reducing leakage current by applying a DC voltage to each capacitor.
Since the positive electrode (31) is independent of each other, it is necessary to connect it to each capacitor. However, since the negative electrode (32) is common, there is an advantage that it is sufficient to connect the power supply to one place. Finally, the chip capacitor is cut into a predetermined size by dicing to complete the chip capacitor (40).

【0013】本発明では、従来のようにリードフレーム
(21)を用いないため、マイナス側の外装樹脂(6)の長さ
寸法L1は、従来の1.8mmを0.5mmにでき、さらに、
外装樹脂(6)の外側でリードフレーム(21)(22)を折り曲
げる必要がないため、外装樹脂(6)の全体の長さを7.
3mmと従来より0.2mm長く成型でき、コンデンサ素子
(2)の長さは全体で1.5mm長くできた。この関係(長さ
方向)をまとめると下記の表2の通りである。
In the present invention, a conventional lead frame is used.
Since (21) is not used, the length L1 of the exterior resin (6) on the minus side can be reduced from the conventional 1.8 mm to 0.5 mm.
Since it is not necessary to bend the lead frames (21) and (22) outside the exterior resin (6), the overall length of the exterior resin (6) is set to 7.
Capacitor element can be molded 0.2mm longer than conventional 3mm
(2) The overall length was increased by 1.5 mm. The relationship (length direction) is summarized in Table 2 below.

【0014】[0014]

【表2】 [Table 2]

【0015】また、高さ方向についてみてみると、図3
のように従来必要であったコンデンサ素子(2)の上面に
被さるリードフレーム(22)及び外装樹脂(6)の下面に接
する様に折り曲げられるリードフレーム(21)(22)の厚み
が不要となる。そのため、コンデンサ素子(2)の高さは
従来に比べて0.3mm高くできた。この関係をまとめる
と表3の通りである。尚、幅方向に関しては、成型後の
外装樹脂(6)の幅とコンデンサ素子(2)の幅との関係は
従来と同じである。
Looking at the height direction, FIG.
As described above, the thickness of the lead frame (22) covering the upper surface of the capacitor element (2) and the thickness of the lead frames (21) and (22) bent so as to be in contact with the lower surface of the exterior resin (6) become unnecessary. . Therefore, the height of the capacitor element (2) can be increased by 0.3 mm as compared with the conventional case. Table 3 summarizes this relationship. In the width direction, the relationship between the width of the exterior resin (6) after molding and the width of the capacitor element (2) is the same as in the related art.

【0016】「実施例2」実施例2は、図11に示す如
く、扁平直方体のタンタル焼結体(1)の片面に該焼結体
の厚み方向に沿って陽極リード(11)を導出している。タ
ンタル焼結体(1)に対する誘電体酸化皮膜の形成から、
ポリピロール層、カーボン層及び銀ペースト層の形成は
上記実施例1と同様に公知技術により行うことができ、
コンデンサ素子(2)が完成する。但し、陽極リード(11)
の根元付近には銀ペースト層は形成しない。
Example 2 In Example 2, as shown in FIG. 11, an anode lead (11) was led out to one side of a flat rectangular parallelepiped tantalum sintered body (1) along the thickness direction of the sintered body. ing. From the formation of the dielectric oxide film on the tantalum sintered body (1),
The formation of the polypyrrole layer, the carbon layer and the silver paste layer can be performed by a known technique in the same manner as in Example 1 described above.
The capacitor element (2) is completed. However, anode lead (11)
No silver paste layer is formed in the vicinity of the base.

【0017】本実施例に用いた回路基板(3)の内面及び
外面のパターンは図7及び図8のとおりである。コンデ
ンサ素子(2)は前記同様にして回路基板(3)の内面に接
着接続される。このとき、図2に示す如く、陽極リード
(11)は回路基板(3)のスルーホール(33)に途中まで挿入
され、銀接着剤(4)によりスルーホール(33)中で接続さ
れている。コンデンサ素子(2)の陽極リード(11)が導出
されている面の陽極リード(11)の根元付近を除いて銀ペ
ースト層が形成されている部分は、銀接着剤(4)によ
り、回路基板(3)内面のマイナス電極(32)と接着接続さ
れる。次に、コンデンサ素子(2)をエポキシ樹脂等の外
装樹脂(6)によって封止する。外装樹脂(6)の封止以降
の工程は、実施例1と同様である。
The patterns on the inner and outer surfaces of the circuit board (3) used in this embodiment are as shown in FIGS. The capacitor element (2) is adhesively connected to the inner surface of the circuit board (3) in the same manner as described above. At this time, as shown in FIG.
(11) is inserted halfway into the through hole (33) of the circuit board (3) and is connected in the through hole (33) by the silver adhesive (4). The portion of the surface of the capacitor element (2) from which the anode lead (11) is led out, except for the vicinity of the base of the anode lead (11), is provided with a silver adhesive (4) on the circuit board. (3) It is adhesively connected to the negative electrode (32) on the inner surface. Next, the capacitor element (2) is sealed with an exterior resin (6) such as an epoxy resin. The steps after sealing the exterior resin (6) are the same as those in the first embodiment.

【0018】実施例2では、プラス側の外装樹脂(6)の
長さ寸法L2についても従来の1.8mmを0.5mmにする
ことができるため、実施例1よりもさらにコンデンサ素
子(2)の長さを1.3mm長くすることができている。(表
2参照)。尚、高さ方向及び幅方向に関しては、実施例
1の場合と同じである(下記の表3参照)。
In the second embodiment, since the length L2 of the conventional exterior resin (6) on the plus side can be reduced to 0.5 mm from 1.8 mm in the conventional case, the capacitor element (2) can be further improved compared to the first embodiment. Has been increased by 1.3 mm. (See Table 2). The height direction and the width direction are the same as those in the first embodiment (see Table 3 below).

【0019】[0019]

【表3】 [Table 3]

【0020】上記実施例1及び2で用いたコンデンサ素
子(2)の体積及び体積比率は下記表4のとおりである。
The volumes and volume ratios of the capacitor elements (2) used in Examples 1 and 2 are as shown in Table 4 below.

【0021】[0021]

【表4】 [Table 4]

【0022】実施例1では、体積比率を従来の約1.8
6倍、実施例2では約2.34倍にそれぞれ大きくする
ことができている。このように、本発明によって、体積
比率を大きくすることが可能となり、小型で大容量のコ
ンデンサを実現できることが解る。
In the first embodiment, the volume ratio is set to about 1.8 in the related art.
In the second embodiment, the magnification can be increased to about 2.34 times. As described above, according to the present invention, it is understood that the volume ratio can be increased, and a small-sized and large-capacity capacitor can be realized.

【0023】「実施例3」 外面のパターンについては、パターンをいくつかに分割
することができる。本実施例では、プラス側マイナス側
をそれぞれ6つに分割している(図9参照)。それぞれの
パターンにはんだボールを形成して電極としている。
Embodiment 3 Regarding the pattern on the outer surface, the pattern can be divided into several parts. In this embodiment, each of the plus side and the minus side is divided into six (see FIG. 9). Electrodes are formed by forming solder balls on each pattern.

【0024】上記の如く、本発明では、回路基板(3)に
コンデンサ素子(2)を接着接続することにより、体積比
率を大きくすることができるため、小型で大容量のコン
デンサを得ることができる。また、リードフレーム(21)
を用いる必要がないため、等価直列抵抗(ESR)の小さ
いコンデンサを製造することができる。さらに、従来の
リードフレーム(21)を省略できるため、図12に示す如
く、実装回路基板(41)にコンデンサ(40)を配備する際
に、コンデンサ(40)の両側のはんだ付けエリア(42)(42)
が不要となり、実装回路基板(41)の電子部品の実装密度
を向上させることができ、電子機器の小型化に貢献でき
る(図13参照)。
As described above, in the present invention, the volume ratio can be increased by adhesively connecting the capacitor element (2) to the circuit board (3), so that a small-sized and large-capacity capacitor can be obtained. . Also, lead frame (21)
Therefore, it is possible to manufacture a capacitor having a small equivalent series resistance (ESR). Further, since the conventional lead frame (21) can be omitted, as shown in FIG. 12, when the capacitor (40) is provided on the mounting circuit board (41), the soldering areas (42) on both sides of the capacitor (40) are used. (42)
Is unnecessary, and the mounting density of electronic components on the mounting circuit board (41) can be improved, which can contribute to miniaturization of electronic devices (see FIG. 13).

【0025】本発明は上記実施例の構成に限定されるこ
とはなく、特許請求の範囲に記載の範囲で種々の変形が
可能である。
The present invention is not limited to the configuration of the above embodiment, and various modifications are possible within the scope of the claims.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例1による固体電解コンデンサの
断面図である。
FIG. 1 is a sectional view of a solid electrolytic capacitor according to Embodiment 1 of the present invention.

【図2】本発明の実施例2による固体電解コンデンサの
断面図である。
FIG. 2 is a sectional view of a solid electrolytic capacitor according to Embodiment 2 of the present invention.

【図3】従来技術による固体電解コンデンサ素子の断面
図である。
FIG. 3 is a cross-sectional view of a conventional solid electrolytic capacitor element.

【図4】回路基板3のレイアウト図である。FIG. 4 is a layout diagram of the circuit board 3;

【図5】実施例1における内面のパターン図である。FIG. 5 is a pattern diagram of an inner surface according to the first embodiment.

【図6】実施例1における外面のパターン図である。FIG. 6 is a pattern diagram of an outer surface according to the first embodiment.

【図7】実施例2における内面のパターン図である。FIG. 7 is a pattern diagram of an inner surface according to the second embodiment.

【図8】実施例2における外面のパターン図である。FIG. 8 is a pattern diagram of an outer surface according to the second embodiment.

【図9】実施例3におけるパターン図である。FIG. 9 is a pattern diagram according to a third embodiment.

【図10】実施例1におけるタンタル焼結体の斜視図で
ある。
FIG. 10 is a perspective view of a tantalum sintered body in Example 1.

【図11】実施例2におけるタンタル焼結体の斜視図で
ある。
FIG. 11 is a perspective view of a tantalum sintered body in Example 2.

【図12】従来技術における実装回路基板へのコンデン
サ実装図である。
FIG. 12 is a diagram of mounting a capacitor on a mounting circuit board according to the related art.

【図13】本発明における実装回路基板へのコンデンサ
実装図である。
FIG. 13 is a diagram of mounting a capacitor on a mounting circuit board according to the present invention.

【符号の説明】[Explanation of symbols]

(1) タンタル焼結体 (2) コンデンサ素子 (3) 回路基板 (4) 銀接着剤 (6) 外装樹脂 (11) 陽極リード (21) リードフレーム (31) プラス電極 (32) マイナス電極 (33) スルーホール (40) コンデンサ (1) Sintered tantalum (2) Capacitor element (3) Circuit board (4) Silver adhesive (6) Outer resin (11) Anode lead (21) Lead frame (31) Positive electrode (32) Negative electrode (33 ) Through-hole (40) Capacitor

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 一端に陽極リード(11)を導出し、外周面
に陰極を形成したコンデンサ素子(2)に対して樹脂封止
を行う固体電極コンデンサの製法において、内外両面に
夫々プラス電極とマイナス電極を有し、同極どうしをス
ルーホールで導通した回路基板(3)の内面に前記コンデ
ンサ素子(2)を接着して該面のマイナス電極とコンデン
サ素子(2)の陰極を電気的に接続するとともにコンデン
サ素子(2)の陽極リード(11)をブラス電極に接合した
後、回路基板(3)の外面を露出させてコンデンサ素子
(2)に対して樹脂封止を行うことを特徴とする固体電解
コンデンサの製造方法。
1. A method for manufacturing a solid electrode capacitor in which an anode lead (11) is led out at one end and a resin is sealed to a capacitor element (2) having a cathode formed on an outer peripheral surface, wherein a positive electrode is provided on both inner and outer surfaces. The capacitor element (2) is adhered to the inner surface of the circuit board (3) having a negative electrode and having the same polarity conducted through holes, and the negative electrode on the surface and the cathode of the capacitor element (2) are electrically connected. After connecting and bonding the anode lead (11) of the capacitor element (2) to the brass electrode, exposing the outer surface of the circuit board (3),
(2) A method for manufacturing a solid electrolytic capacitor, wherein resin sealing is performed.
【請求項2】 回路基板(3)の外面のプラス電極及びマ
イナス電極のパターンをそれぞれ2以上に分割したこと
を特徴とする請求項1記載の固体電解コンデンサの製造
方法。
2. The method for manufacturing a solid electrolytic capacitor according to claim 1, wherein the pattern of the plus electrode and the minus electrode on the outer surface of the circuit board is divided into two or more.
【請求項3】 コンデンサ素子(2)を構成する弁作用金
属は焼結体である請求項1又は2に記載の固体電解コン
デンサの製造方法。
3. The method according to claim 1, wherein the valve metal constituting the capacitor element is a sintered body.
【請求項4】 陽極リード(11)を回路基板(3)のスルー
ホールに挿入する請求項1乃至3の何れかに記載の固体
電解コンデンサの製造方法。
4. The method for manufacturing a solid electrolytic capacitor according to claim 1, wherein the anode lead is inserted into a through hole of the circuit board.
【請求項5】 コンデンサ素子(2)が接着接続され樹脂
封止された回路基板(3)を個々の大きさのコンデンサに
カットする前に、エージング処理を行うことを特徴とす
る請求項1乃至4の何れかに記載の固体電解コンデンサ
の製造方法。
5. An aging process is performed before the circuit board (3) to which the capacitor element (2) is adhesively connected and resin-sealed is cut into individual size capacitors. 5. The method for manufacturing a solid electrolytic capacitor according to any one of 4.
JP27792699A 1999-09-30 1999-09-30 Method for manufacturing solid electrolytic capacitor Expired - Fee Related JP3568432B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27792699A JP3568432B2 (en) 1999-09-30 1999-09-30 Method for manufacturing solid electrolytic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27792699A JP3568432B2 (en) 1999-09-30 1999-09-30 Method for manufacturing solid electrolytic capacitor

Publications (2)

Publication Number Publication Date
JP2001102252A true JP2001102252A (en) 2001-04-13
JP3568432B2 JP3568432B2 (en) 2004-09-22

Family

ID=17590221

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3568432B2 (en)

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JP2003142335A (en) * 2001-11-02 2003-05-16 Japan Carlit Co Ltd:The Thin solid electrolytic capacitor and method of manufacturing the same
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