JP2001035985A - Semiconductor device sealed with resin - Google Patents
Semiconductor device sealed with resinInfo
- Publication number
- JP2001035985A JP2001035985A JP11205370A JP20537099A JP2001035985A JP 2001035985 A JP2001035985 A JP 2001035985A JP 11205370 A JP11205370 A JP 11205370A JP 20537099 A JP20537099 A JP 20537099A JP 2001035985 A JP2001035985 A JP 2001035985A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- heat sink
- mold
- sectional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229920005989 resin Polymers 0.000 title claims abstract description 55
- 239000011347 resin Substances 0.000 title claims abstract description 55
- 239000004065 semiconductor Substances 0.000 title claims description 48
- 238000005476 soldering Methods 0.000 claims abstract description 16
- 238000000465 moulding Methods 0.000 claims abstract description 13
- 229910000679 solder Inorganic materials 0.000 claims abstract description 5
- 238000007789 sealing Methods 0.000 claims description 19
- 230000005855 radiation Effects 0.000 abstract description 5
- 238000003825 pressing Methods 0.000 description 15
- 239000000725 suspension Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000011295 pitch Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 102100033040 Carbonic anhydrase 12 Human genes 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 101000867855 Homo sapiens Carbonic anhydrase 12 Proteins 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000013022 venting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明はICの樹脂封止時に
おけるバリ発生を防止した樹脂封止半導体装置に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device in which burrs are prevented from occurring during resin sealing of an IC.
【0002】[0002]
【従来の技術】従来より、パワーMOS等の発熱チップ
をリードフレームのアイランドではなく放熱板に直にダ
イボンディングし、その放熱板をパッケージ面から露
出、突出させて放熱性を向上させるパッケージ形態のも
のが多く提案されている。(特開昭54−18280
号、特開昭62−169450号他) 図18、図19
は従来よりの樹脂封止半導体装置に関するもので、図1
8は図19中の断面I−Iの断面図であり、図19は図
18の樹脂封止半導体装置を裏面から見た底面図であ
る。2. Description of the Related Art Conventionally, a heat generating chip such as a power MOS is die-bonded directly to a heat sink instead of an island of a lead frame, and the heat sink is exposed and protruded from a package surface to improve heat radiation. Many things have been proposed. (Japanese Patent Laid-Open No. 54-18280)
FIGS. 18 and 19)
FIG. 1 relates to a conventional resin-encapsulated semiconductor device.
8 is a sectional view taken along section II in FIG. 19, and FIG. 19 is a bottom view of the resin-sealed semiconductor device of FIG. 18 as viewed from the back.
【0003】[0003]
【発明が解決しようとする課題】当該パッケージ構造品
は、放熱板の表面が平らであるためモールド成型時の押
さえが不十分となり、樹脂ボディ14より露出する放熱
板5へ樹脂バリ15が発生するという問題があった。こ
の樹脂バリは外観上見栄えが悪く、またその半導体装置
の放熱板5をプリント基板にはんだ付けする際、この樹
脂バリにより基板との熱的接触面積が縮小されるという
問題がある。またこれを解決するためには樹脂バリを取
る工程が必要となるが、工程が増えコストアップとなる
という問題がある。In the package structure, since the surface of the heat radiating plate is flat, the pressing at the time of molding is insufficient, and resin burrs 15 are generated on the heat radiating plate 5 exposed from the resin body 14. There was a problem. This resin burr has a problem that the appearance is poor in appearance, and when the heat sink 5 of the semiconductor device is soldered to a printed circuit board, the resin burr reduces the thermal contact area with the substrate. In order to solve this, a step of removing resin burrs is required, but there is a problem that the number of steps increases and the cost increases.
【0004】このような放熱板への樹脂バリの発生を抑
えるために特開昭59−10242号では、放熱板の露
出する下面に浅い凹陥部を形成しておくことにより、樹
脂封止時の金型との接触部分を減らし面圧を高くして樹
脂バリの発生を防止している。In order to suppress the occurrence of resin burrs on such a heat sink, Japanese Patent Application Laid-Open No. Sho 59-10242 discloses that a shallow concave portion is formed on the exposed lower surface of the heat sink to prevent the resin from being sealed. The contact area with the mold is reduced to increase the surface pressure to prevent the generation of resin burrs.
【0005】また、特開平4−199664号では、放
熱板の表面に凸部を形成し、封止の際の金型に押さえら
れる部分を凸部のみにして十分な押さえを可能にし、樹
脂漏れを低減している。しかし、これらは放熱板の金型
と接触する面の平面度の精度が要求され、製造コストが
アップするという問題がある。In Japanese Patent Application Laid-Open No. 4-199664, a convex portion is formed on the surface of a heat radiating plate, and a portion to be pressed by a mold at the time of sealing is made only a convex portion so that sufficient pressing can be performed. Has been reduced. However, there is a problem that the precision of the flatness of the surface of the heat sink that contacts the mold is required, and the manufacturing cost is increased.
【0006】更に特開平4−199664号では、放熱
板表面の凸部にポリイミドテープ等を施すことにより封
止時の押さえのばらつきを吸収しているが、部品点数が
増えてコストアップする問題がある。Further, in Japanese Patent Application Laid-Open No. 4-199664, a polyimide tape or the like is applied to a convex portion on the surface of a heat sink to absorb variations in holding during sealing, but there is a problem that the number of parts increases and the cost increases. is there.
【0007】本発明はコストアップを小さく抑え、モー
ルド成形時に放熱板のはんだ付け面への樹脂バリ発生を
低減することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to suppress an increase in cost and reduce the occurrence of resin burrs on a soldering surface of a heat sink during molding.
【0008】[0008]
【課題を解決するための手段】本発明は前記課題を解決
するために、請求項1及び請求項2の技術的手段を採用
する。In order to solve the above-mentioned problems, the present invention employs the technical means of claims 1 and 2.
【0009】請求項1に記載の発明によれば、放熱板の
うち樹脂封止されずに露出する面に、モールド成形時に
金型でクランプするクランプ領域と、はんだ又は導電性
ペーストによって固定されるはんだ付け領域を形成する
とともに、放熱板に形成したクランプ領域に溝を形成し
たので、その溝に樹脂バリが溜まることではんだ付け領
域への樹脂漏れを防止することができる。According to the first aspect of the present invention, the surface of the heat sink that is exposed without being resin-sealed is fixed to the clamp area to be clamped by the mold at the time of molding and the solder or the conductive paste. Since a groove is formed in the clamp region formed in the heat sink while forming the soldering region, resin burrs accumulate in the groove, thereby preventing resin leakage into the soldering region.
【0010】請求項2に記載の発明によれば、放熱板に
形成したクランプ領域の縁部から溝までの間にエアベン
トを形成したので、更に放熱板の側面近傍の樹脂中の空
気をエアベントを通してキャビティより外部に排出する
ことができ、樹脂ボディ中のボイドを低減することがで
きる。According to the second aspect of the present invention, since the air vent is formed between the edge of the clamp area formed on the heat sink and the groove, air in the resin near the side surface of the heat sink is further passed through the air vent. It can be discharged from the cavity to the outside, and voids in the resin body can be reduced.
【0011】[0011]
【発明の実施の形態】図1ないし図4は本発明の第1実
施形態に関するものであり、図1は図2中の断面I−I
における断面図、図2は図1の樹脂封止半導体装置を裏
から見た底面図、図3及び図4は樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
3は図4中の断面III−IIIの断面図、図4は図3中の断
面II−IIの断面図を各々示す。1 to 4 relate to a first embodiment of the present invention. FIG. 1 is a sectional view taken along a line II in FIG.
, FIG. 2 is a bottom view of the resin-sealed semiconductor device of FIG. 1 as viewed from the back, and FIGS. 3 and 4 show the resin-sealed semiconductor device set in a mold before resin sealing. 3 is a sectional view taken along the line III-III in FIG. 4, and FIG. 4 is a sectional view taken along the line II-II in FIG.
【0012】図1、図2において、半導体素子1は放熱
板5にはんだ又は導電性ペースト4によって固定されて
いる。半導体素子1に設けられたボンディングパッドは
金線又はアルミニウム線のワイヤ2にて複数本のリード
3に接続されている。樹脂封止半導体装置はそれらをエ
ポキシ樹脂等の樹脂により樹脂ボディ14内に封止して
構成されている。このとき放熱板5の下面が樹脂ボディ
14から露出している。In FIGS. 1 and 2, the semiconductor element 1 is fixed to a heat sink 5 by solder or conductive paste 4. A bonding pad provided on the semiconductor element 1 is connected to a plurality of leads 3 by a gold wire or an aluminum wire 2. The resin-encapsulated semiconductor devices are configured by sealing them in a resin body 14 with a resin such as an epoxy resin. At this time, the lower surface of the heat sink 5 is exposed from the resin body 14.
【0013】図3、図4は樹脂モールド前の様子を示し
ており、放熱板5は図3、図4にも示すように銅、アル
ミ等の熱良導性金属でできた矩形の板状に構成されると
共に、向かい合う一対の辺部の中央部にそれぞれ外側に
突出する連結部16が一体に形成されている。この連結
部の上面の先端部にはかしめ用凸部16aが形成されて
いる。半導体素子1は、その下面がこの放熱板5の上面
の中央部に接着されている。FIGS. 3 and 4 show a state before the resin molding. The heat radiating plate 5 is a rectangular plate made of a heat conductive metal such as copper and aluminum as shown in FIGS. In addition, connecting portions 16 projecting outward are formed integrally at the central portions of the pair of opposing sides, respectively. A caulking convex portion 16a is formed at the tip of the upper surface of the connecting portion. The lower surface of the semiconductor element 1 is bonded to the center of the upper surface of the heat sink 5.
【0014】また、リードフレーム17は銅、銅合金及
び42アロイ等の金属板をプレス加工やエッチング加工
により形成され、左右の枠部17a間に複数本のリード
3を有している。これら各リード3は左右方向に等ピッ
チで並んで前後方向に延び、相互間が連結状態とされて
いる。このとき枠部17aの最も近くに位置するリード
3は他のものより長く延びて形成されている。The lead frame 17 is formed by pressing or etching a metal plate such as copper, copper alloy, and 42 alloy, and has a plurality of leads 3 between the left and right frame portions 17a. These leads 3 are arranged at equal pitches in the left-right direction, extend in the front-rear direction, and are connected to each other. At this time, the lead 3 located closest to the frame portion 17a is formed to extend longer than other leads.
【0015】更に、このリードフレーム17には枠部1
7aの内側に突出するように放熱板5と連結される吊り
リード18が一体に設けられている。この場合、吊りリ
ード18には孔18aが形成されており、放熱板5は連
結部16先端のかしめ用凸部16aが吊りリード18の
孔18aに挿入されてかしめられることによりリードフ
レーム17に連結されるようになっている。各リード3
は、最終的に枠部17aから切り離され所定の形成が行
われるようになっている。The lead frame 17 further includes a frame 1
A suspension lead 18 connected to the heat radiating plate 5 is integrally provided so as to protrude into the inside of 7a. In this case, a hole 18 a is formed in the suspension lead 18, and the heat sink 5 is connected to the lead frame 17 by inserting the caulking convex portion 16 a at the end of the connecting portion 16 into the hole 18 a of the suspension lead 18 and caulking. It is supposed to be. Each lead 3
Is finally cut off from the frame portion 17a and a predetermined formation is performed.
【0016】さて、図1、図2に示すように、放熱板5
の底面にはモールド成形時に金型で押圧される部分のク
ランプ領域6とプリント基板にはんだ付けされるはんだ
付け領域7が形成されている。クランプ領域6は放熱板
5の縁部より一定長さだけ、連続的に全周に形成されて
いる。また、クランプ領域6ははんだ付け領域7より凹
状に形成されている。更に、クランプ領域6には溝8が
放熱板5の縁部より一定距離だけ離れて全周に形成され
ている。この溝8の数は1箇所とは限らずクランプ領域
6の範囲に形成可能であれば何箇所でもよい。また、断
面形状としては図1に示すような矩形でもよいし、V形
のようなその他の形状でもよい。この溝8は、プレス加
工あるいはエッチング加工により形成する。Now, as shown in FIG. 1 and FIG.
On the bottom surface, there are formed a clamp area 6 which is pressed by a mold during molding and a solder area 7 which is soldered to a printed circuit board. The clamp area 6 is continuously formed over the entire circumference by a certain length from the edge of the heat sink 5. Further, the clamp area 6 is formed more concavely than the soldering area 7. Further, a groove 8 is formed on the entire periphery of the clamp region 6 at a fixed distance from the edge of the heat sink 5. The number of the grooves 8 is not limited to one, but may be any number as long as it can be formed in the range of the clamp area 6. The sectional shape may be a rectangle as shown in FIG. 1 or another shape such as a V-shape. The groove 8 is formed by pressing or etching.
【0017】次に、本半導体装置の製造工程フローにつ
いて説明する。放熱板5は金属板(例えばリール状の素
材)よりプレス加工等の機械加工により形成する。クラ
ンプ領域6と溝8はこの時同時に形成してもよいし、個
片にされた後に形成してもよい。また、溝の形成はエッ
チング加工でもよい。Next, a manufacturing process flow of the present semiconductor device will be described. The heat radiating plate 5 is formed from a metal plate (for example, a reel-shaped material) by mechanical processing such as pressing. At this time, the clamp region 6 and the groove 8 may be formed at the same time, or may be formed after being divided into individual pieces. The formation of the groove may be an etching process.
【0018】次に、図3、図4に示すようにクランプ領
域6と溝8が形成された放熱板5とリードフレーム17
との連結は前記のように吊りリード18に対して連結部
16をかしめ加工することにより締結し、放熱板5付き
のリードフレーム17を得る。Next, as shown in FIGS. 3 and 4, the heat radiating plate 5 having the clamp region 6 and the groove 8 and the lead frame 17 are formed.
As described above, the connection is made by caulking the connecting portion 16 to the suspension lead 18 to obtain the lead frame 17 with the heat sink 5.
【0019】次に、放熱板5のクランプ領域6と溝8が
形成されている面と相対する面に半導体素子1をはんだ
又は導電性ペースト4で接着する。銀ペーストで接続す
る場合には接着性を向上させるために放熱板5の半導体
素子1の搭載領域にあらかじめ銀めっきを施しておくと
有効である。Next, the semiconductor element 1 is bonded to the surface of the heat sink 5 opposite to the surface where the groove 8 is formed by soldering or conductive paste 4. When connecting with silver paste, it is effective to apply silver plating in advance to the mounting region of the heat sink 5 on which the semiconductor element 1 is mounted in order to improve the adhesiveness.
【0020】次に、半導体素子1に設けられたボンディ
ングパッドと複数本のリード3をワイヤ2にて接続す
る。そして、前記のように接続された半導体素子1とリ
ード3、放熱板5の一部をモールド樹脂により封止す
る。Next, a bonding pad provided on the semiconductor element 1 and a plurality of leads 3 are connected by wires 2. Then, the semiconductor element 1, the leads 3, and a part of the heat sink 5 connected as described above are sealed with a mold resin.
【0021】ここで、図4に示すように樹脂モールドの
工程で使用するモールド金型は、モールド上金型9と、
その上金型9に対して相対的に接離するモールド下金型
10から構成され、それら上金型9と下金型10との間
に樹脂ボディ14の外形に相当するキャビティ19が形
成されている。上金型9のキャビティ19内には放熱板
5の連結部16に押し当てて放熱板5のクランプ領域6
が形成されている面をモールド下金型10のキャビティ
底面に押し付けるためのピン11が設けられている。こ
こではこの押圧するピン11の断面形状を長方形状とし
ているが、矩形状、円形状等の他の形状でもよい。モー
ルド下金型10のキャビティ底面にははんだ付け領域7
が下金型のキャビティ19に当たらないように逃がし1
3が形成されている。モールド上金型9、下金型10に
はモールド成形時の空気抜き用のエアベント20が設け
られている。また、モールド下金型10のクランプ領域
6と接する部分には空気抜き用の貫通孔21が形成され
ており、逃がし13の部分に型締め時の空気抜き用の貫
通孔22が形成されている。Here, as shown in FIG. 4, the molding dies used in the resin molding process are:
The upper mold 9 is relatively close to and separated from the lower mold 10, and a cavity 19 corresponding to the outer shape of the resin body 14 is formed between the upper mold 9 and the lower mold 10. ing. In the cavity 19 of the upper mold 9, the clamp region 6 of the heat sink 5 is pressed against the connecting portion 16 of the heat sink 5.
A pin 11 is provided for pressing the surface on which is formed on the bottom surface of the cavity of the lower mold 10. Here, the cross-sectional shape of the pin 11 to be pressed is rectangular, but other shapes such as rectangular, circular, etc. may be used. The soldering area 7 is provided on the bottom surface of the cavity of the lower mold 10.
Escape so that it does not hit the cavity 19 of the lower mold.
3 are formed. The upper mold 9 and the lower mold 10 are provided with air vents 20 for venting air during molding. Further, a through hole 21 for air release is formed in a portion of the lower mold 10 in contact with the clamp region 6, and a through hole 22 for air release at the time of mold clamping is formed in the relief 13.
【0022】樹脂モールド工程では、リードフレーム1
7を下金型10上の所定の位置にセットし、型締めを行
う。これで、図4に示すように放熱板5及び半導体素子
1、リード3等がキャビティ19内に収容された状態に
なる。このとき、上金型9に設けられたピン11が連結
部16の上面に当たり、型締め力により放熱板5を下方
に押圧するようになる。これにより放熱板5のクランプ
領域6が下金型10のキャビティ面に対して押し付けら
れる。この状態で、キャビティ19内にエポキシ樹脂が
注入されて硬化する。これにより、半導体素子1や放熱
板5の上側部分、リード3、ワイヤ2等を樹脂モールド
した樹脂ボディ14が形成される。In the resin molding process, the lead frame 1
7 is set at a predetermined position on the lower mold 10, and the mold is clamped. Thus, as shown in FIG. 4, the radiator plate 5, the semiconductor element 1, the leads 3, and the like are housed in the cavity 19. At this time, the pin 11 provided on the upper die 9 hits the upper surface of the connecting portion 16 and presses the heat sink 5 downward by the clamping force. Thereby, the clamp area 6 of the heat sink 5 is pressed against the cavity surface of the lower mold 10. In this state, the epoxy resin is injected into the cavity 19 and hardened. As a result, a resin body 14 in which the semiconductor element 1, the upper portion of the heat sink 5, the leads 3, the wires 2, and the like are resin-molded is formed.
【0023】この後、この樹脂モールド品はキャビティ
19から取り出され、リードフレーム17の枠部17a
の分断及びリード3の成形等が行われて樹脂封止半導体
装置が完成する。図1に示すようにこの樹脂封止半導体
装置は、放熱板5のはんだ付け領域7が樹脂ボディ14
から露出しており、プリント基板に対してそのはんだ付
け面7をはんだ付けすることにより、放熱板5との熱的
接触状態に実装されるようになっている。この時リード
3の先端もプリント基板の電極にはんだ付けされる。Thereafter, the resin molded product is taken out of the cavity 19, and the frame portion 17a of the lead frame 17 is removed.
And the molding of the lead 3 is performed, thereby completing the resin-encapsulated semiconductor device. As shown in FIG. 1, in this resin-sealed semiconductor device, the soldering region 7 of the heat sink 5 has a resin body 14
And is mounted in a state of thermal contact with the heat radiating plate 5 by soldering the soldering surface 7 to the printed circuit board. At this time, the tips of the leads 3 are also soldered to the electrodes of the printed circuit board.
【0024】本実施形態によれば、クランプ領域6に溝
8を設けることにより、漏れた樹脂バリは溝8に溜ま
り、溝8より内側への(はんだ付け領域7内への)樹脂
バリの発生をなくすることができる。これにより放熱板
5のはんだ付け領域7には樹脂バリの無い清浄な面を確
保することができ、樹脂バリを取る工程が不要となり、
コストダウンをはかることができる。According to the present embodiment, by providing the groove 8 in the clamp area 6, the leaked resin burrs accumulate in the groove 8 and generate resin burrs inside the groove 8 (into the soldering area 7). Can be eliminated. As a result, a clean surface free of resin burrs can be secured in the soldering area 7 of the radiator plate 5, eliminating the step of removing resin burrs.
Cost can be reduced.
【0025】また、下金型10のキャビティ19内面と
当たるクランプ領域6の加工精度あるいは放熱板5とリ
ードフレーム17との連結に高い寸法精度を必要としな
い。In addition, there is no need for high processing accuracy of the clamp area 6 which contacts the inner surface of the cavity 19 of the lower mold 10 or high dimensional accuracy for connecting the heat sink 5 to the lead frame 17.
【0026】また、本実施形態では、放熱板5にリード
フレーム17に連結される連結部16を設け、この連結
部16に押圧用のピン11が当たってモールド金型の型
締め力を受けるように構成したので、放熱板5のうちワ
イヤ2による接続領域から外れた位置にピン11が位置
されることになり、ワイヤボンディング工程での制約が
無くなるというメリットも得ることができる。In the present embodiment, the connecting portion 16 connected to the lead frame 17 is provided on the heat radiating plate 5 so that the pressing pin 11 hits the connecting portion 16 to receive the clamping force of the mold. Therefore, the pin 11 is located at a position out of the connection region of the heat radiation plate 5 by the wire 2, and there is an advantage that the restriction in the wire bonding step is eliminated.
【0027】次に、第2の実施例について図5〜図9を
参照しながら述べる。Next, a second embodiment will be described with reference to FIGS.
【0028】図5〜図9は本発明の第2実施形態に関す
るものであり、図5は図6中の断面I−Iにおける断面
図、図6は図5の樹脂封止半導体装置を裏から見た底面
図、図7、図8及び図9は樹脂封止半導体装置の樹脂封
止前の金型にセットされた状態を示すもので、図7は図
8中の断面III−IIIの断面図、図8は図7中の断面II−
IIの断面図、図9は図8のクランプ領域6(図5参照)
の拡大断面図を各々示す。FIGS. 5 to 9 relate to a second embodiment of the present invention. FIG. 5 is a cross-sectional view taken along a line II in FIG. 6, and FIG. 7, 8 and 9 show the state of the resin-encapsulated semiconductor device set in a mold before resin encapsulation, and FIG. 7 is a cross-section taken along the line III-III in FIG. 8 and FIG. 8 are cross-sectional views II-
9 is a sectional view, and FIG. 9 is a clamp area 6 of FIG. 8 (see FIG. 5).
The enlarged sectional views of FIG.
【0029】この第2実施形態が第1の実施形態と異な
る点は、放熱板5のクランプ領域6において放熱板5の
縁部から溝8までのクランプ領域の部分6aにエアベン
ト23を設け、モールド下金型10のクランプ領域の部
分6aに対応する領域にエアベント24を設けた点にあ
る。また、モールド下金型10にはエアベント24を通
る空気を逃がすための貫通孔21が形成されている。The second embodiment is different from the first embodiment in that an air vent 23 is provided in a clamp area 6a from the edge of the heat sink 5 to the groove 8 in the clamp area 6 of the heat sink 5. The point is that an air vent 24 is provided in a region corresponding to the portion 6a of the clamp region of the lower mold 10. Further, a through hole 21 is formed in the lower mold 10 to allow air passing through the air vent 24 to escape.
【0030】これにより、放熱板5のクランプ領域6に
発生する樹脂バリは優先的にエアベント23、24を通
って溝8に溜まる。図8においてエアベント23、24
の数は10箇所でほぼ等ピッチに配置してあるが、その
数や配置のピッチはこの限りではない。これによれば第
1の実施形態と同様の作用、効果を得ることができるこ
とに加えて、放熱板5の側面近傍の樹脂中の空気をエア
ベント23、24を通してキャビティ19より外部に排
出することができ、樹脂ボディ14中のボイドを低減す
ることができる。また、図8ではエアベント23、24
の両方を形成した場合を説明したがエアベント23のみ
の形成、又はエアベント24のみの形成でも同様の作
用、効果を得ることができる。As a result, resin burrs generated in the clamp area 6 of the heat sink 5 preferentially accumulate in the groove 8 through the air vents 23 and 24. In FIG. 8, the air vents 23, 24
Are arranged at substantially equal pitches at ten locations, but the number and arrangement pitch are not limited to this. According to this, the same operation and effect as in the first embodiment can be obtained, and in addition, the air in the resin near the side surface of the heat radiating plate 5 can be discharged from the cavity 19 through the air vents 23 and 24 to the outside. As a result, voids in the resin body 14 can be reduced. In FIG. 8, the air vents 23 and 24 are shown.
Although the case where both are formed has been described, the same operation and effect can be obtained by forming only the air vent 23 or forming only the air vent 24.
【0031】図10、図11は第3実施形態に関し、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示すもので、図10は図11中の断面III−IIIの断
面図、図11は図10中の断面II−IIの断面図を各々示
す。FIGS. 10 and 11 relate to the third embodiment and show a state in which the resin-sealed semiconductor device is set in a mold before resin sealing. FIG. 10 is a sectional view taken along the line III-III in FIG. FIG. 11 is a sectional view taken along the line II-II in FIG.
【0032】この第3実施形態では、放熱板5より外部
に突出する連結部16の根元部にかしめ用凸部16aが
形成され、連結部16の先端部がピン11により押され
るようになっている。また、吊りリード18は押圧用の
ピン11を避けるためにコの字状に形成されている。放
熱板5にリードフレーム17に連結される連結部16を
設け、この連結部16に押圧用のピン11が当たってモ
ールド金型の型締め力を受けるように構成したので、リ
ード3を放熱板5の近傍まで接近させることができ、ワ
イヤボンディング可能範囲を拡大することができる。加
えてリードフレーム17からの吊りリード18の取り出
しを2箇所にしていることでリードフレーム17に対す
る放熱板5の強度が向上し、組立工程でのねじれや変形
を低減することができる。In the third embodiment, a caulking convex portion 16 a is formed at the base of the connecting portion 16 protruding outside from the heat sink 5, and the tip of the connecting portion 16 is pushed by the pin 11. I have. The suspension lead 18 is formed in a U-shape to avoid the pressing pin 11. Since the connecting portion 16 connected to the lead frame 17 is provided on the heat radiating plate 5 and the pressing pin 11 is brought into contact with the connecting portion 16 to receive the clamping force of the mold, the lead 3 is connected to the heat radiating plate. 5 can be approached, and the range in which wire bonding can be performed can be expanded. In addition, since the suspension leads 18 are taken out of the lead frame 17 at two locations, the strength of the heat radiating plate 5 with respect to the lead frame 17 is improved, and torsion and deformation in the assembly process can be reduced.
【0033】図12、図13は第4実施形態に関し、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示すもので、図12は図13中の断面III−IIIの断
面図、図13は図12中の断面II−IIの断面図を各々示
す。FIGS. 12 and 13 relate to the fourth embodiment and show a state in which the resin-sealed semiconductor device is set in a mold before resin sealing. FIG. 12 is a sectional view taken along the line III-III in FIG. FIG. 13 is a sectional view taken along the line II-II in FIG.
【0034】この第4実施形態では、放熱板5は矩形状
をなし、外側に突出する連結部を有していない。押圧用
のピン11は放熱板5の左右の辺部の中央部を押圧する
ようになっており、吊りリード18は押圧用のピン11
で押圧される部分の前後にそれぞれ連結されるようにな
っている。このような構成でも第1実施形態とほぼ同様
の効果が得られる。In the fourth embodiment, the heat radiating plate 5 has a rectangular shape and does not have a connecting portion projecting outward. The pressing pin 11 presses the center of the left and right sides of the heat sink 5, and the suspension lead 18 is connected to the pressing pin 11.
The parts are connected before and after the part pressed by. With such a configuration, substantially the same effects as in the first embodiment can be obtained.
【0035】図14、図15は第5実施形態に関し、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示すもので、図14は図15中の断面III−IIIの断
面図、図15は図14中の断面II−IIの断面図を各々示
す。FIGS. 14 and 15 relate to the fifth embodiment and show a state in which the resin-sealed semiconductor device is set in a mold before resin sealing. FIG. 14 is a sectional view taken along the line III-III in FIG. FIG. 15 is a sectional view taken along the line II-II in FIG.
【0036】この第5実施形態では、吊りリード18は
放熱板5の左右の辺部の中央部で連結されるようになっ
ており、押圧用のピン11は吊りリード18の連結部の
前後をそれぞれ押圧するようになっている。これによれ
ば第1の実施形態とほぼ同様の作用、効果に加えて、4
本の押圧用のピン11によって安定した押圧力を受ける
ことができる。In the fifth embodiment, the suspension leads 18 are connected at the center of the left and right sides of the heat radiating plate 5, and the pressing pins 11 are disposed in front of and behind the connection portions of the suspension leads 18. Each is pressed. According to this, in addition to substantially the same operation and effect as the first embodiment, 4
A stable pressing force can be received by the pressing pin 11 of the book.
【0037】図16、図17は第6実施形態に関し、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示すもので、図16は図17中の断面III−IIIの断
面図、図17は図16中の断面II−IIの断面図を各々示
す。FIGS. 16 and 17 relate to the sixth embodiment and show a state in which the resin-sealed semiconductor device is set in a mold before resin sealing. FIG. 16 is a sectional view taken along the line III-III in FIG. FIG. 17 is a sectional view taken along the line II-II in FIG.
【0038】この第6実施形態では、放熱板5の前後の
辺部に段差5aを形成し、押圧用のピン11がその段差
部5aの上面を押圧するようになっている。このような
構成においても第1実施形態と同様の作用、効果を得る
ことができる。In the sixth embodiment, steps 5a are formed on the front and rear sides of the heat sink 5, and the pressing pins 11 press the upper surface of the steps 5a. With such a configuration, the same operation and effect as those of the first embodiment can be obtained.
【図1】本発明の第1実施形態に関するものであり、図
2中の断面I−Iにおける断面図である。FIG. 1 relates to a first embodiment of the present invention, and is a cross-sectional view taken along a line II in FIG. 2;
【図2】本発明の第1実施形態に関するものであり、図
1の樹脂封止半導体装置を裏から見た底面図である。FIG. 2 relates to the first embodiment of the present invention, and is a bottom view of the resin-sealed semiconductor device of FIG. 1 as viewed from the back.
【図3】本発明の第1実施形態に関するものであり、図
4中の断面III−IIIの断面図である。FIG. 3 relates to the first embodiment of the present invention, and is a cross-sectional view taken along section III-III in FIG.
【図4】本発明の第1実施形態に関するものであり、図
3中の断面II−IIの断面図である。FIG. 4 relates to the first embodiment of the present invention, and is a cross-sectional view taken along the line II-II in FIG.
【図5】本発明の第2実施形態に関するものであり、図
6中の断面I−Iにおける断面図である。FIG. 5 relates to a second embodiment of the present invention, and is a cross-sectional view taken along a line II in FIG. 6;
【図6】本発明の第2実施形態に関するものであり、図
5の樹脂封止半導体装置を裏から見た底面図である。6 relates to a second embodiment of the present invention, and is a bottom view of the resin-sealed semiconductor device of FIG. 5 as viewed from the back.
【図7】本発明の第2実施形態に関するものであり、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示し、図8中の断面III−IIIの断面図である。FIG. 7 relates to a second embodiment of the present invention, and shows a state in which the resin-encapsulated semiconductor device is set in a mold before resin encapsulation, and is a cross-sectional view taken along section III-III in FIG. .
【図8】本発明の第2実施形態に関するものであり、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示し、図7中の断面II−IIの断面図である。8 relates to the second embodiment of the present invention, and shows a state in which the resin-encapsulated semiconductor device is set in a mold before resin encapsulation, and is a cross-sectional view taken along section II-II in FIG. 7; .
【図9】本発明の第2実施形態に関するものであり、樹
脂封止半導体装置の樹脂封止前の金型にセットされた状
態を示し、図8のクランプ領域6(図5参照)の拡大断
面図である。9 relates to a second embodiment of the present invention and shows a state where the semiconductor device is set in a mold before resin sealing of the resin-sealed semiconductor device, and is an enlarged view of a clamp region 6 (see FIG. 5) in FIG. It is sectional drawing.
【図10】第3実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
11中の断面III−IIIの断面図である。10 is a cross-sectional view taken along section III-III in FIG. 11, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the third embodiment.
【図11】第3実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
10中の断面II−IIの断面図である。11 is a cross-sectional view taken along the line II-II in FIG. 10, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the third embodiment.
【図12】第4実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
13中の断面III−IIIの断面図である。FIG. 12 is a cross-sectional view taken along the line III-III in FIG. 13, showing a state in which the semiconductor device of the resin-sealed semiconductor device is set in a mold before resin-sealing according to the fourth embodiment.
【図13】第4実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
12中の断面II−IIの断面図である。FIG. 13 is a cross-sectional view taken along section II-II in FIG. 12, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the fourth embodiment.
【図14】第5実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
15中の断面III−IIIの断面図である。14 is a cross-sectional view taken along section III-III in FIG. 15, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the fifth embodiment.
【図15】第5実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
14中の断面II−IIの断面図である。15 is a cross-sectional view taken along the line II-II in FIG. 14, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the fifth embodiment.
【図16】第6実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
17中の断面III−IIIの断面図である。16 is a cross-sectional view taken along section III-III in FIG. 17, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the sixth embodiment.
【図17】第6実施形態に関し、樹脂封止半導体装置の
樹脂封止前の金型にセットされた状態を示すもので、図
16中の断面II−IIの断面図である。FIG. 17 is a cross-sectional view taken along section II-II in FIG. 16, showing a state in which the resin-sealed semiconductor device is set in a mold before resin sealing according to the sixth embodiment;
【図18】従来よりの樹脂封止半導体装置に関するもの
で、図19中の断面I−Iの断面図である。18 relates to a conventional resin-encapsulated semiconductor device and is a cross-sectional view taken along the line II in FIG.
【図19】従来よりの樹脂封止半導体装置に関するもの
で、図18の樹脂封止半導体装置を裏面から見た底面図
である。19 relates to a conventional resin-encapsulated semiconductor device, and is a bottom view of the resin-encapsulated semiconductor device of FIG. 18 as viewed from the back.
1 半導体素子 5 放熱板 6 クランプ領域 7 はんだ付け領域 8 溝 9、10 金型 14 樹脂ボディ 23 エアベント DESCRIPTION OF SYMBOLS 1 Semiconductor element 5 Heat sink 6 Clamp area 7 Soldering area 8 Groove 9, 10 Die 14 Resin body 23 Air vent
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 23/28 H01L 23/28 B // B29L 31:34 Fターム(参考) 4F202 AA39 AD19 AH33 AM33 CA12 CB01 CB12 CK41 CK83 CP01 CQ01 CQ05 4F206 AA39 AD19 AH37 AM33 JA02 JB17 JF05 JQ81 4M109 AA01 BA01 CA21 DA07 DB03 FA04 GA05 5F061 AA01 BA01 CA21 DA06 DD12 EA02 EA03 5F067 AA09 AB02 BD05 CA03 DA05 DE03 DE14 EA04 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01L 23/28 H01L 23/28 B // B29L 31:34 F term (Reference) 4F202 AA39 AD19 AH33 AM33 CA12 CB01 CB12 CK41 CK83 CP01 CQ01 CQ05 4F206 AA39 AD19 AH37 AM33 JA02 JB17 JF05 JQ81 4M109 AA01 BA01 CA21 DA07 DB03 FA04 GA05 5F061 AA01 BA01 CA21 DA06 DD12 EA02 EA03 5F067 AA09 AB02 BD05 CA03 EA04 DE03
Claims (2)
り樹脂ボディ内に封止して構成される樹脂封止半導体装
置において、前記放熱板のうち樹脂封止されずに露出す
る面に、モールド成形時に金型でクランプするクランプ
領域と、はんだ又は導電性ペーストによって固定される
はんだ付け領域を形成するとともに、前記放熱板に形成
した前記クランプ領域に溝を形成したことを特徴とする
樹脂封止半導体装置。In a resin-sealed semiconductor device in which a semiconductor element is fixed to a radiator plate and sealed in a resin body with a resin, a surface of the radiator plate that is exposed without being resin-sealed is provided with a mold. Resin sealing characterized by forming a clamp area to be clamped by a mold at the time of molding and a soldering area fixed by solder or conductive paste, and forming a groove in the clamp area formed on the heat sink. Semiconductor device.
の縁部から前記溝までの間にエアベントを形成したこと
を特徴とする請求項1に記載の樹脂封止半導体装置。2. The resin-encapsulated semiconductor device according to claim 1, wherein an air vent is formed between an edge of the clamp region formed on the heat sink and the groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11205370A JP2001035985A (en) | 1999-07-19 | 1999-07-19 | Semiconductor device sealed with resin |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11205370A JP2001035985A (en) | 1999-07-19 | 1999-07-19 | Semiconductor device sealed with resin |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2001035985A true JP2001035985A (en) | 2001-02-09 |
Family
ID=16505730
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11205370A Pending JP2001035985A (en) | 1999-07-19 | 1999-07-19 | Semiconductor device sealed with resin |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2001035985A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7843700B2 (en) | 2004-04-14 | 2010-11-30 | Denso Corporation | Semiconductor device |
CN101609819B (en) * | 2008-06-20 | 2011-12-07 | 力成科技股份有限公司 | lead frame chip packaging structure and manufacturing method thereof |
JP2013016636A (en) * | 2011-07-04 | 2013-01-24 | Denso Corp | Manufacturing method of mold package |
JP2013089908A (en) * | 2011-10-21 | 2013-05-13 | Toyota Motor Corp | Heat sink fitted semiconductor device manufacturing method |
JP2014192442A (en) * | 2013-03-28 | 2014-10-06 | Nec Corp | Hermetic sealing body and hermetic sealing method |
KR20150082937A (en) * | 2014-01-08 | 2015-07-16 | 삼성전기주식회사 | Power module package and method of fabricating the same |
JP2022045413A (en) * | 2020-09-09 | 2022-03-22 | 三菱電機株式会社 | Semiconductor device |
WO2023058437A1 (en) * | 2021-10-08 | 2023-04-13 | 三菱電機株式会社 | Semiconductor device, power conversion device, and manufacturing method for semiconductor device |
-
1999
- 1999-07-19 JP JP11205370A patent/JP2001035985A/en active Pending
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7843700B2 (en) | 2004-04-14 | 2010-11-30 | Denso Corporation | Semiconductor device |
US8179688B2 (en) | 2004-04-14 | 2012-05-15 | Denso Corporation | Semiconductor device |
CN101609819B (en) * | 2008-06-20 | 2011-12-07 | 力成科技股份有限公司 | lead frame chip packaging structure and manufacturing method thereof |
JP2013016636A (en) * | 2011-07-04 | 2013-01-24 | Denso Corp | Manufacturing method of mold package |
JP2013089908A (en) * | 2011-10-21 | 2013-05-13 | Toyota Motor Corp | Heat sink fitted semiconductor device manufacturing method |
JP2014192442A (en) * | 2013-03-28 | 2014-10-06 | Nec Corp | Hermetic sealing body and hermetic sealing method |
KR20150082937A (en) * | 2014-01-08 | 2015-07-16 | 삼성전기주식회사 | Power module package and method of fabricating the same |
KR102041644B1 (en) | 2014-01-08 | 2019-11-07 | 삼성전기주식회사 | Power module package and method of fabricating the same |
JP2022045413A (en) * | 2020-09-09 | 2022-03-22 | 三菱電機株式会社 | Semiconductor device |
JP7407679B2 (en) | 2020-09-09 | 2024-01-04 | 三菱電機株式会社 | semiconductor equipment |
WO2023058437A1 (en) * | 2021-10-08 | 2023-04-13 | 三菱電機株式会社 | Semiconductor device, power conversion device, and manufacturing method for semiconductor device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3885321B2 (en) | Manufacturing method of resin-encapsulated semiconductor parts | |
JP2844316B2 (en) | Semiconductor device and its mounting structure | |
US5652461A (en) | Semiconductor device with a convex heat sink | |
US8659146B2 (en) | Lead frame based, over-molded semiconductor package with integrated through hole technology (THT) heat spreader pin(s) and associated method of manufacturing | |
JP2000307045A (en) | Lead frame and manufacture of resin sealed semiconductor device using it | |
JP3866127B2 (en) | Semiconductor device | |
US6238953B1 (en) | Lead frame, resin-encapsulated semiconductor device and fabrication process for the device | |
KR20010110154A (en) | Lead frame, semiconductor device and manufacturing the same, circuit substrate and electronic device | |
JP3606078B2 (en) | Semiconductor device and manufacturing method thereof | |
KR101070890B1 (en) | Method for manufacturing the semiconductor package of multi-row lead type | |
JP2001035985A (en) | Semiconductor device sealed with resin | |
JP2593702B2 (en) | Method for manufacturing semiconductor device | |
JPH05267555A (en) | Semiconductor device, manufacturing method thereof, lead frame used therefor, and manufacturing method thereof | |
JP2001110830A (en) | Resin sealed semiconductor device and its manufacturing method | |
JP2000236060A (en) | Semiconductor device | |
JP2000349222A (en) | Lead frame and semiconductor package | |
JP3025093B2 (en) | Semiconductor device and its mounting structure | |
JPH088375A (en) | Semiconductor device and lead frame and mold used for manufacturing the same | |
JP2001135767A (en) | Semiconductor device and method of manufacturing the same | |
US6312976B1 (en) | Method for manufacturing leadless semiconductor chip package | |
JPH0846100A (en) | Semiconductor integrated circuit device | |
JP2886250B2 (en) | Semiconductor device | |
KR20000035215A (en) | Semiconductor device and method of producing same | |
KR19980084769A (en) | High heat dissipation package and its manufacturing method | |
JPH09312372A (en) | Method for manufacturing semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050726 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20060425 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070703 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20071113 |