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JP2001035811A - Method for selectively forming copper film - Google Patents

Method for selectively forming copper film

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Publication number
JP2001035811A
JP2001035811A JP11203052A JP20305299A JP2001035811A JP 2001035811 A JP2001035811 A JP 2001035811A JP 11203052 A JP11203052 A JP 11203052A JP 20305299 A JP20305299 A JP 20305299A JP 2001035811 A JP2001035811 A JP 2001035811A
Authority
JP
Japan
Prior art keywords
copper
film
substrate
selectively
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11203052A
Other languages
Japanese (ja)
Other versions
JP4098442B2 (en
Inventor
Hiroyuki Suzuki
啓之 鈴木
Kayoko Oomiya
可容子 大宮
Hirosaku Yamada
啓作 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP20305299A priority Critical patent/JP4098442B2/en
Priority to US09/612,237 priority patent/US6506675B1/en
Priority to TW089113800A priority patent/TW464980B/en
Priority to KR10-2000-0039061A priority patent/KR100419535B1/en
Publication of JP2001035811A publication Critical patent/JP2001035811A/en
Application granted granted Critical
Publication of JP4098442B2 publication Critical patent/JP4098442B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To deposite copper selectively on the copper-film-formation requiring regions of an underlying film and reduce the cost of the raw material of copper, by forming on the surface of the underlying film provided on a substrate the thin-film made of a silane coupling agent or an interfacial active agent, and by projecting UV rays on the copper-film formation prearranging regions of this thin film to perform on these regions the CVDs of copper. SOLUTION: In this method, the thin film made of a silane coupling agent or an interfacial active agent is formed on the surface of an underlying film 22 provided on a substrate 21. The underlying film 22 is formed out of the arbitrary material of such an insulator as single-crystal silicon, such a metal as Cu, or the like. As the silane coupling agent, there are hexamethyldisilazane, vinyltrichlorosilane, and the like. As the interfacial active agent, there can be used long-chain alkylsulfonic acid and long-chain alkylcarboxylic acid. Then, by projecting selectively UV rays on the copper-film formation prearranging regions of this thin film, these regions are made hydrophilic. Subsequently, hexafluoro-acetylacetonate copper having added trimethylvinylsilane thereto is used as the raw material of copper to perform on these regions the CVDs of copper.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、銅被膜の選択形成
方法に関する。
The present invention relates to a method for selectively forming a copper film.

【0002】[0002]

【従来の技術】アルミニウム(Al)は、LSIや液晶
表示装置の配線材料として主に用いられている。しかし
ながら、Alは銅(Cu)に比べて抵抗が高いために、
Al配線は信号の遅延、発熱による消費電力の増大とい
う問題を有する。このため、Cuは、次世代の配線材料
として注目されている。
2. Description of the Related Art Aluminum (Al) is mainly used as a wiring material for LSIs and liquid crystal display devices. However, since Al has a higher resistance than copper (Cu),
The Al wiring has a problem that signal delay and heat consumption increase due to heat generation. For this reason, Cu is receiving attention as a next-generation wiring material.

【0003】Al配線は、LSIの場合にはCl2,B
Cl3などの塩素系ガスによるドライエッチング技術、
液晶表示装置の場合にはウェットエッチング技術により
形成されることが多い。しかしながら、Cuのドライエ
ッチングは高温雰囲気のみでしか実現されておらず、現
段階では実用的ではない。一方、Cuをウェットエッチ
ングすることは可能であるものの、微細加工を行なうこ
とが困難である。
[0003] In the case of LSI, Al wiring is made of Cl 2 , B
Dry etching with chlorine-based gas such as Cl 3,
In the case of a liquid crystal display device, it is often formed by a wet etching technique. However, dry etching of Cu is realized only in a high-temperature atmosphere, and is not practical at this stage. On the other hand, although Cu can be wet etched, it is difficult to perform fine processing.

【0004】上述したようにCuは、エッチングによる
配線形成が困難であるため、LSIの製造においてはC
MP(Chemical Mechanical Polishing)によりCu配線
を形成することが一部実用化されている。
[0004] As described above, Cu is difficult to form wiring by etching.
Forming a Cu wiring by MP (Chemical Mechanical Polishing) has been partially put to practical use.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、CMP
を液晶表示装置の配線形成に適用した場合、液晶表示装
置の基板が大面積であるため、実用上、CMPでCu配
線を形成することが困難である。また、液晶表示装置に
おいてCuのエッチングまたはCMPが可能であって
も、Cu配線の面積がガラス基板の面積に比べて小さい
ため、ガラス基板上に成膜されたCu膜の大部分が除去
される。その結果、原料的に高価なCuの使用効率が非
常に低くなり、液晶表示装置の価格が高騰する問題があ
った。
SUMMARY OF THE INVENTION However, CMP
Is applied to the formation of wiring of a liquid crystal display device, it is practically difficult to form Cu wiring by CMP because the substrate of the liquid crystal display device has a large area. Even if Cu etching or CMP is possible in the liquid crystal display device, most of the Cu film formed on the glass substrate is removed because the area of the Cu wiring is smaller than the area of the glass substrate. . As a result, there is a problem that the use efficiency of Cu, which is expensive as a raw material, becomes extremely low, and the price of the liquid crystal display device rises.

【0006】本発明は、金属、絶縁材料等の任意の材料
からなる下地の必要とする領域に銅を選択的に堆積して
原料コストの低減等を達成することが可能な銅被膜の選
択形成方法を提供しようとするものである。
According to the present invention, there is provided a method for selectively forming a copper film capable of achieving a reduction in raw material cost by selectively depositing copper in a required area of a base made of an arbitrary material such as a metal and an insulating material. It seeks to provide a way.

【0007】[0007]

【課題を解決するための手段】本発明に係わる銅被膜の
選択形成方法は、基板上の下地膜表面にシランカップリ
ング剤または界面活性剤の薄膜を形成する工程と、前記
薄膜の銅被膜形成予定領域をUV光の選択的な照射等に
より親水性にする工程と、銅のCVDを行なって、前記
下地膜の銅被膜形成予定領域に銅被膜を選択的に成膜す
る工程とを具備したことを特徴とするものである。
According to the present invention, there is provided a method for selectively forming a copper film, comprising the steps of forming a thin film of a silane coupling agent or a surfactant on the surface of a base film on a substrate; A step of making the planned region hydrophilic by selectively irradiating UV light or the like; and a step of performing copper CVD to selectively form a copper film in the copper film formation planned region of the base film. It is characterized by the following.

【0008】本発明に係わる別の銅被膜の選択形成方法
は、基板上の下地膜表面にプラズマCVDによりフロロ
カーボン薄膜を形成する工程と、前記薄膜の銅被膜形成
予定領域にUV光を選択的に照射する工程と、銅のCV
Dを行なって、前記下地膜の銅被膜形成予定領域に銅被
膜を選択的に成膜する工程とを具備したことを特徴とす
るものである。
Another method for selectively forming a copper film according to the present invention includes a step of forming a fluorocarbon thin film on a surface of an underlayer film on a substrate by plasma CVD, and a step of selectively applying UV light to a region of the thin film where a copper film is to be formed. Irradiation process and copper CV
D) to selectively form a copper film in the copper film formation region of the underlayer film.

【0009】[0009]

【発明の実施の形態】以下、本発明に係わる銅被膜の選
択形成方法を詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for selectively forming a copper film according to the present invention will be described in detail.

【0010】(第1工程)まず、基板上の下地膜表面に
シランカップリング剤または界面活性剤の薄膜を形成す
る。
(First Step) First, a thin film of a silane coupling agent or a surfactant is formed on the surface of a base film on a substrate.

【0011】前記基板としては、例えばシリコン基板、
化合物半導体基板またはガラス基板等を用いることがで
きる。
As the substrate, for example, a silicon substrate,
A compound semiconductor substrate, a glass substrate, or the like can be used.

【0012】前記下地膜は、単結晶シリコン、多結晶シ
リコン、非晶質シリコン、酸化ケイ素、窒化ケイ素等の
絶縁物を始めとし、Cu,Tiなどの金属等の任意の材
料から形成される。
The base film is formed of any material such as an insulator such as single crystal silicon, polycrystalline silicon, amorphous silicon, silicon oxide, and silicon nitride, and a metal such as Cu and Ti.

【0013】前記シランカップリング剤としては、例え
ばヘキサメチルジシラザン、ビニルトリクロロシラン、
ビニルトリメトキシシラン、ビニルトリエトキシシラ
ン、ビニルトリス(βメトキシエトキシ)シラン、γ−
グリシドキシプロピルトリメトキシシラン、γ−メタク
リロキシプロピルメチルジメトキシシラン、N−β(ア
ミノエチル)γ−アミノプロピルメチルジメトキシシラ
ン、γ−メルカプトプロピルトリメトキシシラン、γ−
アミノプロピルトリエトキシシラン、ビス(3−トリエ
トキシシリルプロピル)テトラスルファン等を挙げるこ
とができる。
As the silane coupling agent, for example, hexamethyldisilazane, vinyltrichlorosilane,
Vinyltrimethoxysilane, vinyltriethoxysilane, vinyltris (β-methoxyethoxy) silane, γ-
Glycidoxypropyltrimethoxysilane, γ-methacryloxypropylmethyldimethoxysilane, N-β (aminoethyl) γ-aminopropylmethyldimethoxysilane, γ-mercaptopropyltrimethoxysilane, γ-
Examples thereof include aminopropyltriethoxysilane and bis (3-triethoxysilylpropyl) tetrasulfane.

【0014】前記界面活性剤としては、長鎖アルキルス
ルホン酸、長鎖アルキルカルボン酸等を用いることがで
きる。
As the surfactant, a long-chain alkyl sulfonic acid, a long-chain alkyl carboxylic acid and the like can be used.

【0015】前記シランカップリング剤または界面活性
剤の薄膜は、例えば蒸気吸着法または塗布法により形成
される。このような薄膜は、後述するUV照射により分
解除去する観点から、分子レベルの厚さにすることが好
ましい。
The thin film of the silane coupling agent or the surfactant is formed by, for example, a vapor adsorption method or a coating method. From the viewpoint of decomposing and removing such a thin film by UV irradiation, which will be described later, it is preferable that the thin film has a thickness on a molecular level.

【0016】(第2工程)次いで、前記薄膜の銅被膜形
成予定領域を親水性にする。
(Second Step) Next, the region of the thin film where the copper film is to be formed is made hydrophilic.

【0017】前記薄膜の銅被膜形成予定領域を親水性に
するには、例えば前記薄膜の銅被膜形成予定領域にUV
光を選択的に照射する方法を採用することができる。
In order to make the region of the thin film where the copper film is to be formed hydrophilic, for example, UV
A method of selectively irradiating light can be employed.

【0018】前記UV光は、波長が365nmの場合、
300mJ/cm2以上の出力で前記被膜に選択的に照
射することが好ましい。
When the wavelength of the UV light is 365 nm,
It is preferable to selectively irradiate the coating with an output of 300 mJ / cm 2 or more.

【0019】(第3工程)次いで、銅のCVDを行なっ
て、前記下地膜の銅被膜形成予定領域に銅被膜を選択的
に堆積する。
(Third Step) Next, a copper film is selectively deposited on the undercoat film in the region where the copper film is to be formed by CVD of copper.

【0020】銅のCVDの原料ガスとしては、トリメチ
ルビニルシラン添加ヘキサフルオロアセチルアセナトカ
ッパー、トリメチルホスフィン添加ヘキサフルオロアセ
チルアセナトカッパー、1,5−シクロオククダジエン
添加ヘキサフルオロアセチルアセナトカッパー等を用い
ることができる。この原料ガスは、窒素等のキャリアガ
スにより希釈して使用することを許容する。
As a raw material gas for copper CVD, hexafluoroacetylacenatato copper with trimethylvinylsilane added, hexafluoroacetylacenatato copper with trimethylphosphine, hexafluoroacetylacenatato copper with 1,5-cyclooctadiene, or the like is used. be able to. This source gas is allowed to be used after being diluted with a carrier gas such as nitrogen.

【0021】前記銅のCVDは、基板温度を220℃以
下、より好ましくは150〜200℃で前記銅の原料ガ
スを吸着分解反応を行なうことが望ましい。
In the copper CVD, it is desirable to carry out the adsorption decomposition reaction of the copper raw material gas at a substrate temperature of 220 ° C. or lower, more preferably 150 to 200 ° C.

【0022】以上説明したように基板上の下地膜表面に
シランカップリング剤または界面活性剤の薄膜を形成す
ると、疎水性になる。この疎水性を示す被膜の銅被膜形
成予定領域に例えばUV光を選択的に照射してその照射
領域を親水性にする。つまり、下地膜の表面に疎水/親
水の差が生じる。このような状態で150〜220℃の
ような低温での銅のCVD(銅の原料ガスの吸着分解反
応)を行なうことにより、前記親水性の領域(銅被膜形
成予定領域)に銅が選択的に堆積されて例えば銅配線の
ような銅被膜(銅パターン)を形成することができる。
As described above, when a thin film of a silane coupling agent or a surfactant is formed on the surface of a base film on a substrate, the film becomes hydrophobic. For example, UV light is selectively irradiated to a region where the copper film of the hydrophobic film is to be formed, to make the irradiated region hydrophilic. That is, there is a difference between hydrophobicity and hydrophilicity on the surface of the base film. In such a state, by performing copper CVD (adsorption decomposition reaction of a copper source gas) at a low temperature such as 150 to 220 ° C., copper is selectively formed in the hydrophilic region (copper film formation planned region). To form a copper film (copper pattern) such as a copper wiring.

【0023】すなわち、本発明者らは銅の原料ガスとし
てトリメチルビニルシラン添加ヘキサフルオロアセチル
アセナトカッパーを用い、次のような図1に示す構造の
CVD装置で基板周囲の雰囲気温度を150〜220℃
にすることにより気相中での前記原料ガスの分解が起き
ないか、殆ど無視できる程度の堆積速度になることを確
認した。
That is, the inventors of the present invention used hexafluoroacetylacetonate copper with trimethylvinylsilane as a raw material gas for copper, and increased the ambient temperature around the substrate to 150 to 220 ° C. with a CVD apparatus having the structure shown in FIG.
Thus, it was confirmed that the decomposition of the source gas in the gas phase did not occur, or the deposition rate was almost negligible.

【0024】このCVD装置は、一端(右端)に原料ガ
ス供給管1を有する内径50mmの石英製反応管2を具
備する。基板ホルダ3は、前記供給管1と反対側の端部
(左端)から前記反応管2内に挿入されている。このホ
ルダ3は、先端面が基板の保持部として機能し、かつ冷
却水が内部に循環されるとともに、前記反応管2の外部
に位置する側壁に冷却水の排出部4を有する筐体5と、
この筐体5の後端部から挿入され、冷却水を導入するた
めの冷却水導入管6とから構成されている。ヒータ7
は、前記基板ホルダ3の先端付近から前記原料ガス供給
管1に向かう約1mの長さに亘る前記反応管2の外周に
巻装されている。真空ポンプ8は、前記ガス供給管1と
反対側の前記反応管2の端部付近に可変バルブ9を通し
て連結されている。熱電対を装填したシーリド管10
は、前記ガス供給管1と反対側の前記反応管2の端部か
らその内部に先端が前記ホルダ3の先端面付近に位置す
るように挿入されている。
This CVD apparatus includes a quartz reaction tube 2 having an inner diameter of 50 mm and a source gas supply tube 1 at one end (right end). The substrate holder 3 is inserted into the reaction tube 2 from an end (left end) opposite to the supply tube 1. The holder 3 has a housing 5 having a front end surface functioning as a substrate holding unit, cooling water circulating therein, and having a cooling water discharge unit 4 on a side wall located outside the reaction tube 2. ,
A cooling water introduction pipe 6 is inserted from the rear end of the housing 5 to introduce cooling water. Heater 7
Is wound around the outer periphery of the reaction tube 2 over a length of about 1 m from the vicinity of the tip of the substrate holder 3 toward the source gas supply tube 1. The vacuum pump 8 is connected through a variable valve 9 near the end of the reaction tube 2 opposite to the gas supply tube 1. Sealed tube 10 loaded with thermocouple
Is inserted from the end of the reaction tube 2 on the side opposite to the gas supply tube 1 so that the end is located near the end surface of the holder 3.

【0025】図1に示すCVD装置において基板ホルダ
3先端面に所望の材料からなる基板11を保持するとと
もに、冷却水を冷却水導入管6を通して筐体5内に導入
し、排出部4から排出することにより前記基板ホルダ3
先端面に保持した基板11を冷却する。つづいて、銅の
原料ガスであるトリメチルビニルシラン添加ヘキサフル
オロアセチルアセナトカッパーをガス供給管1を通して
反応管2内に導入するとともに、真空ポンプ8を作動し
て前記反応管2内のガスを可変バルブ9を通して排気す
る。この時、前記可変バルブ9により前記反応管2内の
圧力が100Pa、管1内での流速が8cm/secに
なるように制御する。真空排気が安定した状態でヒータ
7に通電して加熱する。前記ヒータ7の加熱によりガス
供給管1から供給された前記原料ガスが暖められる。原
料ガスが暖められることは、シーリド管10に装填され
た熱電対により確認した。また、この時の基板11は3
0℃以下の温度に保たれていることを図示しない基板温
度測定用熱電対により確認した。
In the CVD apparatus shown in FIG. 1, a substrate 11 made of a desired material is held on the front end surface of the substrate holder 3, and cooling water is introduced into the housing 5 through the cooling water introduction pipe 6 and discharged from the discharge unit 4. The substrate holder 3
The substrate 11 held on the tip surface is cooled. Subsequently, trimethylvinylsilane-added hexafluoroacetylacenato copper, which is a copper raw material gas, is introduced into the reaction tube 2 through the gas supply tube 1, and the vacuum pump 8 is operated to change the gas in the reaction tube 2 to a variable valve. Exhaust through 9. At this time, control is performed by the variable valve 9 so that the pressure in the reaction tube 2 becomes 100 Pa and the flow velocity in the tube 1 becomes 8 cm / sec. The heater 7 is energized and heated in a state where the evacuation is stable. The raw material gas supplied from the gas supply pipe 1 is heated by the heating of the heater 7. The fact that the source gas was warmed was confirmed by a thermocouple loaded in the seal tube 10. The substrate 11 at this time is 3
It was confirmed by a substrate temperature measuring thermocouple (not shown) that the temperature was kept at 0 ° C. or lower.

【0026】前述した条件の下で前記シーリド管10に
装填された熱電対で測定される温度が変化するように基
板ホルダによる基板の冷却およびヒータ7による加熱温
度を制御して24時間の成膜操作時の温度とCuの堆積
膜厚の関係を求めた。その結果を図2に示す。
Under the above-described conditions, the cooling of the substrate by the substrate holder and the heating temperature by the heater 7 are controlled so that the temperature measured by the thermocouple loaded in the above-mentioned shield tube 10 changes, and the film is formed for 24 hours. The relationship between the temperature during operation and the deposited film thickness of Cu was determined. The result is shown in FIG.

【0027】図2から前記基板近傍の熱電対で測定され
た雰囲気温度が200℃以下において有為なCuの堆積
が認められないことがわかる。この事実から200℃
(場合によっては220℃以下)のCuの堆積の条件で
は、原料ガスの分解が気相で起こらず、専ら基板表面の
吸着分解反応であることがわかる。したがって、このよ
うな条件の下でのCuの堆積は原料ガスが吸着される親
水性を示す箇所でなされ、原料ガスの吸着が阻害される
疎水性の箇所ではCuの堆積がなされないという選択的
な堆積を遂行できることがわかる。
FIG. 2 shows that no significant Cu deposition was observed when the ambient temperature measured by a thermocouple near the substrate was 200 ° C. or less. From this fact, 200 ° C
It can be seen that under the conditions of Cu deposition (in some cases, 220 ° C. or lower), the decomposition of the source gas does not occur in the gas phase, and is exclusively an adsorption decomposition reaction on the substrate surface. Therefore, the deposition of Cu under such a condition is performed at a hydrophilic portion where the source gas is adsorbed, and the Cu is not deposited at a hydrophobic portion where the adsorption of the source gas is inhibited. It can be seen that a proper deposition can be achieved.

【0028】事実、単結晶シリコン基板、多結晶シリコ
ン基板、非晶質シリコン基板、表面にSiO膜が被覆さ
れた単結晶シリコン基板にシランカップリング剤(例え
ばヘキサメチルジシラザン)の飽和蒸気を室温(25
℃)で5分間程度吸着させた。なお、この吸着時間の長
短は特に以後の特性に影響を与えない。つづいて、前記
シランカップリング剤が吸着された表面に例えば365
nmのUV光を1500mJ/cm2の出力で照射し
た。照射後は、カップリング剤がSi−O結合が支配的
であるものに変化していることがXPS分析により確認
した。
In fact, a saturated vapor of a silane coupling agent (for example, hexamethyldisilazane) is applied to a single-crystal silicon substrate, a polycrystalline silicon substrate, an amorphous silicon substrate, or a single-crystal silicon substrate having a surface coated with an SiO film, at room temperature. (25
C) for about 5 minutes. The length of the adsorption time does not particularly affect the subsequent characteristics. Subsequently, for example, 365 on the surface to which the silane coupling agent is adsorbed.
Irradiated with UV light of 1500 nm at an output of 1500 mJ / cm 2 . After irradiation, it was confirmed by XPS analysis that the coupling agent had changed to one in which the Si—O bond was dominant.

【0029】次いで、前記シランカップリング剤の処理
前の各基板、シランカップリング剤の処理後の各基板、
およびUV光照射後の各基板を前述した図1に示す基板
ホルダに保持し、銅の原料ガスであるトリメチルビニル
シラン添加ヘキサフルオロアセチルアセナトカッパーを
用い、150℃、原料ガス圧1torrの条件の下での
CVDによりCu膜を堆積した。
Next, each substrate before the treatment with the silane coupling agent, each substrate after the treatment with the silane coupling agent,
And each substrate after the UV light irradiation is held in the substrate holder shown in FIG. 1 described above, using a hexafluoroacetylacetonate copper containing trimethylvinylsilane, which is a raw material gas for copper, at 150 ° C. and a raw material gas pressure of 1 torr. A Cu film was deposited by CVD in the above.

【0030】各基板上でのCu膜の厚さ(2分間)を図
3に示す。この図3は、重要なプロセス上の利点を示唆
している。それは、下地材料を問わず、シランカップリ
ング剤が吸着された面とUV光照射面との間に多大なC
uの膜厚差が生じ、UV照射のみが蒸着領域を制御する
ことである。
FIG. 3 shows the thickness of the Cu film on each substrate (for 2 minutes). This FIG. 3 suggests an important process advantage. This is because a large amount of C is present between the surface on which the silane coupling agent is adsorbed and the surface irradiated with UV light, regardless of the underlying material.
A difference in film thickness of u occurs, and only UV irradiation controls the deposition region.

【0031】以上のように、本発明によれば基板上の下
地膜表面にシランカップリング剤または界面活性剤の薄
膜を形成して表面を疎水性とし、この疎水性を示す被膜
の銅被膜形成予定領域にUV光を選択的に照射してその
照射領域を親水性とした後、150〜220℃のような
低温での銅のCVD(銅の原料ガスの吸着分解反応)を
行なうことにより、前記親水性の領域(銅被膜形成予定
領域)に銅が選択的に堆積できる。その結果、エッチン
グやCMPのような無駄な銅の消費がなされることなく
例えば銅配線のような銅被膜(銅パターン)を下地の所
望領域に選択的に形成することができる。
As described above, according to the present invention, a thin film of a silane coupling agent or a surfactant is formed on the surface of a base film on a substrate to make the surface hydrophobic, and a copper film is formed on the surface of the hydrophobic film. After selectively irradiating the predetermined area with UV light to make the irradiated area hydrophilic, copper CVD (adsorption decomposition reaction of copper raw material gas) is performed at a low temperature such as 150 to 220 ° C. Copper can be selectively deposited on the hydrophilic region (the region where the copper film is to be formed). As a result, a copper film (copper pattern) such as a copper wiring can be selectively formed in a desired region of the base without wasting copper such as etching or CMP.

【0032】次に、本発明に係わる別の銅被膜の選択形
成方法を詳細に説明する。
Next, another method for selectively forming a copper film according to the present invention will be described in detail.

【0033】(第1工程)まず、基板上の下地膜表面に
プラズマCVDによりフロロカーボン薄膜を形成する。
(First Step) First, a fluorocarbon thin film is formed on the surface of a base film on a substrate by plasma CVD.

【0034】前記基板、下地膜としては、前述したのと
同様なものが用いられる。
As the substrate and the base film, the same ones as described above are used.

【0035】(第2工程)次いで、前記フロロカーボン
薄膜の銅被膜形成予定領域にUV光を選択的に照射す
る。つづいて、銅のCVDを行なって、前記下地膜の銅
被膜形成予定領域に銅被膜を選択的に堆積する。
(Second Step) Next, UV light is selectively irradiated to a region where the copper film of the fluorocarbon thin film is to be formed. Subsequently, copper CVD is performed to selectively deposit a copper film on the region where the copper film is to be formed in the underlayer.

【0036】銅のCVDの原料ガスとしては、前述した
のと同様なものが用いられる。
As the raw material gas for copper CVD, the same gas as described above is used.

【0037】前記銅のCVDは、基板温度を220℃以
下、より好ましくは150〜200℃で前記銅の原料ガ
スを吸着分解反応を行なうことが望ましい。
In the copper CVD, it is desirable to carry out the adsorption decomposition reaction of the copper source gas at a substrate temperature of 220 ° C. or lower, more preferably 150 to 200 ° C.

【0038】以上説明したように基板上の下地膜表面に
疎水性のフロロカーボン薄膜を形成し、この被膜の銅被
膜形成予定領域にUV光を選択的に照射すると、その照
射領域が親水性にする。つまり、下地膜の表面に疎水/
親水の差が生じる。このような状態で150〜220℃
のような低温での銅のCVD(銅の原料ガスの吸着分解
反応)を行なうことにより、前記親水性の領域(銅被膜
形成予定領域)に銅が選択的に堆積されて例えば銅配線
のような銅被膜(銅パターン)を形成することができ
る。
As described above, a hydrophobic fluorocarbon thin film is formed on the surface of a base film on a substrate, and a region where a copper film is to be formed is selectively irradiated with UV light to make the irradiated region hydrophilic. . In other words, hydrophobic /
A difference in hydrophilicity occurs. 150-220 ° C in such a state
By performing copper CVD (adsorption decomposition reaction of a copper source gas) at a low temperature as described above, copper is selectively deposited on the hydrophilic region (the region where a copper film is to be formed), for example, as in the case of copper wiring. Copper film (copper pattern) can be formed.

【0039】[0039]

【実施例】以下、本発明の好ましい実施例を図4、図5
を参照して詳細に説明する。
FIG. 4 and FIG. 5 show a preferred embodiment of the present invention.
This will be described in detail with reference to FIG.

【0040】(実施例1)まず、図4の(a)に示すよ
うに表面に汚染防止を目的としたSiO膜(図示せ
ず)がコートされた500mm×600mmガラス基板
21上に基板温度420℃の条件下で減圧CVD法によ
り厚さ50nmの非晶質シリコン(a−Si)薄膜22
を堆積した。なお、SiO膜の代わりに窒化シリコン
(SiNx)膜または窒化シリコンと酸化シリコンの混
合物からなる膜を用いてもよい。つづいて、図4の
(b)に示すようにTFTの閾値制御を目的としてa−
Si膜22に不純物(例えばボロン)をドーピングし
た。ひきつづき、ボロンドープa−Si膜にエキシマレ
ーザアニールを施して結晶化させることによりボロンド
ープ多結晶シリコン(p−Si)薄膜23とした。な
お、このエキシマレーザアニールに代えてランプアニー
ルを施してもよい。
Example 1 First, as shown in FIG. 4A, a substrate temperature of 500 mm × 600 mm was coated on a glass substrate 21 coated with a SiO 2 film (not shown) for preventing contamination. An amorphous silicon (a-Si) thin film 22 having a thickness of 50 nm by a low pressure CVD method at 420 ° C.
Was deposited. Note that a silicon nitride (SiN x ) film or a film made of a mixture of silicon nitride and silicon oxide may be used instead of the SiO 2 film. Subsequently, as shown in FIG. 4B, a-
The Si film 22 was doped with an impurity (for example, boron). Subsequently, the boron-doped a-Si film was subjected to excimer laser annealing and crystallized to obtain a boron-doped polycrystalline silicon (p-Si) thin film 23. Note that lamp annealing may be performed instead of the excimer laser annealing.

【0041】次いで、前記p−Si薄膜23表面にスピ
ンコート法によりレジストを塗布し、乾燥し、露光した
後、現像することによりレジストパターン24,25を
形成した。つづいて、これらレジストパターン24,2
5をマスクとしてCF4およびO2ガスを用いたCDE(C
hemical Dry Etching)により前記p−Si薄膜23を選
択的に除去することにより図4の(c)に示す島状のp
−Si薄膜26,27を形成した。
Next, a resist was applied to the surface of the p-Si thin film 23 by spin coating, dried, exposed, and developed to form resist patterns 24 and 25. Subsequently, these resist patterns 24, 2
5 using CF 4 and O 2 gas as masks
By selectively removing the p-Si thin film 23 by chemical dry etching, the island-like p-type shown in FIG.
-Si thin films 26 and 27 were formed.

【0042】次いで、レジストパターンを灰化して除去
した後、図4の(d)に示すように島状のp−Si薄膜
26,27を含むガラス基板21上にTEOSを原料ガ
スとして用いた減圧プラズマCVD法により厚さ200
nmのSiO2薄膜28を堆積し、さらにこのSiO2
膜28上に減圧プラズマCVD法により厚さ50nmの
窒化シリコン(SiNx)薄膜29を堆積した。つづい
て、前記窒化シリコン薄膜29表面にスピンコート法に
よりレジストを塗布し、乾燥し、露光した後、現像する
ことによりレジストパターン(図示せず)を形成し、こ
のレジストパターンをマスクとして前記窒化シリコン薄
膜29を選択的にエッチング除去し、さらにレジストパ
ターンを除去することにより図4の(e)に示す拡散バ
リア膜30を形成した。
Next, after the resist pattern is ashed and removed, as shown in FIG. 4D, a pressure reduction using TEOS as a source gas is performed on the glass substrate 21 including the island-like p-Si thin films 26 and 27. 200 thickness by plasma CVD
The nm of SiO 2 film 28 is deposited, was further deposited silicon nitride (SiN x) film 29 having a thickness of 50nm by vacuum plasma CVD on the SiO 2 film 28. Subsequently, a resist is applied to the surface of the silicon nitride thin film 29 by a spin coat method, dried, exposed, and developed to form a resist pattern (not shown). The diffusion barrier film 30 shown in FIG. 4E was formed by selectively etching away the thin film 29 and further removing the resist pattern.

【0043】次いで、前記拡散バリア膜30を含むSi
O薄膜28上にシランカップリング剤であるヘキサメチ
ルジシラザンの飽和蒸気を室温(25℃)で5分間程度
吸着させた。シランカップリング剤が吸着された前記拡
散バリア膜30表面に365nmのUV光を1500m
J/cm2の出力で選択的に照射して前記シランカップ
リング剤を光分解した。つづいて、銅の原料ガスである
トリメチルビニルシラン添加ヘキサフルオロアセチルア
セナトカッパーを用い、基板温度200℃、原料ガス圧
1torrの条件の下での選択CVDにより前記拡散バ
リア膜30上にCu膜を堆積した。その後、熱処理を施
すことにより図5の(f)に示すようにCuからなるゲ
ート電極31を形成した。この熱処理は、CVD工程で
吸着された水分を除去するためになされるが省略しても
よい。
Next, the Si containing the diffusion barrier film 30
A saturated vapor of hexamethyldisilazane as a silane coupling agent was adsorbed on the O thin film 28 at room temperature (25 ° C.) for about 5 minutes. UV light of 365 nm is applied to the surface of the diffusion barrier film 30 to which the silane coupling agent is adsorbed for 1500 m.
The silane coupling agent was photodegraded by selective irradiation at an output of J / cm 2 . Subsequently, a Cu film is deposited on the diffusion barrier film 30 by selective CVD under conditions of a substrate temperature of 200 ° C. and a source gas pressure of 1 torr using hexafluoroacetylacenato copper to which trimethylvinylsilane as a source gas for copper is added. did. Thereafter, heat treatment was performed to form a gate electrode 31 made of Cu as shown in FIG. This heat treatment is performed to remove moisture adsorbed in the CVD process, but may be omitted.

【0044】次いで、ゲート電極31の検査、つまりC
u膜の抵抗値と断線の発生有無を電気的に検査するとと
もに、ゲート電極31の輪郭と予め記憶させたパターン
とを比較して断線または短絡を検査した。この検査で良
品として判定された基板を選び、図5の(g)に示すよ
うにゲート電極31およびその下の拡散バリア膜30を
マスクとして不純物、例えばリンを前記島状のp−Si
薄膜26,27に選択的にドーピングして各島状のp−
Si薄膜26,27にn+型のソース、ドレイン領域3
2,33およびp型チャンネル領域34をそれぞれ形成
した。
Next, inspection of the gate electrode 31, that is, C
The resistance value of the u film and the presence or absence of disconnection were electrically inspected, and the disconnection or short circuit was inspected by comparing the contour of the gate electrode 31 with a previously stored pattern. A substrate determined as a non-defective product in this inspection is selected, and as shown in FIG. 5 (g), impurities such as phosphorus are added to the island-shaped p-Si using the gate electrode 31 and the diffusion barrier film 30 thereunder as a mask.
By selectively doping the thin films 26 and 27, each island-shaped p-
N + -type source and drain regions 3 on Si thin films 26 and 27
2, 33 and a p-type channel region 34 were formed, respectively.

【0045】次いで、全面に減圧CVD法により層間絶
縁膜としての窒化シリコン(SiN x)膜35を堆積し
た。つづいて、前記窒化シリコン(SiNx)膜35上
にレジストパターン(図示せず)を形成し、このレジス
トパターンをマスクとして前記窒化シリコン(Si
x)膜35およびSiO薄膜28を選択的にウェット
エッチングすることにより、図5の(h)に示すように
底部が前記ソース、ドレイン領域32,33にそれぞれ
達するコンタクトホール36を開口した。つづいて、こ
れらコンタクトホール36を含む前記窒化シリコン(S
iNx)膜35上にソース、ドレイン電極配線用のAl
−Nd合金膜をスパッタリングにより堆積した。この
後、このAl−Nd合金膜上に図示しないレジストパタ
ーンを形成し、このレジストパターンをマスクとしてC
2およびBCl3のガスを用いるリアクティブイオンエ
ッチングにより前記Al−Nd合金膜を選択的にエッチ
ング除去することにより、図5の(i)に示すようにコ
ンタクトホール36を通して前記ソース領域32に接続
されるソース電極配線37、コンタクトホール36を通
して前記ドレイン領域33に接続されるドレイン電極配
線38を形成して複数のTFTを有するアレイ基板を製
造した。
Next, interlayer insulation is performed on the entire surface by a low pressure CVD method.
Silicon nitride (SiN) as edge film x) Deposit the film 35
Was. Subsequently, the silicon nitride (SiNx) On membrane 35
A resist pattern (not shown) is formed on the resist.
The silicon nitride (Si
Nx) Selectively wet film 35 and SiO thin film 28
By etching, as shown in FIG.
The bottoms correspond to the source and drain regions 32 and 33, respectively.
The reaching contact hole 36 was opened. Next, this
The silicon nitride (S) including these contact holes 36
iNx) Al for source and drain electrode wiring on film 35
An -Nd alloy film was deposited by sputtering. this
Then, a resist pattern (not shown) is formed on the Al-Nd alloy film.
Pattern, and using this resist pattern as a mask, C
lTwoAnd BClThreeReactive ion etching using various gases
The Al-Nd alloy film is selectively etched by etching.
As shown in FIG. 5 (i),
Connected to the source region 32 through the contact hole 36
Through the source electrode wiring 37 and the contact hole 36
And a drain electrode arrangement connected to the drain region 33.
Forming an array substrate having a plurality of TFTs by forming the line 38;
Built.

【0046】このような実施例1によれば少ないCuの
消費量のCu選択堆積技術により形成されたゲート電極
を有するアレイ基板を製造することができた。
According to the first embodiment, it was possible to manufacture an array substrate having a gate electrode formed by the Cu selective deposition technique, which consumes a small amount of Cu.

【0047】なお、実施例1ではソース、ドレインの電
極配線をAl−Nd合金膜のスパッタリング蒸着、パタ
ーニングにより形成したが、Cuのゲート電極の形成と
ほぼ同様なCu膜の選択堆積技術により形成してもよ
い。
In the first embodiment, the source and drain electrode wirings are formed by sputtering evaporation and patterning of an Al—Nd alloy film, but are formed by a Cu film selective deposition technique substantially similar to the formation of a Cu gate electrode. You may.

【0048】(実施例2)まず、表面に100nmの厚
さの熱酸化膜が形成されたシリコンウェハを真空チャン
バ内に設置し、このチャンバ内にCHF3ガスを10s
ccmの流量で導入し、チャンバ圧力を20mtorr
にした後、800Wの高周波電力を印加して誘導結合型
RFプラズマを生成した。このようなプラズマに前記シ
リコンウェハを30秒間曝すことにより厚さ20nmの
フロロカーボン薄膜を前記ウェハの熱酸化膜上に堆積し
た。
(Example 2) First, a silicon wafer having a 100-nm-thick thermal oxide film formed on its surface is placed in a vacuum chamber, and CHF 3 gas is supplied to this chamber for 10 seconds.
Cm flow rate and chamber pressure 20 mtorr
After that, 800 W of high frequency power was applied to generate inductively coupled RF plasma. By exposing the silicon wafer to such plasma for 30 seconds, a fluorocarbon thin film having a thickness of 20 nm was deposited on the thermal oxide film of the wafer.

【0049】次いで、前記フロロカーボン薄膜の銅被膜
形成予定領域に波長365nmのUV光を20000m
J/cm2の出力で照射した。つづいて、このウェハを
反応管内に設置し、銅の原料ガスであるトリメチルビニ
ルシラン添加ヘキサフルオロアセチルアセナトカッパー
を0.1cc/min、キャリアガス(窒素ガス)を1
00sccmの条件で導入し、同時に前記反応管内のガ
スを排気して原料ガス圧2torr、基板温度180℃
の条件の下での選択CVDを行なった。
Next, UV light having a wavelength of 365 nm was applied to the area where the copper film of the fluorocarbon thin film was to be formed by 20,000 m.
Irradiation was performed at an output of J / cm 2 . Subsequently, the wafer was placed in a reaction tube, and 0.1 cc / min of hexafluoroacetylacenato copper with trimethylvinylsilane, which is a copper source gas, and a carrier gas (nitrogen gas) of 1 cc / min.
The gas was introduced under the condition of 00 sccm, and the gas in the reaction tube was exhausted at the same time.
Was performed under the conditions described above.

【0050】その結果、前記UV光の照射領域にCu膜
を選択的に堆積することができた。
As a result, a Cu film could be selectively deposited on the UV light irradiation area.

【0051】[0051]

【発明の効果】以上説明したように、本発明によれば金
属、絶縁材料等の任意の材料からなる下地の必要とする
領域に銅を選択的に堆積して原料コストの低減等を達成
でき、LSI、液晶表示装置の低抵抗配線として有効な
銅被膜の選択形成方法を提供できる。
As described above, according to the present invention, copper can be selectively deposited on a required area of a base made of an arbitrary material such as a metal and an insulating material, thereby achieving a reduction in material cost and the like. , LSI, and a method for selectively forming a copper film effective as a low-resistance wiring of a liquid crystal display device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のCu薄膜の選択形成に用いられる減圧
CVD装置を示す概略図。
FIG. 1 is a schematic diagram showing a reduced pressure CVD apparatus used for selective formation of a Cu thin film of the present invention.

【図2】図1の減圧CVD装置でCu薄膜を堆積した時
の温度と堆積Cu薄膜の厚さの関係を示すグラフ。
FIG. 2 is a graph showing the relationship between the temperature when depositing a Cu thin film and the thickness of the deposited Cu thin film using the low-pressure CVD apparatus shown in FIG.

【図3】各種基板、表面にシランカップリング剤を蒸着
させた各種基板、および表面にシランカップリング剤を
蒸着させ、さらにUV光を照射した各種基板のCu堆積
膜厚(2分間)を示すグラフ。
FIG. 3 shows the Cu deposition film thickness (2 minutes) of various substrates, various substrates having a silane coupling agent vapor-deposited on the surface, and various substrates having a silane coupling agent vapor-deposited on the surface and further irradiated with UV light. Graph.

【図4】本発明の実施例1におけるTFTを有するアレ
ス基板の製造工程を示す断面図。
FIG. 4 is a cross-sectional view illustrating a process of manufacturing an Ares substrate having a TFT according to the first embodiment of the present invention.

【図5】本発明の実施例1におけるTFTを有するアレ
ス基板の製造工程を示す断面図。
FIG. 5 is a cross-sectional view illustrating a process of manufacturing an Ares substrate having a TFT according to the first embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…ガス供給管、 2…反応管、 3…基板ホルダ、 7…ヒータ、 11…基板、 21…ガラス基板、 23…p−Si薄膜、 30…拡散バリア膜、 31…ゲート電極、 32…ソース領域、 33…ドレイン領域、 36…コンタクトホール 37…ソース電極配線、 38…ドレイン電極配線。 DESCRIPTION OF SYMBOLS 1 ... Gas supply pipe, 2 ... Reaction tube, 3 ... Substrate holder, 7 ... Heater, 11 ... Substrate, 21 ... Glass substrate, 23 ... p-Si thin film, 30 ... Diffusion barrier film, 31 ... Gate electrode, 32 ... Source Region 33: Drain region 36: Contact hole 37: Source electrode wiring 38: Drain electrode wiring

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山田 啓作 埼玉県深谷市幡羅町1丁目9番2号 株式 会社東芝深谷工場内 Fターム(参考) 4M104 AA01 AA08 AA09 BB02 BB04 CC05 DD43 DD45 DD47 FF21 GG08 GG14 5F033 HH11 PP02 PP08 QQ01 QQ68 VV06 XX08 5F110 AA03 AA16 AA28 BB01 CC01 DD02 DD13 EE02 EE45 EE47 FF02 FF03 FF30 FF32 GG02 GG13 GG32 GG47 GG53 PP03 PP27 PP32 QQ04  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Keisaku Yamada 1-9-2 Hara-cho, Fukaya-shi, Saitama F-term in Fukaya Plant, Toshiba Corporation (reference) 4M104 AA01 AA08 AA09 BB02 BB04 CC05 DD43 DD45 DD47 FF21 GG08 GG14 5F033 HH11 PP02 PP08 QQ01 QQ68 VV06 XX08 5F110 AA03 AA16 AA28 BB01 CC01 DD02 DD13 EE02 EE45 EE47 FF02 FF03 FF30 FF32 GG02 GG13 GG32 GG47 GG53 PP03 PP27 PP32 QQ04

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 基板上の下地膜表面にシランカップリン
グ剤または界面活性剤の薄膜を形成する工程と、 前記薄膜の銅被膜形成予定領域を親水性にする工程と、 銅のCVDを行なって、前記下地膜の銅被膜形成予定領
域に銅被膜を選択的に成膜する工程とを具備したことを
特徴とする銅被膜の選択形成方法。
A step of forming a thin film of a silane coupling agent or a surfactant on the surface of a base film on a substrate, a step of making a region of the thin film where a copper film is to be formed hydrophilic, and a step of performing copper CVD. Selectively forming a copper film in a region of the base film where the copper film is to be formed.
【請求項2】 前記薄膜の銅被膜形成予定領域を親水性
にする工程は、前記薄膜の銅被膜形成予定領域にUV光
を選択的に照射することによりなされることを特徴とす
る請求項1記載の銅被膜の選択形成方法。
2. The method according to claim 1, wherein the step of making the copper film formation region of the thin film hydrophilic is performed by selectively irradiating the UV light to the copper film formation region of the thin film. A method for selectively forming a copper film as described in the above.
【請求項3】 基板上の下地膜表面にプラズマCVDに
よりフロロカーボン薄膜を形成する工程と、 前記薄膜の銅被膜形成予定領域にUV光を選択的に照射
する工程と、 銅のCVDを行なって、前記下地膜の銅被膜形成予定領
域に銅被膜を選択的に成膜する工程とを具備したことを
特徴とする銅被膜の選択形成方法。
A step of forming a fluorocarbon thin film on the surface of the base film on the substrate by plasma CVD, a step of selectively irradiating a UV light to an area of the thin film where a copper film is to be formed, and performing a CVD of copper. Selectively forming a copper film in a region of the base film where the copper film is to be formed.
【請求項4】 前記銅のCVDは、前記基板の温度を2
20℃以下にして行われることを特徴とする請求項1な
いし3いずれか記載の銅被膜の選択形成方法。
4. The method according to claim 1, wherein the CVD of the copper is performed by setting the temperature of the substrate to two.
The method according to any one of claims 1 to 3, wherein the method is performed at a temperature of 20 ° C or lower.
JP20305299A 1999-07-09 1999-07-16 Method for selectively forming copper film and method for manufacturing semiconductor device Expired - Lifetime JP4098442B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP20305299A JP4098442B2 (en) 1999-07-16 1999-07-16 Method for selectively forming copper film and method for manufacturing semiconductor device
US09/612,237 US6506675B1 (en) 1999-07-09 2000-07-07 Copper film selective formation method
TW089113800A TW464980B (en) 1999-07-09 2000-07-07 Method for selectively forming copper film
KR10-2000-0039061A KR100419535B1 (en) 1999-07-09 2000-07-08 Method for selectively forming deposited copper film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20305299A JP4098442B2 (en) 1999-07-16 1999-07-16 Method for selectively forming copper film and method for manufacturing semiconductor device

Publications (2)

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JP2001035811A true JP2001035811A (en) 2001-02-09
JP4098442B2 JP4098442B2 (en) 2008-06-11

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Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005276864A (en) * 2004-03-22 2005-10-06 Seiko Epson Corp Film forming method, film, electronic component and electronic apparatus
JP2007027384A (en) * 2005-07-15 2007-02-01 Ricoh Co Ltd Contact hole / interlayer insulating film forming method, contact hole / interlayer insulating film, display element, display device, semiconductor arithmetic element, and computer
JP2008286602A (en) * 2007-05-16 2008-11-27 Mec Kk Silane coupling agent film analysis method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005276864A (en) * 2004-03-22 2005-10-06 Seiko Epson Corp Film forming method, film, electronic component and electronic apparatus
JP2007027384A (en) * 2005-07-15 2007-02-01 Ricoh Co Ltd Contact hole / interlayer insulating film forming method, contact hole / interlayer insulating film, display element, display device, semiconductor arithmetic element, and computer
JP2008286602A (en) * 2007-05-16 2008-11-27 Mec Kk Silane coupling agent film analysis method

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