JP2001024183A - Power semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent degradation in breakdown voltage characteristics of a large-power device resulting from transformation of shallow-level carrier into donor caused by irradiation with light ion without performing selective irradia tion, optimization of irradiation conditions and annealing conditions or the like. SOLUTION: For example, the whole surface of a semiconductor wafer 10 is irradiated with alpha (4He2+) exhibiting an acceleration energy of 17MeV and a dose amount of 5×1010 cm2. In this way, an alpha irradiation area 11 at a deep level of impurity level is formed as lifetime control area in an n-type silicon substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for forming a lifetime control region in a high power device by irradiating light ion species.

[0002]

2. Description of the Related Art FIG. 9 is a sectional view showing a state in which a lifetime region is selectively formed in a large power element in a conventional power semiconductor device. In the figure, 1A is n ⁻
Type silicon substrate, 2A is PB layer, 3A is NE layer, 4A
Is a PE layer, 5A is an N ⁺⁺ layer, and 11A is a proton irradiation area corresponding to a lifetime control area. In the following description (including the case of the embodiment), the “lifetime control region” refers to, for example, an active region in a high-power element in which the lifetime of a carrier is shortened to improve switching characteristics. Area.

When the diffusion process is completed, each of the layers 2A, 3A,
A light ion species having a predetermined acceleration energy and a predetermined dose controlled for lifetime control, here a proton, is converted into a predetermined region for a reason described later with respect to the large power element formed with 4A and 5A. Is selectively irradiated by applying a mask. After the selective irradiation of protons, a heat treatment at, for example, 300 ° C. for one hour is performed to recover the crystallinity of the irradiated region. Thereby, a desired lifetime control area 11A is formed in the active area of the large power element.

[0004]

In the lifetime control region 11A formed by a conventional method using proton irradiation, carriers of impurity levels formed by proton irradiation are activated (donorized) by annealing after irradiation. ), As shown in FIG.
The mold has a higher carrier concentration than the other regions. For this reason, the carrier concentration of the n base layer (silicon substrate 1A in FIG. 9), which should have high resistance, locally increases, causing a problem that the breakdown voltage characteristics of the element deteriorate.

[0005] The formation of the donor depends on the activation energy of an impurity level formed in the band gap by proton irradiation. Originally, as an impurity level necessary for lifetime control, a deep order in a band gap called a deep level is used. However, in proton irradiation for lifetime control, a large number of shallow levels called activation levels, which are referred to as shallow levels, are formed at the same time as formation of a deep level (deep level). For this reason, this shallow order (shallow level) causes the first donor, which may have a bad influence on the breakdown voltage characteristics depending on the irradiation area. Therefore, in the prior art, in order to improve the breakdown voltage characteristics, a mask is selectively provided on a region where a shallow level is not likely to be generated (in the case of FIG. 9).
Also, treatments such as optimization of proton irradiation conditions and optimization of annealing conditions are performed.

The present invention has been made in view of such a situation, and an object of the present invention is to irradiate without using a mask, that is, while simplifying a process step for forming a lifetime control region. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the same, which are capable of improving element characteristics that are degraded due to light ion donor conversion.

[0007]

The invention according to claim 1 is
A power semiconductor device having a semiconductor wafer on which a large number of power semiconductor elements are formed, wherein the semiconductor wafer is irradiated by irradiating either the light ion species of 3 helium or alpha to the entire surface of the semiconductor wafer. It has a light ion species irradiation region formed therein.

The invention according to a second aspect is directed to a semiconductor device having a large number of power semiconductor elements formed on the entire surface thereof.
One of helium and alpha light ion species is irradiated at a predetermined acceleration energy and a predetermined dose, and the irradiated semiconductor wafer is heat-treated at a predetermined temperature.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present embodiment, based on an experimental result that deep levels are mainly formed when alpha (4He ²⁺ ) is irradiated into a semiconductor substrate among light ion species, Alpha or similar 3 helium (3He
²⁺ ) is irradiated to the entire surface of the semiconductor wafer with the light ion species. That is, the present invention is characterized in that irradiation of a predetermined light ion species for lifetime control is performed on the entire surface of the large power element, and the predetermined light ion species is irradiated on the entire surface of the semiconductor wafer with a predetermined light ion species. Irradiation with acceleration energy and predetermined dose, then
By subjecting the wafer to heat treatment at a predetermined temperature, a deep level necessary for lifetime control can be mainly formed, and activation of carriers that cause the formation of a donor is suppressed.

(Embodiment 1) Hereinafter, Embodiment 1 of the present invention will be described with reference to the drawings.

FIG. 1 shows the order of impurities formed in a band gap when a silicon substrate is irradiated with alpha or proton by using DLTS (Deep Level Transient Spectroscopy).
It is the result measured by y). In the case of proton irradiation, five impurity levels (L
1 to L5) are formed. Among them, three ranks L1 to L
3 corresponds to the shallow level, and the two ranks L4 and L5 correspond to the deep level. On the other hand, with alpha irradiation,
Three impurity levels (L1, L2, L4) are formed. It should be noted here that the two levels L1, L2 are at the shallow level, the level L4 is at the deep level, and proton irradiation is performed. This means that the number of shallow levels is small. Each "position in the band gap" in FIG. 1 means an energy gap between the bottom of the conduction band and each impurity rank.

FIGS. 2 and 3 show the above DL, respectively.
It is a figure which shows the density | concentration of each impurity level in the case of alpha irradiation and proton irradiation obtained by measuring by the TS method. In both FIGS. 2 and 3, the vertical axis represents D in an arbitrary unit.
An LTS signal is shown, and the peak or maximum value of the DLTS signal at each level corresponds to the density. The temperature on the horizontal axis indicates a value obtained by converting the above-mentioned “position in the band gap (eV)” of each level into a temperature. As is clear from the comparison between FIGS. 2 and 3, the concentration of the deep level L4 formed in the semiconductor wafer by the alpha irradiation is represented by D
While the LTS signal value is about 0.7, the DLTS signal values of deep level L4 and L5 formed in the semiconductor wafer by proton irradiation are about 0.2, respectively.
5, which is about 0.2, and the concentration of deep levels produced by alpha irradiation is about three times more than that of proton irradiation. Thus, it can be seen that the alpha irradiation mainly forms deep-level impurity levels.

As described above, carriers trapped in the order of impurities are activated by annealing performed to restore crystallinity after irradiation. However, since alpha irradiation has a feature that the order of the shallow level is relatively small and that the deep level can be formed mainly at a high density, it has been a problem conventionally by applying this point to the lifetime control. It can be understood that the low lifetime region of the large power element can be suppressed from being used as a donor without using a mask.

FIG. 4 is an enlarged sectional view showing a part (corresponding to a segment serving as a power semiconductor element) in a semiconductor wafer included in the semiconductor device according to the present embodiment.
1 shows a gate turn-off thyristor (hereinafter abbreviated as GTO) element in which an active region is formed on an n-type silicon substrate 1. In FIG. 1, reference numeral 1 denotes an n-type (n ⁻ ) silicon substrate, and 2 denotes a PB layer (p-type) formed by ion-implanting boron from the surface of the silicon substrate 1 into the substrate 1 and diffusing the implanted boron. Layers), 3 are NE layers (n ⁺ layers) formed by thermally diffusing phosphorus on the surface of the PB layer 2, and 4 are formed by ion-implanting boron from the back surface of the n ⁻ silicon substrate 1 into the inside thereof. The PE layer (p ⁺ layer) 5 is an N ⁺⁺ layer formed by thermally diffusing phosphorus on the back surface of the silicon substrate 1. The entire substrate having these parts 1 to 5 is referred to as a “semiconductor wafer 1.
0 ".

FIG. 5 shows a semiconductor wafer 10 or GT.
FIG. 2 is a top view schematically showing an O element, and is a cross-sectional view taken along a line I-II in FIG.
A longitudinal sectional view related to the line corresponds to FIG. 4 described above. As shown in FIG. 5, a plurality of NE layers 3 are formed concentrically on the surface of the semiconductor wafer 10 in parallel. That is, a segment (a power semiconductor element) having respective parts 1 to 5 respectively.
Are formed concentrically within the semiconductor wafer 10 in a plurality of stages.

In FIG. 5, on the surface of the semiconductor wafer 10 where the NE layer 3 is not formed (that is, on the surface of the PB layer 2 in FIG. 4), a control to be conducted to a gate electrode terminal (not shown). Gate electrode layer (not shown) is formed over the entire surface.

In FIGS. 4 and 5, a characteristic point is that the semiconductor wafer 10 extends over a certain area in the n ^- silicon substrate 1 over the entire cross section of the wafer 10 (a plane parallel to the plane of FIG. 5). Thus, a light ion species irradiation region, here, an alpha irradiation region (lifetime control region) 11 is formed.

In this embodiment, after each of the parts 1 to 5 is formed,
Charged particles with an acceleration energy of 17 MeV and a dose of 5 × 10 ¹⁰ cm ⁻² , for example, alpha, which is 4 helium ions, are irradiated over the entire surface of the n-type silicon substrate 1 or the semiconductor wafer 10 (in this case, alpha). , No mask is used). As a result, crystal defects in the silicon crystal occur in the alpha irradiation region 11. However, if the entire n-type silicon substrate 1 is heat-treated at, for example, 350 ° C. after the irradiation, the crystal defects caused by the entire alpha irradiation are recovered, and mainly the shallow-level carriers formed in the crystal by the irradiation become donors. . Moreover, as described above with reference to FIGS. 1 and 2, in the case of alpha irradiation, the number of shallow levels is smaller than in the case of proton irradiation, and the concentration of carriers at the deep level is much higher than in the case of proton irradiation. Become. This results in that the number of carriers that become donors in the n ^- silicon substrate 1 is significantly reduced as compared with the case of proton irradiation. This will be described below.

The carrier concentration in the depth direction (x direction) of the alpha irradiation region 11 formed as
(Sprending Resistance) method. FIG.
FIG. 4 is a diagram showing the relationship between the depth of the alpha irradiation region 11 and the carrier concentration, obtained as a result of measuring a sample for evaluation by the SR method. From this figure, 100 μm to 12 μm
Although the carrier concentration in the region of 0 μm is high (this region is the alpha irradiation region 11),
The carrier concentration increased by 1 is only 2 × 10 ¹³ cm ⁻³ . Note that the carrier concentration measured by the SR method indicates the carrier concentration converted into a donor by annealing.

[0020] On the other hand, the n-type silicon substrate, for example if the acceleration energy is selectively irradiated with proton dose is hydrogen ion 5 × ¹⁰ 10 cm ^-2 at 18MeV, as already described, the irradiated As a result, shallow-level carriers are mainly formed in the crystal, and these carriers become donors by annealing after irradiation. Therefore, the carrier concentration in the depth direction (x direction) of the proton irradiation region is measured by the SR method. FIG. 7 shows a proton irradiation area 11A in which a sample for evaluation was measured by the SR method.
FIG. 10 is a diagram showing the relationship between the depth of FIG. 9 and the carrier concentration. From this figure, the carrier concentration in the portion of 190 μm to 230 μm is high (this region is a proton irradiation region), and the carrier concentration is 5 × 10 ¹³ cm ⁻³ . Therefore, in the prior art using proton irradiation,
As described above, unless selective proton irradiation is performed or irradiation conditions and annealing conditions are optimized, deterioration in breakdown voltage characteristics cannot be prevented. In the above example, in order to form a lifetime control area,
Although protons having an acceleration energy of 18 MeV are selected, a similar donor is generated when a proton having an acceleration energy of 4.5 MeV is selected.

As is evident from the above comparative example (SR results when the same dose of alpha and proton were irradiated respectively), in the case of the present embodiment, the light ion It can be seen that the increase in the carrier concentration occurring in the seed irradiation region or the lifetime control region is about half. Thus, according to the present embodiment, even if alpha is applied to the entire surface of the semiconductor wafer without performing selective irradiation using a mask, carriers activated by annealing after irradiation are reduced to about half. It is confirmed that the power consumption is reduced, and when the selective irradiation and the optimization of the irradiation conditions are not performed as in the related art, the situation that the breakdown voltage characteristic of the high power element is deteriorated does not occur.

Finally, the semiconductor wafer 10 for GTO formed by using the above-described irradiation method according to the present embodiment, ie, the n ^- type silicon substrate, is mainly filled with deep level impurity levels. The GTO semiconductor wafer 10 having the lifetime control region formed entirely on the cross section of the semiconductor substrate is pressure-welded between a pair of main electrodes to assemble a pressure-contact high-power semiconductor device. An example of the press-contact type high-power semiconductor device 20 after assembly is shown in a longitudinal sectional view of FIG. Although the example of FIG. 8 shows a type in which a gate electrode is provided at the center of the surface or upper surface of the semiconductor wafer, the type in which a gate electrode is provided along the outer peripheral edge of the surface of the semiconductor wafer is shown. May be.

In FIG. 8, each reference numeral indicates the following. That is, 21 is a cathode electrode, 22 is an anode electrode,
24 is a cathode heat compensator, 23 is an anode heat compensator, 1
Reference numeral 0 denotes the semiconductor wafer shown in FIGS. 4 and 5 pressed against both electrodes 21 and 22 via both heat compensating plates 23 and 24, 26 denotes a center gate electrode, and 27 transmits a gate signal input from the outside. The gate lead wire 25 is an insulating cylinder for hermetically sealing the press-contact type semiconductor device 20. One end of the gate lead wire 27 is fixed to the outer peripheral surface of the center gate electrode 26 by brazing, and the other end is inserted into a through hole in the insulating cylinder 25 and fixed by brazing. The gate lead wire 27 is a metal conductor bar (round bar) having a circular cross section, and is made of, for example, Ag.

Next, the operation of the device 20 will be described. From outside, the cathode electrode 21 and the anode electrode 22
Are pressed into contact with the cathode electrode 21 and the anode electrode 2.
2. The cathode heat compensator 24, the anode heat compensator 23, and the semiconductor wafer 10 are in a contact state. Thereby, an external gate signal is transmitted from the gate lead line 27 to the center gate electrode 26, and the PB layer 2 in the semiconductor wafer 10 is
A gate signal is sent to (FIG. 4). At this time, when the gate signal is an ON signal, each segment in the semiconductor wafer 10 becomes conductive, and a main current or an anode current can flow from the anode electrode 22 to the cathode electrode 21.

Conversely, when the gate signal is an off signal, the semiconductor wafer 10 is in a blocking state (at this time, the lifetime control region 11 acts to reduce the turn-off time), and the pressure contact type semiconductor With the device 20, the main current can be stopped.

With the above operation, the pressure contact type semiconductor device 20 enables large-capacity current control.

(Supplementary Note) (1) In the first embodiment, the case where alpha (4He ²⁺ ) is used as the light ion species has been described, but 3 helium ions (3He ²⁺ ) may be used as the light ion species. In this case, since only the mass number is different, the same effect can be expected by irradiating the entire surface of the semiconductor wafer with 3 helium ions without using a mask.

(2) In each of the above examples, a semiconductor wafer as a GTO thyristor element has been described.
The present invention relates to a GCT (Gate Commutated Turn-Off) thyristor element (for example, PP61-66 of Mitsubishi Electric Technical Report Vol.71 NO.12).
Reference) can also be applied to a semiconductor wafer.

(3) The semiconductor device is not limited to the pressure-contact type.

[0030]

According to the first and second aspects of the present invention, alpha or 3 helium is selected as a light ion species for irradiating the entire surface of the semiconductor wafer for the purpose of controlling the lifetime, thereby forming the light ion species in the semiconductor wafer. Can be sufficiently suppressed from becoming a donor in a low lifetime region.
Therefore, without taking measures such as selective irradiation using a mask or optimizing irradiation conditions and annealing conditions, it is possible to effectively solve the deterioration of the breakdown voltage characteristic caused by the formation of the donor while achieving a significant simplification of the process steps. The effect that it can be obtained is obtained.

[Brief description of the drawings]

FIG. 1 is a comparative diagram showing the order of impurities formed in a band gap by alpha irradiation or proton irradiation.

FIG. 2 is a diagram showing a measurement result by DLTS in the case of alpha irradiation.

FIG. 3 is a diagram showing a measurement result by DLTS in the case of proton irradiation.

FIG. 4 is a longitudinal sectional view showing a configuration of an arbitrary segment in the semiconductor wafer for GTO according to the first embodiment of the present invention.

FIG. 5 is a top view showing the GTO semiconductor wafer according to the first embodiment of the present invention.

FIG. 6 is a diagram showing a carrier concentration distribution in the depth direction of the n-type silicon substrate when the carrier concentration in the alpha irradiation region of the evaluation sample according to the first embodiment of the present invention is measured by the SR method.

FIG. 7 is a diagram illustrating a carrier concentration in a depth direction of an n-type silicon substrate when a carrier concentration in a proton irradiation region of an evaluation sample is measured by an SR method.

FIG. 8 is a longitudinal sectional view showing an example of a press-contact type high-power semiconductor device incorporating the GTO semiconductor wafer according to the first embodiment of the present invention.

FIG. 9 is a longitudinal sectional view showing a configuration example of an arbitrary segment in a GTO semiconductor wafer according to the related art.

[Explanation of symbols]

Reference Signs List 1 n-type (n ⁻ ) silicon substrate, 2 PB (p-type base) layer, 3 NE (n-type emitter) layer, 4 PE (p-type emitter) layer, 5 N ⁺⁺ layer, 10 semiconductor wafer, 11
Lifetime control area (alpha irradiation area), 11A Lifetime control area (proton irradiation area), 20 pressure contact type high power semiconductor device.

Claims (2)

[Claims] 1. A power semiconductor device having a semiconductor wafer on which a large number of power semiconductor elements are formed, wherein one of a light ion species of 3 helium and alpha is irradiated on the entire surface of the semiconductor wafer. A power semiconductor device having a light ion species irradiation region formed in the semiconductor wafer. 2. A method for irradiating the entire surface of a semiconductor wafer on which a large number of power semiconductor elements are formed with a light ion species of either 3 helium or alpha at a predetermined acceleration energy and a predetermined dose, A method for manufacturing a power semiconductor device, wherein the semiconductor wafer after irradiation is heat-treated at a predetermined temperature.