JP2001005037A - Liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device improved in display quality by arranging a means for providing the device with an opposite characteristic to a parasitic capacitance characteristic dependent on a voltage between a gate electrode and a pixel electrode of a thin film transistor. SOLUTION: Between a gate electrode and a source electrode of a thin film transistor TFT, namely, in parallel with parasitic capacitance Cgs, an additional capacitance element Creverse is arranged. This additional capacitance Creverse has an opposite characteristic to that of the parasitic capacitance Cgs, and when a voltage Vgs is in the neighborhood of a certain value or lower, the capacitance has a value of +β, and when the voltage Vgs is in the neighborhood of the value or higher, the capacitance has a value of +α. As a result, the capacitance produced between the gate electrode and the source electrode of the thin film transistor TFT is the sum of the individual capacitance of the parasitic capacitance Cgs and the additional capacitance element Creverse, and loses the voltage dependency. Therefore, picture quality can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display called an active matrix type.

[0002]

2. Description of the Related Art In a liquid crystal display device of this type, a scanning substrate extending in the x direction and juxtaposed in the y direction is formed on a liquid crystal side surface of one of the transparent substrates opposed to each other via a liquid crystal. A pixel region is formed in each region surrounded by the signal line and the video signal line extending in the y direction and juxtaposed in the x direction. In each of the pixel regions, the pixel region is driven by supplying a scanning signal to a scanning signal line. And a pixel electrode to which a video signal from a video signal line is supplied via the thin film transistor. In the liquid crystal display device having such a configuration, when the thin film transistor is turned off (when the scanning signal changes from a high level to a low level), the gate electrode and the source electrode (electrode connected to the pixel electrode) of the thin film transistor are formed. The voltage applied to the pixel electrode has a potential drop component ΔV with respect to the level of the video signal at the time of writing due to the parasitic capacitance Cgs. For this reason, in each pixel region, a storage capacitance element Cadd is formed between the pixel electrode and, for example, the other scanning signal line adjacent to the pixel electrode, thereby reducing the above-described potential drop component ΔV. Further, in order to prevent the polarization of the liquid crystal, the polarity of the video signal supplied in synchronization with the timing of the periodically supplied scanning signal is switched, for example, in each cycle so that the polarity is positive / negative. Drive is being performed.

[0003]

However, in the liquid crystal display device having such a configuration, the potential drop component ΔV of the video signal written to the pixel electrode when the thin film transistor is off when the video signal has a positive polarity, and the negative electrode component It has been confirmed that the potential drop component ΔV ′ of the video signal written to the pixel electrode when the thin film transistor is off in the case of the property is different from each other. In such a case, there is a difference in the integrated value between a case where the video signal has a positive polarity and a case where the video signal has a negative polarity, which causes a change in the effective voltage. Fluctuates and causes an adverse effect on the display. The present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display device having improved display quality.

[0004]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. That is, the liquid crystal display device according to the present invention has, between a thin film transistor for supplying a video signal to a pixel electrode and a gate electrode and a pixel electrode of the thin film transistor, a characteristic opposite to a parasitic capacitance characteristic depending on a voltage between them. And means for providing. When the video signal has a positive polarity and a negative polarity, the potential drop components ΔV and ΔV ′ of the video signal caused by the parasitic capacitance Cgs of the thin film transistor are equal to the parasitic capacitance Cgs.
It has been confirmed that the capacitance value of gs is dependent on the voltage. Therefore, the parasitic capacitance Cgs
By providing means having characteristics opposite to those of
The voltage dependency of the parasitic capacitance Cgs is reduced. As a result, the potential drop components ΔV and ΔV ′ have substantially the same value, and there is no change due to the gradation level, the difference in the horizontal direction of the panel, and the like, so that the display image quality can be improved.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the liquid crystal display device according to the present invention will be described below with reference to the drawings. << Equivalent Circuit >> FIG. 1 is a diagram showing an embodiment of an equivalent circuit in a pixel region of a liquid crystal display device according to the present invention. The figure is a circuit diagram, but is drawn corresponding to an actual geometric arrangement.

In FIG. 1, there are scanning signal lines Gi-1 and Gi extending in the x direction and juxtaposed in the y direction.
When a scanning signal is supplied to i, the thin film transistor TFT (switching element) is turned on. Further, there are video signal lines Di and Di + 1 extending in the y direction in the figure and arranged in parallel in the x direction.
The video signal from i is supplied to the pixel electrode PIX via the thin film transistor TFT. There is a common electrode COM opposed to the pixel electrode PIX via a liquid crystal, and an electric field is generated between these electrodes to control the light transmittance of the liquid crystal.

A voltage which is a reference for a video signal is applied to the common electrode COM, and the pixel electrode PIX is provided between the common electrode COM and the pixel electrode PIX.
An electric field corresponding to the video signal supplied to the device is generated. Also, the pixel electrode PIX and the scanning signal line Gi-
1, a storage capacitor Cadd is provided.

In this embodiment, the thin film transistor TFT has an n-channel MIS structure, and a parasitic capacitance Cgs is provided between its gate electrode and a source electrode (electrode connected to the pixel electrode PIX). And its capacitance value has a voltage dependency, and as shown in FIG.
The characteristics are such that the voltage Vgs between the gate electrode and the source electrode changes stepwise when it is small and when it is large. That is, when the voltage Vgs is equal to or less than a certain value, the capacitance has a value of + α, and when the voltage Vgs is equal to or more than a certain value, the capacitance has a value of + β.

In this embodiment, the additional capacitance element Crev is provided between the gate electrode and the source electrode of the thin film transistor TFT, that is, in parallel with the parasitic capacitance Cgs.
erse is provided. This additional capacitance element Creverse has a characteristic opposite to that of the parasitic capacitance Cgs, and as shown in FIG. 1B, when the voltage Vgs is less than a certain value or less, the capacitance has a value of + β, and If Vgs is greater than or equal to a certain value, the capacitance is +
It has a value of α. Thereby, the capacitance generated between the gate electrode and the source electrode of the thin film transistor TFT becomes a value obtained by adding the parasitic capacitance Cgs and each capacitance of the additional capacitance element Creverse, as shown in FIG. It will not last.

In this embodiment, the additional capacitance element C
The reverse has completely opposite characteristics to the parasitic capacitance Cgs, and when those capacitances are added, the voltage has no voltage dependency. However, the present invention is not necessarily limited to such a case. By providing the additional capacitance element Cverse, the parasitic capacitance Cgs
This is because if the voltage dependence of the present invention can be reduced even a little, the effect of the present invention can be achieved in accordance with the degree.

<< Operation of TFT >> Next, the operation of the thin film transistor TFT will be described with reference to FIG. The thin film transistor TFT is turned on (the resistance between the source and the drain is reduced) by biasing the gate electrode with a positive voltage with respect to the source electrode, and is turned off by reducing the bias supplied to the gate electrode to near zero. State (the resistance value between the source and the drain increases).

A pixel coupled to the scanning signal line Gi selected according to the high level of the scanning signal VG is connected to the video signal line Di.
The video signal VD supplied from is written. At this time, as shown by a dotted line in FIG. 3A, the voltage PXV of the pixel is changed when the TFT in the ON state has a resistance component and the pixel is a capacitive element (Cpix). Stand up according to a constant. In the figure, first, a video signal VD of a positive level that brings a pixel into a high gradation state is shown.

According to the selection of the scanning signal line of the next stage, FIG.
The scanning signal VG shown in (a) is changed from a high-level selection level to a low-level non-selection level. As a result, the TFT is turned off, and the written video signal VD is held in the pixel acting as a capacitive element. In response to the switching of the scanning signal VG from the high level to the low level, a potential drop component ΔV occurs in the pixel voltage due to the capacitance between the source electrode and the gate electrode of the TFT.

In this case, as described above, the capacitance between the source electrode and the gate electrode of the TFT is a combined capacitance of the parasitic capacitance Cgs and the additional capacitance Creverse provided in this embodiment, and is a constant capacitance independent of voltage. Value. For this reason, the potential drop component ΔV is generated according to the fixed capacitance value.

When the scanning signal VG is switched from low level to high level, the voltage jumping into the pixel due to the gate-source coupling Cgs can be canceled by writing the video signal VD from the video signal line. The voltage that jumps into the pixel when the signal VG switches from the high level to the low level cannot be canceled by writing the video signal VD. FIG. 3A illustrates that a video signal VD of a low gradation level is supplied for one frame thereafter.

Generally, since the liquid crystal display device is driven by an alternating current, the polarity of the video signal VD is switched and supplied as positive / negative in each cycle of the scanning signal VG. Also in this case, since the TFT in the ON state has a resistance component and the pixel is a capacitive element, the voltage PXV of the pixel falls according to the corresponding time constant.

In response to the selection of the next scanning signal line, the scanning signal VG shown in FIG. 1 is changed from the high level selection level to the low level non-selection level. With this, TFT
Is turned off, the video signal VD is held in the pixel acting as a capacitive element.

In accordance with the switching of the scanning signal VG from the high level to the low level, the voltage PXV of the pixel has a potential drop component ΔV due to the capacitance between the gate electrode and the source electrode of the TFT as described above. In this case, the capacitance between the source electrode and the gate electrode of the TFT is a combined capacitance of the parasitic capacitance Cgs and the additional capacitance element Creverse provided in this embodiment, and has a constant capacitance value independent of voltage.
For this reason, the potential drop component ΔV is generated according to this fixed capacitance value, and has the same value as the potential drop component ΔV in the case of a video signal having a positive polarity.

For comparison, the additional capacitance element Crever
In the case where the “se” is not provided, the timing chart corresponding to FIG. 3A is as shown in FIG. 3B, and the potential drop component in the case of the negative polarity of the video signal line is ΔV ′ (> ΔV). As a result, there arises a disadvantage that the effective voltage values are different in the video signal in each case of the positive polarity and the negative polarity. Since the amount of this variation is variable with respect to (1) a change in the video signal VD due to the gray scale display level, (2) a signal delay of the scanning signal VG due to a difference between the left and right panels, and (3) a variation in manufacturing of the TFT element size, image quality is poor. Occurs.

As in the case of the positive polarity, the scanning signal VG
By switching from the low level to the high level, the voltage jumping into the pixel due to the coupling Cgs between the gate and the source can be canceled by writing the video signal VD from the video signal line. The voltage that jumps into the pixel at the time of switching cannot be canceled by writing the video signal VD. For this reason, even in the case of the negative polarity, similarly to the case of the positive polarity, the voltage jumping into the pixel due to the coupling Cgs between the gate and the source lowers the voltage PXV of the pixel in the negative direction. FIG. 3A illustrates that the video signal VD having a low gray level is supplied during one frame thereafter.

As described above, when the scanning signal VG changes from the high level to the low level in both the positive polarity and the negative polarity of the liquid crystal AC drive, the parasitic capacitance Cgs between the gate electrode and the source electrode of the TFT causes the pixel voltage PXV to be: With respect to the level of the video signal VD at the time of writing, a potential drop component ΔV occurs as shown by a dotted line in FIG. Therefore, the bias voltage Vcom applied to the common electrode COM of the liquid crystal display device is substantially between the positive polarity and the negative polarity of the voltage PXV of the pixel as shown by a two-dot chain line in FIG. It is set to an intermediate level (optimal common electrode voltage).
That is, by applying an optimum common electrode voltage to the common electrode COM in consideration of the potential drop ΔV of the pixel voltage PXV, it is possible to perform a substantially AC drive of the liquid crystal.

<< Operation of Storage Capacitance Element >> Storage Capacitance Element Ca
dd is a potential change Δ of the scanning signal with respect to the pixel electrode potential PXV when the thin film transistor TFT switches.
It works to reduce the effect of VG. This situation is expressed by the following equation (1).

[0023]

ΔV = {Cgs / (Cgs + Cds1 + Cds2 + Cadd + Cpix)} × ΔVG (1) Here, ΔV is the potential change ΔVG of the scanning signal described above.
Represents a potential decrease component ΔV of the pixel voltage PXV. Although this potential drop component ΔV causes a DC component applied to the liquid crystal, the larger the storage capacitor Cadd, the smaller the potential drop component ΔV of the pixel voltage PXV can be made. In addition, the storage capacitance element Cadd also has a function of prolonging the discharge time, and stores video information after the thin film transistor TFT is turned off for a long time. The reduction of the DC component applied to the liquid crystal can improve the life of the liquid crystal and reduce so-called image sticking in which a previous image remains when the liquid crystal display screen is switched.

<< Pixel Configuration >> FIG. 4 is a plan view showing the configuration of a region corresponding to one pixel based on the above equivalent circuit. The figure shows one of a pair of transparent substrates opposed to each other via a liquid crystal (usually called a TFT substrate).
FIG. 3 is a view as viewed from a liquid crystal side surface of FIG.

First, scanning signal lines Gi-1 and Gi extending in the x direction in the drawing and juxtaposed in the y direction are formed on the surface of the transparent substrate. These scanning signal lines Gi-1 and Gi are formed of, for example, a chromium layer, and a scanning signal is supplied from outside the display area which is a set of pixels. An insulating film IN made of, for example, SiN is formed on the surface of the transparent substrate on which the scanning signal lines Gi-1 and Gi are formed as described above so as to cover the scanning signal lines Gi-1 and Gi. The insulating film IN is formed of a video signal line Di, Di described later.
For +1, a function as an interlayer insulating film with the scanning signal lines Gi-1, Gi, a function as a gate insulating film in a region for forming a thin film transistor TFT described later, and a dielectric in a region for forming a capacitive element Cadd described later. It has a function as a film.

The thin film transistor TFT has a scanning signal line G
An MIS transistor having an inverted staggered structure in which a part of i is formed as a gate electrode. That is,
A semiconductor layer AS made of, for example, a-silicon is formed so as to overlap a part of the scanning signal line Gi via the insulating film IN, and a drain electrode SD2 is formed on the surface of the semiconductor layer AS.
And the source electrode SD1 is formed. In this embodiment, the semiconductor layer A
S is formed with a slightly larger area, and an additional capacitance element Cr is formed on the semiconductor layer AS together with the thin film transistor TFT.
The verses are formed side by side.

FIG. 5A is an enlarged view of this portion, and FIG. 5B is a cross-sectional view taken along the line bb. That is, the semiconductor layer AS has a thin-film transistor TFT formation region on the left side in the figure and an additional capacitance element Cre on the right side.
This is a region for forming a “verse”. In this case, the thin film transistor TFT is of an n-channel type, and the additional capacitance element Reverse is configured so that the drain electrode and the source electrode thereof are connected to the structure of the p-channel thin film transistor, and connection is unnecessary. That is, these equivalent circuits are shown in FIG.

In FIG. 5A, a thin film transistor T
A drain electrode SD2 and a source electrode SD1 are formed in the FT formation region. Also, the additional capacitance element Cre
The drain electrode SD4 and the source electrode SD3 are formed in the region where the version is formed. In this case, the source electrode SD1 of the thin film transistor TFT and the additional capacitance element C
The drain electrode SD4 of reverse is common.

Here, an ohmic contact layer OC2 (under the drain electrode SD2) doped with an n-type impurity and an OC1 (under the source electrode SD1) are formed at the interface between the formation region of the thin film transistor TFT and each electrode of the semiconductor layer AS. ) Is formed, and the additional capacitance element Creverse is formed.
An ohmic contact layer OC4 doped with a p-type impurity is formed at the interface between the formation region of the semiconductor layer AS and each electrode.
(Under the drain electrode SD4), OC3 (source electrode S
D3).

Such an ohmic contact layer is formed as follows. First, the surface of the semiconductor layer AS is selectively doped with an n-type impurity on the left side in the figure, and then selectively doped with a p-type impurity on the right side in the figure. After the formation of such an ohmic contact layer, each electrode is formed on the surface in the pattern shown in FIG. 5A, and the ohmic contact layer exposed from these electrodes is etched using these electrodes as a mask. . Each electrode in this case is formed simultaneously with the formation of the video signal lines Di and Di + 1 made of, for example, chromium. Video signal lines Di, Di + 1
Are formed so as to extend in the y direction in the figure and be juxtaposed in the x direction,
The drain electrode SD2 of the TFT is formed by partially extending the upper surface of the semiconductor layer.

Since the polarity of the circuit of the liquid crystal display device is reversed during operation, the source and drain are switched during operation. However, in this specification, one is fixed and the other is fixed as a drain for convenience. At the same time as the formation of the drain electrode SD2, the source electrode SD1 of the TFT and Crevase
Are formed. The source electrode SD1 is an electrode connected to a pixel electrode PIX to be described later, and is adjacent to the scanning signal lines Gi-1 and G-1.
It is formed to extend to a region surrounded by i and the video signal lines Di and Di + 1.

Then, as described above, the thin film transistor TF
A protective film PAS made of, for example, SiN covers the thin film transistor TFT on the surface of the transparent substrate on which the T is formed.
Are formed. The protective film PAS can prevent direct contact of the thin film transistor TFT with the liquid crystal to stabilize its characteristics.

In this case, the protective film PAS is provided between the scanning signal lines Gi-1 and Gi and the video signal lines Di and D adjacent to each other.
a contact hole C exposing a part of the extension of the source electrode SD1 of the TFT in a region surrounded by i + 1
ON1 is formed. This is for connection with the pixel electrode PIX described below.

The pixel electrode PIX is located on the upper surface of the protective film PAS and surrounded by the adjacent scanning signal lines Gi-1 and Gi and the video signal lines Di and Di + 1.
Are formed. In this case, the pixel electrode PIX is connected to the source electrode SD1 through the contact hole CON1.

The pixel electrode PIX is made of, for example, ITO (Indi
It consists of a transparent electrode made of a um-Tin-Oxide) film, and is configured as one electrode for generating an electric field that changes the light transmittance of the liquid crystal. Further, an alignment film OR is formed on the entire surface (at least the display area) of the surface of the transparent substrate on which the pixel electrodes are formed. This alignment film OR is a film that contacts the liquid crystal and regulates the initial alignment direction of the molecules of the liquid crystal.

In the TFT substrate thus formed, a so-called filter substrate is arranged via a liquid crystal, and a black matrix defining a pixel area is provided on the liquid crystal side surface of the substrate. A color filter is formed in the opening of the pixel, that is, a portion substantially serving as a pixel area, and a common electrode (transparent electrode) common to each pixel is formed over the entire area (at least the display area). A film is formed.

In this embodiment, it goes without saying that the configuration of the additional capacitance element Creverse is not necessarily limited to that shown in FIG. This is because other various configurations are conceivable. The point is that a means for reducing the voltage dependence of the parasitic capacitance between the gate electrode and the pixel electrode of the thin film transistor TFT may be provided. In the above-described embodiment, the liquid crystal display device is of a so-called vertical electric field type, but it is needless to say that the present invention can be applied to a so-called horizontal electric field type. This is because the situation is completely the same in the conventional inconvenience relating to the parasitic capacitance of the thin film transistor even in the in-plane switching method.

[0038]

As is apparent from the above description,
According to the liquid crystal display device of the present invention, the display quality can be improved.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram showing one embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is an explanatory diagram showing an effect of the liquid crystal display device according to the present invention.

FIG. 3 is a timing chart showing an operation of the liquid crystal display device according to the present invention.

FIG. 4 is a plan view showing one embodiment of a pixel configuration of the liquid crystal display device according to the present invention.

5 is an enlarged plan view and a sectional view of a part of FIG. 4;

FIG. 6 is an equivalent circuit diagram showing a thin film transistor and an additional capacitance element connected to the thin film transistor.

[Explanation of symbols]

TFT: thin film transistor, Cgs: parasitic capacitance, C
reverse: additional capacitance element, Cpix: pixel electrode.

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[Procedure amendment]

[Submission date] August 4, 1999 (1999.8.4)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0027

[Correction method] Change

[Correction contents]

FIG. 5A is an enlarged view of this portion, and FIG. 5B is a cross-sectional view taken along the line bb. That is, the semiconductor layer AS has a thin-film transistor TFT formation region on the left side in the figure and an additional capacitance element Cre on the right side.
This is a region for forming a “verse”. In this case, the thin film transistor TFT is a n-channel type, the additional capacitance element Creverse is by connecting the drain electrode and the source electrode to the structure of the p-channel type thin film transistor, and a configuration. That is, these equivalent circuits are shown in FIG.

Continuation of the front page F term (reference) 2H092 HA04 JA24 JA26 JA47 KA24 KB04 NA01 NA23 2H093 NA16 NA32 NC34 NC35 NC67 ND15 ND35 ND60 NE03 5C058 AA06 AB02 BA02 BA06 5C094 AA13 AA21 AA53 BA03 BA43 CA19 DB04 DB10 EA04 CC FF03 GG02 GG15 HK04 HK08 HK21 NN02 NN24 NN72 NN73

Claims (2)

[Claims] 1. A thin film transistor for supplying a video signal to a pixel electrode, and means provided between the gate electrode and the pixel electrode of the thin film transistor and having a characteristic substantially opposite to a parasitic capacitance characteristic depending on a voltage between the thin film transistor and the pixel electrode. A liquid crystal display device comprising: 2. A thin film transistor for supplying a video signal to a pixel electrode, and an additional capacitance element provided between the gate electrode and the pixel electrode of the thin film transistor for reducing the voltage dependency of a parasitic capacitance therebetween. A liquid crystal display device comprising: