JP2000358039A - Information processor, information processing method and medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent resources of an IEEE1394 bus from being uselessly controlled. SOLUTION: When controlling a target 22 from a set-up box 24 through an IEEE1394 bus 21, an application 42 requests Connect processing to the target 22 to an IEEE1394 module 44. When this request is received and the target 22 is a device which requires Reserve processing, the IEEE1394 module 44 performs this processing and further, when Reserve processing is successful, processing for securing the band or channel of the IEEE1394 bus 21 is performed. When both the processings are successful, the IEEE1394 module 44 outputs the message of a reservation success to the application module 42. When the message of the reservation success is received, the application module 42 performs the transfer of data with the target 22 from the IEEE1394 module 44 through the IEEE1394 bus 21.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus, a method, and a medium, and more particularly to an information processing apparatus, a method, and a medium capable of effectively utilizing resources connected to a bus. .

[0002]

2. Description of the Related Art Recently, IEEE (Institute of Electrical
and Electronic Engineers) The 1394 high-speed serial bus is becoming widespread. This IEEE 1394 high-speed serial bus (hereinafter, simply referred to as IEEE 1394 bus) 1 includes FIG.
As shown in (1), a plurality of nodes (information processing devices) are connected, and information can be exchanged between the nodes. IEEE1
Among the nodes connected to the 394 bus 1, a node that controls another node is called a controller, and a node controlled by the controller is called a target.
In the example of FIG. 1, the controller 2 and the controller 3
Is configured to control the target 4 via the IEEE 1394 bus 1.

[0003]

By the way, in order for the controller to control the target, if the target is a node requiring a reserve process,
It is necessary to perform this Reserve processing in advance. This Reserve
The process is a process necessary for the controller to acquire the control right of the target.

In order for the controller to transmit and receive information to and from the target, PtoP processing is required. This PtoP processing means that an IEEE
This is a process necessary for exchanging information via the 1394 bus 1, for example, a process for securing a channel or a band or setting a plug control register.

Conventionally, this Reserve processing and PtoP processing are
When giving and receiving information, each was done individually. As a result, for example, the controller 2 succeeds in PtoP processing on the target 4 but fails in the Reserve processing. In contrast, the controller 3 succeeds in Reserve processing on the target 4 but performs PtoP processing on the target 4. May fail. In this case, the controller 2
Although information can be transferred to the target 4, the target 4 cannot be controlled. On the other hand, the controller 3 can control the target 4 but cannot transfer information.

In such a case, neither the controller 2 nor the controller 3 can substantially cause the target 4 to execute a desired operation. as a result,
There is a problem that resources (nodes) on the IEEE 1394 bus 1 are uselessly controlled, and it becomes impossible for other nodes to use the nodes (targets).

The present invention has been made in view of such a situation, and performs a Reserve process and a PtoP process in association with each other so that nodes on a bus can be used efficiently. Things.

[0008]

According to the first aspect of the present invention, there is provided an information processing apparatus, comprising: receiving means for receiving a control instruction for another information processing apparatus; and receiving means for receiving a control instruction for the other information processing apparatus. At first, one of the first reservation processing for setting another information processing apparatus as a control target and the second reservation processing for exchanging information with another information processing apparatus via a bus is performed. A second reservation unit that performs the other of the first reservation process and the second reservation process when the reservation process by the first reservation unit succeeds; and a first reservation unit. Output means for outputting a reservation success signal when both the reservation by the reservation and the reservation by the second reservation means are successful, and outputting a reservation failure signal when at least one of the reservations is not successful. And

[0009] The bus may be an IEEE 1394 high speed serial bus.

The first reservation process can be a Reserve process on the IEEE 1394 high-speed serial bus, and the second process can be a process for reserving the band and channel of the IEEE 1394 high-speed serial bus.

[0011] The information processing apparatus may further include a storage unit for storing a reservation result by the first reservation unit and a reservation result by the second reservation unit.

When the other information processing device is changed, the first reservation means and the second reservation means store another information processing apparatus before the change in accordance with the reservation result stored in the storage means. The first reservation processing and the second reservation processing for the device are canceled, and the first reservation processing and the second reservation processing are respectively performed for the other changed information processing apparatuses. it can.

When the bus is reset, the first reservation unit and the second reservation unit correspond to the first reservation information stored in the storage unit and correspond to the first reservation information for another information processing apparatus. The reservation process or the second reservation process can be executed again.

According to a seventh aspect of the present invention, there is provided an information processing method, comprising: a receiving step of receiving a control instruction for another information processing apparatus; and receiving a control instruction for another information processing apparatus by the processing of the receiving step. A first reservation step for performing one of a first reservation process for controlling the information processing device and a second reservation process for exchanging information with another information processing device via a bus; When the reservation processing by the processing of the first reservation step is successful, the second reservation step of performing the other reservation processing of the first reservation processing and the second reservation processing, and the reservation by the first reservation step And outputting a reservation success signal when both of the reservations by the second reservation step are successful, and outputting a reservation failure signal when at least one of the reservations is not successful. It is characterized in.

According to another aspect of the present invention, there is provided a program for a medium, comprising: a receiving step of receiving a control instruction for another information processing apparatus; A first reservation step for performing one of a first reservation process for controlling the information processing device and a second reservation process for exchanging information with another information processing device via a bus; When the reservation processing by the processing of the first reservation step is successful, the second reservation step of performing the other reservation processing of the first reservation processing and the second reservation processing, and the reservation by the first reservation step An output step of outputting a reservation success signal when both of the reservations in the first and second reservation steps are successful, and outputting a reservation unsuccessful signal when at least one of the reservations is not successful. Characterized in that it contains.

According to a ninth aspect of the present invention, in the information processing apparatus, output means for outputting a control command to another information processing apparatus to an interface, and in response to the command output by the output means,
Based on a result of a first reservation process performed by the interface for controlling another information processing device as a control target and a second reservation process for exchanging information with another information processing device via a bus. Receiving means for receiving a reservation signal output by the interface, indicating that both have succeeded, or that at least one has not succeeded, and, in response to the reservation signal received by the receiving means, receiving another via the bus. It is characterized by comprising an information processing device and a transmitting and receiving means for transmitting and receiving information.

According to a tenth aspect of the present invention, in the information processing method, the interface performs an output step of outputting a control instruction to another information processing apparatus to the interface, and the instruction corresponding to the instruction output in the processing of the output step. An interface is output based on the results of a first reservation process for controlling another information processing device as a control target and a second reservation process for exchanging information with another information processing device via a bus. Receiving a reservation signal indicating that both have succeeded, or at least one has not succeeded, and performing other information processing via the bus in response to the reservation signal received by the processing of the receiving step. The method includes a transmitting and receiving step of transmitting and receiving information to and from the device.

[0018] The program of the medium according to claim 11 is:
An output step of outputting a control command to another information processing device to the interface, and the interface performing the command in response to the command output by the output step processing;
The interface outputs based on a result of a first reservation process for controlling another information processing device as a control target and a second reservation process for exchanging information with another information processing device via a bus. Receiving a reservation signal indicating that both have succeeded or that at least one has not succeeded, and responding to the reservation signal received by the processing of the receiving step, the other information processing device via the bus And sending and receiving information.

An information processing apparatus according to claim 12 is a first information processing apparatus.
Means for transmitting a control command to another information processing apparatus in the second
A first output means for outputting to the means of the first means, and a first reservation for the other information processing apparatus to be controlled by the second means in response to the command outputted by the first output means. Processing,
Based on the result of a second reservation process for exchanging information with another information processing device via a bus, the second means outputs, that both have succeeded, or that at least one has not succeeded First receiving means for receiving a reservation signal representing the following, and corresponding to the reservation signal received by the first receiving means,
A second means for transmitting / receiving information to / from another information processing apparatus via a bus, wherein the second means receives a control command for the other information processing apparatus output from the first output means; A second reservation unit for performing, when the second reception unit receives a control instruction for another information processing apparatus, a first reservation process for setting another information processing apparatus as a control target; To exchange information with other information processing devices
First reservation means for performing one of the reservation processes of
When the reservation processing by the reservation means is successful, the second reservation means for performing the other reservation processing of the first reservation processing and the second reservation processing; the reservation by the first reservation means and the second reservation A second output unit that outputs a reservation signal to the first receiving unit in accordance with a result of the reservation by the unit.

[0020] The information processing method according to the thirteenth aspect is characterized in that:
The information processing method according to the first aspect includes a first output step of outputting a control instruction to another information processing apparatus to the second means, and a first output step corresponding to the instruction output by the processing of the first output step. The results of the first reservation processing for controlling another information processing apparatus by the second means and the second reservation processing for exchanging information with another information processing apparatus via a bus are described below. A first receiving step of receiving a reservation signal output by the second means, indicating that both have succeeded, or at least one has not succeeded, based on the first means;
The information processing method of the second means includes a second means and a transmitting / receiving step of transmitting / receiving information to / from another information processing device via the bus in response to the reservation signal received by the processing of the receiving step. Receiving the control instruction for the other information processing apparatus output by the processing of the first output step,
Receiving a control instruction for another information processing device by the processing of the second receiving step, receiving a command for controlling another information processing device, and performing a first reservation process for controlling the other information processing device via a bus. A first reservation step for performing one of a second reservation process for exchanging information with another information processing device, and a first reservation process when the reservation process by the first reservation step is successful. A second reservation step for performing the other reservation processing of the second and the second reservation processing; and a reservation signal corresponding to the result of the reservation by the processing of the first reservation step and the result of the reservation by the processing of the second reservation step. And a second output step of outputting for the processing of the first reception step.

[0021] The program of the medium according to claim 14 is:
The information processing program of the first means corresponds to a first output step of outputting a control command to another information processing apparatus to the second means, and a command output by the processing of the first output step. Then, a first reservation process performed by the second means for controlling another information processing device as a control target, and a second reservation process for exchanging information with another information processing device via a bus A first receiving step of receiving a reservation signal output by the second means, indicating that both have succeeded, or at least one of which has not succeeded, based on a result of the processing; A transmitting / receiving step of transmitting / receiving information to / from another information processing apparatus via the second means and the bus in response to the reservation signal received by the processing;
The information processing program according to the means of the second aspect includes a second receiving step of receiving the control instruction for the other information processing apparatus output by the processing of the first output step, and another processing by the processing of the second receiving step. When receiving a control command to the information processing device, a first reservation process for controlling another information processing device as a control target and a second reservation process for exchanging information with another information processing device via a bus are performed. When the first reservation step for performing one of the reservation processing and the reservation processing by the processing of the first reservation step are successful, the other reservation processing of the first reservation processing and the second reservation processing is performed. A second reservation step, and a second signal for outputting a reservation signal for the processing of the first receiving step in accordance with the result of the reservation by the processing of the first reservation step and the result of the reservation by the processing of the second reservation step. Output stage Characterized in that it comprises a flop.

[0022] The information processing apparatus according to claim 1, and claim 7.
In the information processing method described in the above, and the medium described in the claim 8, when one of the first reservation processing and the second reservation processing succeeds, the other reservation processing is performed, and both reservations are performed. If successful, a reservation success signal is output, and if at least one of them is not successful, a reservation failure signal is output.

The information processing apparatus according to claim 9, wherein
In the information processing method according to claim 0 and the medium according to claim 11, a command for controlling another information processing device is output to the interface, and the interface outputs the command in response to the command. Reservation processing of 1 and 2
In response to a reservation signal indicating that both of the reservation processes have succeeded and that at least one of the reservation processes has succeeded, information is exchanged with another information processing apparatus via the bus.

[0024] In the information processing apparatus according to the twelfth aspect, the information processing method according to the thirteenth aspect, and the medium according to the fourteenth aspect, the first means transmits a control command to another information processing apparatus. Outputting to a second means, wherein the second means:
A first reservation process and a second reservation process are performed in response to the command, and a reservation signal is output to the first means in accordance with a result of the reservation process. The first means exchanges information with another information processing apparatus via the bus with the second means in response to a reservation signal from the second means.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 shows an IEEE13 to which the present invention is applied.
1 shows a configuration example of a 94 bus system. In this configuration example, the target 22,
23 and a set-top box (STB) 24 as a controller are connected. The set-top box 24 receives a radio wave broadcast from a satellite (not shown) via the parabolic antenna 31 and receives an IRD (Integrated
Receiver / Decoder) module 41.
The IRD module 41 demodulates the signal supplied from the parabolic antenna 31. The application module 42 responds to an operation signal generated when a user operates a remote controller (not shown) or an operation panel 43 provided on the main body of the set-top box 24, and the IRD module 41 and the IEEE 1394 module 44. Control. IEEE 1394 module 44
Executes an interface process for the IEEE 1394 bus 21.

FIG. 3 shows a more detailed configuration example of the setup box 24 and the target 22. In the IRD module 41 of the set-top box 24, the tuner 51 converts a signal from a predetermined transponder of the satellite from signals supplied from the antenna 31 in response to a command from a CPU (Centeral Processing Unit) 71. The signal is received and output to the front end unit 52. The front end unit 52 demodulates the signal input from the tuner 51 and outputs the signal to the descramble circuit 53.

The descrambling circuit 53 descrambles the data supplied from the front end 52 based on the encryption key information of the contract channel stored in an IC card (not shown) mounted on the IRD module 41. Then, the data is output to the demultiplexer 54. The demultiplexer 54 rearranges the data supplied from the descrambling circuit 53 for each channel, extracts a component of a channel corresponding to a command from the CPU 71 (command from a user), and converts a video stream composed of video packets into an MP.
EG (Moving Picture Experts Group) Video Decoder 5
5 and outputs an audio stream composed of video packets to the MPEG audio decoder 58.

The MPEG video decoder 55 decodes the input video stream and outputs it to the NTSC encoder 56. The NTSC encoder 56 is an MPEG video decoder 5
The video data input from 5 is converted into NTSC video data, and the data is further D / A-converted by a D / A conversion circuit 57, and then output to a monitor 61.

The MPEG audio decoder 58 converts the audio stream supplied from the demultiplexer 54 into an MP stream.
PCM (Pulse Code) before decoding
Modulation) The audio data is restored and output to the D / A conversion circuit 59. The D / A conversion circuit 59 converts the PCM audio data into a left channel analog audio signal and a right channel analog audio signal, and supplies the analog audio signal to a speaker (not shown) of the monitor 61.

The output of the MPEG audio decoder 58 is also input to the IEEE 1394 interface 81,
Output to the 1394 bus 21.

In this example, the application module 42 includes a CPU 71 for controlling each part of the set-top box 24, a RAM (Random Access Memory) 72, and a work RAM 73.

In the RAM 72, programs to be processed by the CPU 71 and the like are appropriately loaded. The work RAM 73 has a CPU 71
However, data necessary for executing various processes is appropriately stored. The IEEE 1394 module 44 is constituted by an IEEE 1394 interface 81 in this example.

In this case, the target 22 is
It is configured as a magneto-optical disk device (mini disk (MD) device). The CPU 101 controls each unit of the target 22. The RAM 102 appropriately stores data, programs, and the like necessary for the CPU 101 to execute various processes. The IEEE 1394 interface 110
The interface processing for the IEEE 1394 bus 21 is executed. The IEEE 1394 interface 110 is an IEEE1
The control data supplied from the set-top box 24 is transmitted to the CPU 101 via the 394 bus 21, and the PCM audio data is transmitted to the ATRAC (Adaptive Transform).
Acoustic coding) is output to the encoder 107.

The ATRAC encoder 107 converts A / D conversion of PCM audio data input from the IEEE 1394 interface 110 or the terminal 125 or left and right analog audio signals input from the terminals 123 and 124 under the control of the CPU 101. The circuit 106 encodes the data converted into digital data with high efficiency by the ATRAC method, and outputs it to the recording / reproducing system 103 as PCM audio data. The CPU 101 controls the recording / reproducing system 103 based on the control data supplied from the set-top box 24 via the IEEE1394 interface 110.
And the recording operation of the optical pickup 104 is controlled. The recording / reproducing system 103 adds an error correction code to the PCM audio data, performs predetermined modulation processing, supplies the data to the optical pickup 104, and supplies the optical pickup 104 with the magneto-optical disk (mini disk) 1.
05 is recorded in the designated area.

Data reproduced from the magneto-optical disk 105 by the optical pickup 104 is transmitted to the recording / reproducing system 1.
At 03, the data is supplied to the ATRAC decoder 108 after being subjected to error correction processing and predetermined demodulation processing. The ATRAC decoder 108 records the input reproduction data in the ATRAC format and outputs the recorded data as digital reproduction data to the terminal 122.
Output to outside. Alternatively, the reproduced data is converted into a left-channel analog audio signal and a right-channel analog audio signal by the digital-to-analog conversion circuit 109, and
Output as audio.

Next, the processing when the set-top box 24 as a controller controls the target 22 will be described. First, the processing of the CPU 71 of the set-top box 24 (application program loaded and executed on the CPU 71) will be described with reference to the flowchart of FIG. In step S1, an application program (hereinafter, simply referred to as an application) determines whether it is necessary to control a predetermined device among the devices connected to the IEEE 1394 bus 21. When it is not necessary to control a predetermined device, the apparatus waits until it becomes necessary to control the apparatus. The user operates the operation panel 43 to supply, for example, data exchanged with the set-top box 24 to the target 22,
When a command to record is input, the application determines that it is necessary to control another device (the target 22 in this example), and proceeds to step S2.

In step S2, the application establishes a connection with the device (in this example, the target 22) determined to require control in step S1 by IE.
A request is made to the IEEE 1394 interface 81 constituting the EE 1394 module 42. Upon receiving this request, the IEEE 1394 interface 81 receives the request as shown in FIG.
Execute the Connect process shown in the flowchart of FIG. Details of this processing will be described later.

Next, in step S3, the application module 42
It is determined whether or not a Connect success message has been received from Step 1. That is, as described later with reference to the flowchart of FIG. 5, the IEEE 1394 interface 81 executes the Connect process shown in the flowchart of FIG. 5 in response to a command from the application module 42, and communicates with another node (device). Connect process succeeded (step S33) or failed (steps S24, S2)
8, S32) is output. Therefore, in step S3, the application module 42
Determines whether a Connect success message has been received, and if received, proceeds to step S4 and executes a predetermined control on a predetermined device (in this case, the target 22). For example, the data received by the IRD module 41 is transferred to the target 22 via the IEEE1394 bus 21 and recorded.

If it is determined in step S3 that the Connect success message has not been received,
When receiving the unsuccessful message from the EE1394 interface 81, the application module 42
The process ends. In this case, the application module 42 displays an error message to the user, displays a message indicating the input of a corresponding new command, waits until a predetermined time elapses, and waits for a predetermined time. When the time elapses, the same processing as in the case described above is executed again.

The set-top box 24 in step S4
An example of the operation in the case of controlling the target 22 will be described later.

Next, referring to the flowchart of FIG.
The EE 1394 module 44 (IEEE 1394 interface 81) sends the Conn.
Processing when a request for ect processing is received will be described.
In step S21, the IEEE 1394 interface 81 has already connected to another device on the IEEE 1394 bus 21.
ect. That is, the IEEE1394 interface 81 has a nonvolatile memory (not shown) inside.
When the memory is connected to another device (node) connected to the IEEE 1394 bus 21, this is stored. This storage process is performed in step S34 described below.

FIG. 6 shows an example of information stored in the nonvolatile memory inside the IEEE1394 interface 81 in this manner. In this example, for each target connected to the IEEE 1394 bus 21, the presence or absence of Connect, its node unique ID (NUID) or node ID,
The presence / absence of serve and the type of device of the node are stored.

If it is stored in the built-in memory that there is a node that has been connected, a determination of YES is made in step S21. In this case, in step S22, the IEEE 1394 interface 8
1 executes Disconnect processing. Details of the disconnect process are shown in the flowchart of FIG.

First, in step S51, the IEEE 13
The 49 interface 81 executes PtoP release processing of the already connected device. That is, the IEEE 1394 module 44 executes a process of erasing the value of the register for securing the channel and the band held by the bus manager in the nodes connected to the IEEE 1394 bus 21. When the bus manager is the setup box 24 itself, since the IEEE 1394 interface 81 holds the register in itself, the process of deleting the channel and the band written in the register is executed. In addition, IEEE1394 interface 8
1 clears a plug control register and the like set for data transfer with the node, and requests the node to clear. The node clears the register in response to this request.

In step S52, the IEEE 1394 interface 81 determines whether the PtoP release processing has succeeded. If the release processing is not successful, the process proceeds to step S53, where the IEEE 1394 interface 81
Set a flag indicating disconnect failure.

If it is determined in step S52 that the PtoP release processing has been successful, the process proceeds to step S54, in which the IE
In step S54, the EE1394 interface 81 determines whether or not the node is a node requiring a reserve (whether or not the node has been reserved). IEEE 1394 interface 8 at bus reset
1 is the node unique ID of each node, and
It is inquired as to whether or not the node requires a node, and the node is stored in advance. Therefore, the determination of this step can be performed from this storage.

If the target node is a node that requires Reserve, the process proceeds to step S55, and the process proceeds to step S55.
The 94 interface 81 executes a Reserve release process. That is, the IEEE 1394 interface 81
The corresponding node is requested to release the Reserve via the 94 bus 21. The node receiving this request determines whether the release is possible or not, and if the release is possible, deletes the setting of the built-in Reserve register and returns the corresponding Response
Outputs e. If the cancellation is impossible for some reason, a Response indicating that the cancellation is impossible is output.

The IEEE 1394 interface 81 is an IEEE 1394 interface.
When the response transmitted from the target node is received via the 1394 bus 21, the response is received.
In step S56, it is determined whether or not e is successful. If it is determined that release is successful, step S56 is executed.
At 58, the disconnect successful flag is set.
If the release is unsuccessful, it is determined in step S57 that the IEEE 1394 interface 81
Sets a flag that indicates disconnect failure.

Returning to FIG. 5, the IEEE 1394 interface 81 determines in step S23 whether or not the flag generated as a result of the disconnect processing in step S22 indicates that the disconnect has succeeded. Outputs a Connect failure message to the application module 42 in step S24. If it is determined in step S23 that the disconnect has been successful, the process proceeds to step S25.

If it is determined in step S21 that another device has not been connected, the Disconn.
Since the ect process is unnecessary, the process immediately proceeds to step S25 in this case.

In step S25, the IEEE 1394 interface 81 sets the application module 42
It is determined based on the storage whether or not the node to which Connect has been requested from is a device that requires a Reserve process. Rese
If the node requires rve processing, the process proceeds to step S26, where the IEEE 1394 interface 81
Execute the serve process. That is, Reserve is requested for the target node. In response to a request from another controller, the node that has received the request outputs a Response that rejects the Reserve if the Reserve process has already been performed. Re from other controllers
If the Priority of a Reserve request from a new controller has priority even if it has not received a request for serve or has already received a Reserve process from another controller, Node is Accp
Output ted Response. The details of the Reserve process will be described later.

Therefore, the IEEE 1394 interface 81
Is the Rese of the target node in step S27.
It is determined whether or not the rve has succeeded. If the rve has not succeeded, the process proceeds to step S28, and a message indicating that Connect has failed is output to the application module 42.

If it is determined in step S27 that the Reserve has succeeded, the process proceeds to step S29.
If it is determined in step S25 that the node does not require the Reserve processing, the processing is performed in step S2.
Go to 9.

In step S29, the IEEE 1394 interface 81 executes a PtoP process. That is,
The IEEE 1394 interface 81 requests the bus manager of the IEEE 1394 bus 21 to secure a channel and a band, requests the target node to set a plug register, and also sets its own plug register. The details of the PtoP processing will also be described later.

In step S30, the IEEE 1394 interface 81 determines whether PtoP has succeeded,
If PtoP has failed, the process proceeds to step S31, and a process for canceling the Reserve process set in step S26 is executed. That is, the IEEE 1394 interface 81
Causes the target to clear the Reserve settings once set. Then, the process proceeds to step S32, and the IEEE13
The 94 interface 81 outputs a connect failure message to the application module 42.

If it is determined in step S30 that PtoP has succeeded, the IEEE 1394 interface 81
Proceeding to step S33, a Connect success message is output to the application module 42. Then, in step S34, the IEEE1394 interface 8
1 saves Connect information for the target in a built-in memory. Thereby, as described above,
Connect save information as shown in FIG. 6 is stored.

As described above, when the application module 42 changes a node or the like, the
It is only necessary to request Connect to the 94 module 44, and there is no need to consider PtoP or Reserve processing. As a result, it becomes easy to design various application programs. In addition, the IEEE 1394 module 44 executes the PtoP process and the Reserve process in association with the Connect request from the application module 42, and outputs a message corresponding to the execution result to the application module 42. This prevents the target from being controlled by the controller as necessary. As a result, resources connected to the IEEE 1394 bus 21 can be used efficiently.

The IEEE 1394 interface 81 also
When a bus reset has occurred, a Reconnect process shown in the flowchart of FIG. 8 is executed. That is, IEEE 139
4 interface 81 stores the Connect save information shown in FIG. 6 in a non-volatile memory, and the power of the set-top box 24 is turned off or the IEEE 1394 bus 2
When the node connected to 1 is removed or a new node is added, the processing shown in the flowchart of FIG. 8 is executed.

In step S71, the IEEE 1394 interface 81 determines whether or not there is a node connected before the bus reset. This determination is made based on the Connect save information stored in the built-in nonvolatile memory. If there is a node that was connected before the bus reset, the process proceeds to step S72, and the IE
The EE1394 interface 81 stores the stored Conn.
Based on the ect save information, it is further determined whether or not the node has been reserved before the bus reset. If the node has been reserved, the process proceeds to step S73 to execute a Reserve process. As a node ID that is stored as Connect save information, a node unique ID (NUID) that is invariable for each node is stored instead of a node ID that may change each time a bus reset occurs. Then, by searching for the node ID corresponding to the node unique ID, the node stored in the Connect save information can be specified.

In step S74, the IEEE 1394 interface 81 determines whether the Reserve has succeeded. If it is determined in step S74 that the Reserve has failed, then in step S75, the IEEE1394
The interface 81 performs processing for releasing the Connect (FIG. 7).
Disconnect processing shown in (1)).

If successful, the process proceeds to step S76. In step S72, before the bus reset,
If it is determined that e has not been performed, the process proceeds to step S76.

In step S76, the IEEE 1394 interface 81 executes a PtoP process on the node. In step S77, the IEEE 1394 interface 81 determines whether or not PtoP has succeeded. If the PtoP has succeeded, in step S80, the connection to the node is continued. Thereby, before the bus reset occurs, the connected node is automatically connected after the bus reset, and the user can input the new node without inputting a new process. The same processing can be continuously performed.

If it is determined in step S77 that PtoP has failed, the process proceeds to step S78.
The 94 interface 81 cancels the Reserve processing performed in step S73, and executes processing to cancel Connect in step S79. That is, in this case, similar to the case in step S75, when connecting with the node, a new input is required.

If it is determined in step S71 that the node connected before the bus reset does not exist, the processing after step S72 is skipped.

As described above, when the bus reset occurs, the Reconnect process is automatically executed, so that the user can execute the Conn which was performed before the bus reset occurred.
ect can be automatically restarted again after a bus reset.

When controlling a plurality of targets, the controller does not perform the processing shown in FIG. 5 on a plurality of targets at the same time, but sequentially switches targets to be controlled. On the other hand, the processing shown in FIG. 5 is executed. This eliminates the need for the controller to prepare a plurality of plug registers for a plurality of targets (it is sufficient to prepare only a plug register for one target), and facilitates implementation.

Next, a format for Reserve processing will be described. The Reserve command and the corresponding response are defined as a type of AV / C command and response. AV / C commands and responses are based on FCP (Function Control) defined by IEC-1883.
rol Protocol). FCP is an asynchronous block write transaction (asynchronous block write) of IEEE Standard 1394-1995.
Transactions) encapsulate commands and responses for controlling the device, and the format is configured as shown in FIG.

As shown in the figure, the beginning is a packet header, followed by an FCP frame, and finally, a data_CRC.

At the beginning of the packet header, destination_
ID is placed. This destination_ID represents the ID of the node to which this packet is transferred. tl is Transact
Ion label means a unique tag added to a packet from a node. rt means Retry code and represents a code related to retry.

Following rt, tcod representing Transaction code
e, and in this example, the value is 00
01 is set. This 0001 indicates that this block is a write request for a data block.

The next pri means Priority, and arbitration in the link layer is performed by this value.

Source_ID represents the ID of the node that sends out this packet. destination_offset represents the address of a register in which the command or response of this packet is written.

That is, for example, as shown in FIG. 10, the set-top box 24 and the target 22 connected to the IEEE 1394 bus 21
A register 141 or a register 13 is provided to the interface 81 or the IEEE 1394 interface 110, respectively.
One. For example, the target 22 causes a command and a response transferred from another node via the IEEE1394 bus 21 to be held at addresses of a register 131 specified by destination_offset. Similarly, the set-top box 24 also stores the command and the response transferred from another node at the address specified by destination_offset of the register 141. The set-top box 24 and the target 22 read the command or response stored in these registers 141 and 131 and execute the corresponding processing.

Data_length next to destination_offset
Represents the data length in the data field. data
In the next two bytes of _length, a value 0 is described. Last h
eader_CRC represents an error detection code in the packet header.

In the FCP frame of the payload, the CTS is arranged as the first 4 bits. This CTS is Comman
This means d / Transaction Set, and in the case of an AV / C transaction, its value is set to 0000. Next, FCP data is arranged. Details of the FCP data are shown in FIGS. FIG. 11 shows an FCP frame of an AV / C command frame, and FIG. 12 shows an FCP frame of an AV / C response frame.

In FIG. 11, ctype is Command type
And the values defined therein have the meaning as shown in FIG. That is, the value 0 indicates CONTROL, and the value 1 indicates STATUS.

As shown in FIG. 14, subunit_type indicates the type of the subunit targeted by this command. A value of 0 means that the type of the subunit is a video monitor. 3 represents a disc recorder or a player.

The subunit ID is used as an instance number when an extended subunit type is defined. As shown in FIG. 15, the values 0 to 4 are:
Represents the instance number and its value 5 is the subunit
Indicates that the ID has been extended to the next byte.

The opcode represents an operation code, and
In the case of e, the value is set to 01 as shown in FIG. The opcode is followed by operand [0] to operand [n] (n = 12 in FIG. 16). priority is allocated to operand [0]. This priority defines the relative priority associated with the command. Its value 0
Any controller reserves its node (Rese
rve) means not. 1 to F of the value
Means that the target has a reservation for the controller. The value 4 of the priority is a standard priority used by the controller.

A target in a free state (not reserved) is reserved by the controller that has issued the Reserve control command. The target stores the reserved priority, the accompanying text string, and the 16-bit node ID of the controller. ASCII characters are inserted up to 12 bytes in the text following priority.

When the priority value is accepted by the target, the retained value is converted as shown in FIG. For example, values of 0 and 1 are held as priority. Values from 2 to E (hexadecimal) are priority
And the value of E. The value of F is held as priority.

When holding the reservation of a predetermined controller, the node (target) rejects a control command other than the reserve command type of control issued from another controller.

When a Reserve control command is received from the same controller that holds the reservation, it is accepted. This is because the original controller has the priority associated with its reservation
Is allowed to increase or decrease.

When a Reserve control command is received from a controller other than the controller that made the reservation, the target is set as long as its priority is not greater than the priority of the current reservation.
Reject the command. New, priority is current pr
When greater than iority, a new reservation is established.

When a Reserve control command is issued for an AV unit having a subunit holding a reservation of equal or higher priority,
The Reserve control command returns a rejected response.

[0086] If a Reserve control command is issued for an AV unit that does not contain a subunit with equal or higher priority, the reservation is established.

When a control command is issued to a subunit in an AV unit reserved by a controller other than the controller that issued the control command, the control command is rejected.

When the AV unit detects a bus reset, it resets the priority of the reservation to 0,
Reservation node ID and reservation text,
Set all to 1. The AV unit rejects all commands of the control command type except for the Reserve command until the reservation is established or 10 seconds have elapsed. This procedure allows the holder of the original reservation to re-establish the reservation after a bus reset.

Each controller does not issue a Reserve control command within 10 seconds after the bus reset unless a reservation has been established for the target before the bus reset. AV unit node
Since the ID is changed after the bus reset, the controller desiring to establish the reservation checks the node unique ID.

Under such circumstances, the target estimates that the Reserve command received within 10 seconds of the bus reset is correct, and accepts the reservation.

The controller can request the current reservation status by issuing a Reserve command having a STATUS command type field shown in FIG.

The AV / C response frame shown in FIG. 12 is basically configured in the same manner as the AV / C command frame shown in FIG. 11, but the respo is replaced with the ctype shown in FIG.
nce is arranged. This response means Response code, and the values of 0 to F indicate the meaning shown in FIG.
For example, a value of 8 indicates NOT IMPLEMENTED for the requested command, and a value of 9 indicates that the requested command was accepted (ACCEPTE
D). The value A indicates that the corresponding command has been rejected (REJECTED).

As shown in FIG. 20, when the controller issues an AV / C command to the target, the target responds to the command within 100 ms.
If se can be issued, issue it.

On the other hand, as shown in FIG.
If the corresponding process cannot be completed within 100 ms after receiving the command, an INTERIM response is issued before 100 ms elapses. Then, when the processing is completed, the target is set to fina
l Issue a response.

Next, the PtoP processing will be described.

FIG. 22 is a diagram showing a cycle structure of data transmission of the devices connected by the IEEE1394 bus 21. IEEE
In the 1394 bus 21, data is divided into packets,
The data is transmitted in a time division manner on the basis of a cycle having a length of 25 μS. This cycle is created by a cycle start signal supplied from a node having a cycle master function (any of the devices shown in FIG. 2). The isochronous packet secures a band (a time unit but called a band) necessary for transmission from the beginning of every cycle. Therefore, in isochronous transmission, transmission of data within a certain time is guaranteed. However, if a transmission error occurs, there is no protection mechanism and data is lost. The above-described audio data is transmitted in the isochronous packet.

At a time when the bus is not used for isochronous transmission in each cycle, the node that has secured the bus as a result of arbitration sends out an asynchronous packet. As described above, the Reserve AV / C command and response are transmitted as the asynchronous packet. In asynchronous transmission, reliable transmission is guaranteed by using acknowledgment and retry, but the transmission timing is not constant.

In order for a given node to perform isochronous transmission, that node must support the isochronous function. At least one of the nodes corresponding to the isochronous function must have a cycle master function. Further, at least one of the nodes connected to the IEEE1394 bus 21 must have an isochronous resource manager function.

IEEE1394 is a standard defined by ISO / IEC13213.
CSR (Control & Status R) with 4-bit address space
egister) architecture. FIG.
FIG. 3 is a diagram illustrating the structure of an address space of the R architecture. The upper 16 bits are a node ID indicating a node on each IEEE1394 bus 21, and the remaining 48 bits are used for designating an address space given to each node. The upper 16 bits are further divided into 10 bits of a bus ID and 6 bits of a physical ID (node ID in a narrow sense). Since a value in which all bits are 1 is used for a special purpose, it is possible to specify 1023 buses and 63 nodes.

The space defined by the upper 20 bits of the address space of 256 terabytes defined by the lower 48 bits is a 2048-byte CSR-specific register or IEEE.
It is divided into Initial Register Space (Private Space), Initial Memory Space (Initial Memory Space), etc. used for E1394 specific registers, etc.
When the space defined by the upper 20 bits is the initial register space, the space defined by the bits is a configuration ROM (Configuration read onl
y memory), an initial unit space (Initial Unit Space) used for a node-specific application, a plug control register (Plug Control Register (PCRs)), and the like.

FIG. 24 is a view for explaining offset addresses, names, and functions of main CSRs. The offset in FIG. 24 is the FF where the initial register space starts.
It indicates an offset address from the address FFF0000000h (the number ending with h indicates hexadecimal notation). A bandwidth available register (Bandwidth Available Register) having an offset 220h indicates a band that can be allocated to isochronous communication, and only the value of a node operating as an isochronous resource manager is valid. That is, CS in FIG.
Although each node has R, only the isochronous resource manager of the bandwidth available register is valid. In other words, the bandwidth available register has substantially only the isochronous resource manager. The maximum value is stored in the bandwidth available register when a band is not allocated to isochronous communication, and the value decreases each time a band is allocated.

The channels available registers (Offsets 224h to 228h)
(ster) corresponds to each of the channel numbers from 0 to 63, and when the bit is 0, it indicates that the channel has already been allocated. Only the channel available register of the node operating as the isochronous resource manager is valid.

Returning to FIG. 23, general ROMs are stored at addresses 200h to 400h in the initial register space.
(Read only memory) A configuration ROM based on the format is arranged.

FIG. 25 is a view for explaining the general ROM format. A node, which is a unit of access on the IEEE1394 bus 21, can have a plurality of units that operate independently while using an address space commonly in the node. Unit directory (unit_directories)
Can indicate the software version or location for this unit. Bus info block (bus_i
The positions of the nfo_block) and the root directory (root_directory) are fixed, but the positions of other blocks are specified by offset addresses.

FIG. 26 is a diagram showing details of the bus info block, the root directory, and the unit directory. The Company_ID in the bus info block stores an ID number indicating the manufacturer of the device. Chip_ID
Stores the unique ID of the device that is unique in the world without duplication with other devices. In addition, according to the standard of IEC1883, IEC
00h is written in the first octet, A0h is written in the second octet, and 2Dh is written in the third octet of the unit specification ID (unit_spec_id) of the unit directory of the device satisfying 1883. Further, 01h is written in the first octet of the unit switch version (unit_sw_version), and 1 is written in the LSB (Least Significant Bit) of the third octet.

In order to control the input / output of the device via the interface, the node assigns IEC188 to addresses 900h to 9FFh in the initial unit space shown in FIG.
It has a PCR (Plug Control Register) specified in 3.
This implements the concept of a plug in order to form a signal path logically similar to an analog interface.

FIG. 27 is a diagram for explaining the configuration of the PCR. PCR stands for oPCR (output Plug Control
l Register), iPCR (input Plug Contr
ol Register). In addition, the PCR includes a register oMPR (o
utput Master Plug Register) and iMPR (input Master Plug
gRegister). Each device does not have multiple oMPRs and iMPRs.
It is possible to have multiple CRs and iPCRs depending on the capabilities of the device. The PCR shown in FIG.
Has PCR and iPCR. The flow of isochronous data is controlled by manipulating registers corresponding to these plugs.

FIG. 28 shows oMPR, oPCR, iMPR, and iPCR
FIG. 3 is a diagram showing the configuration of FIG. FIG. 28A shows the configuration of oMPR.
28B shows the configuration of the oPCR, FIG. 28C shows the configuration of the iMPR, and FIG. 28D shows the configuration of the iPCR. oM
The 2-bit data rate capability on the MSB side of the PR and iMPR stores a code indicating the maximum transmission rate of isochronous data that can be transmitted or received by the device. The broadcast channel base of oMPR specifies the number of a channel used for broadcast output.

The 5-bit number of output plugs on the LSB side of the oMPR stores the number of output plugs of the device, that is, a value indicating the number of oPCRs. In the 5-bit number of input plugs on the LSB side of the iMPR, a value indicating the number of input plugs of the device, that is, the number of iPCRs is stored. The non-persistent extension field and the persistent extension field are areas defined for future extensions.

The oPCR and iPCR MSBs online (on-lin
e) shows the usage state of the plug. That is, if its value is 1
If it is, the plug is ON-LINE, if it is 0, it is OFF-L
Indicates INE. oPCR and iPCR broadcast connection counters
The value of (ter) indicates presence (1) or absence (0) of the broadcast connection. The value of a point-to-point connection counter having a 6-bit width of the oPCR and iPCR indicates the number of point-to-point connections that the plug has.

The value of the channel number having a 6-bit width of oPCR and iPCR indicates the number of the isochronous channel to which the plug is connected. oPCR 2-bit data rate (data rat
The value of e) indicates the actual transmission speed of the isochronous data packet output from the plug. The code stored in the overhead ID having a 4-bit width of the oPCR indicates the overhead bandwidth of the isochronous communication. oPCR 10-bit payload
The value of (payload) represents the maximum value of data included in an isochronous packet that can be handled by the plug.

FIG. 29 is a diagram showing the relationship among plugs, plug control registers, and isochronous channels. Set-top box 24, target 22,
Reference numeral 23 is connected by an IEEE1394 bus 21. Of the oPCR [0] to oPCR [2] in which the transmission speed and the number of oPCRs are specified by the oMPR of the target 23, the isochronous data whose channel is specified by the oPCR [1] is the channel # 1 (channel) of the IEEE1394 bus 21. Sent to # 1). Among the iPCR [0] and iPCR [1] in which the transmission speed and the number of iPCRs are defined by the iMPR of the set-top box 24, the iPCR [0] for which the input channel # 1 is specified causes the set-top box 24 to perform IEEE1394. The isochronous data transmitted to the channel # 1 of the bus 21 is read. Similarly, the target 22 receives the channel # 2 (ch) specified by the oPCR [0].
annel # 2), the set top box 24 reads the isochronous data from the channel # 2 designated by iPRC [1].

With respect to the above points, PtoP processing is performed as a reservation processing necessary for exchanging information via the IEEE 1394 bus 21.

Next, the operation when the audio data received by the set-top box 24 of FIG. 3 is transferred to the target 22 and recorded will be described.

The tuner 51 demodulates the signal received via the parabolic antenna 31 and outputs the signal to the front end unit 52. The front end unit 52 demodulates a transponder signal corresponding to a command from the CPU 71 and outputs the demodulated signal to the descramble circuit 53. The desramble circuit 53
The signal supplied from the front end unit 52 is descrambled and output to the demultiplexer 54. The demultiplexer 54 extracts a signal of a channel designated by the user operating the operation panel 43 under the control of the CPU 71, outputs the video data to the MPEG video decoder 55, and outputs the audio data to the MPEG audio decoder. 58.

[0116] The MPEG video decoder 55 decodes the input video data and outputs it to the NTSC encoder 56. The NTSC encoder 56 encodes the input data into NTSC video data and outputs it to the D / A conversion circuit 57. The D / A conversion circuit 57 converts the input digital data into analog data, supplies the analog data to the monitor 61,
Display.

On the other hand, the MPEG audio decoder 58 decodes the input audio data and outputs it to the D / A conversion circuit 59. The D / A conversion circuit 59 generates left and right analog audio data from the input digital data, and outputs the analog audio data to the speaker of the monitor 61.

The audio data output from the MPEG audio decoder 58 is input to the IEEE 1394 interface 81 and packetized into isochronous packets. The packetized data is IEEE1394
The data is transferred to the target 22 via the bus 21.

In the target 22, the IEEE1394
The interface 110 receives the isochronous packet transferred from the set top box 24 via the IEEE 1394 bus 21, depackets it, and
Output to RAC encoder 107. ATRAC encoder 10
Reference numeral 7 encodes the input audio data by the ATRAC method and outputs the encoded data to the recording / reproducing system 103.

[0120] The recording / reproducing system 103 outputs the input audio data to the optical pickup 104 and records it on the magneto-optical disk 105.

In the above, IEEE 139 is used as a bus.
The case where the four buses 21 are used has been described as an example, but the present invention can be applied to the case where other buses are used.

The above-described series of processing can be executed by hardware, but can also be executed by software. When a series of processes is executed by software, a program constituting the software is installed in a computer incorporated in the set-top box 24 as dedicated hardware, or by installing various programs, various programs are executed. For example, it is installed in a general-purpose personal computer or the like that can execute the functions described above.

Next, referring to FIG. 30, regarding a medium used to install a program for executing the above-described series of processes in a computer and to make the computer executable, the computer uses a general-purpose personal computer. The following is an example of the case.

As shown in FIG. 30A, a program is stored in a hard disk 302 or a semiconductor memory 3 as a recording medium built in a personal computer 301.
03 in advance.

Alternatively, the program is executed as shown in FIG.
As shown in (B), a floppy (registered trademark) disk 311, a CD-ROM (Compact Disk-Read Only Disk) 31
2. MO (Magneto-Optical) disc 313, DVD (Digit
al Versatile Disk) 314, a magnetic disk 315, a semiconductor memory 316, or other such storage media, which can be temporarily or permanently stored and provided as package software.

Further, as shown in FIG. 30C, the program is wirelessly transferred from a download site 321 to a personal computer 323 via an artificial satellite 322 for digital satellite broadcasting, a local area network, and the Internet. Network 331
, And can be transferred to the personal computer 301 by wire, and stored in the built-in hard disk 302 or the like in the personal computer 301.

The medium in the present specification means a broad concept including all these media.

For example, as shown in FIG. 31, the personal computer 301 has a CPU (Central Processing Unit).
nit) 342. The CPU 342 has a bus 341
An input / output interface 345 is connected via the input / output interface 345. When a user inputs a command via the input / output interface 345 from an input unit 347 including a keyboard, a mouse, and the like, the CPU 342 responds accordingly. ROM (Read) corresponding to the semiconductor memory 303 of FIG.
(Only Memory) 343 is executed. Alternatively, the CPU 342 may transfer the program stored in the hard disk 302 in advance from the satellite 322 or the network 331 to the communication unit 348.
And the program installed on the hard disk 302 or the floppy disk 311, the CD-ROM 312, and the MO mounted on the drive 349.
Disk 313, DVD 314, or magnetic disk 3
15 and installed in the hard disk 302 are stored in a RAM (Randum Access Memor
y) Load to 344 and execute. Further, the CPU 342
Sends the processing result to, for example, the input / output interface 3
An output is provided to a display unit 346 such as an LCD (Liquid Crystal Display) via the LCD 45 as necessary.

[0129] In this specification, the steps of describing a program provided by a medium may be performed in a chronological order according to the described order. It also includes processes that are executed individually or individually.

In this specification, the system is defined as:
It represents the entire device composed of a plurality of devices.

[0131]

As described above, the information processing apparatus according to the first aspect, the information processing method according to the seventh aspect, and the eighth aspect.
According to the medium described in (1), when both of the first reservation process and the second reservation process are successful, a reservation success signal is output. When at least one of the first reservation process and the second reservation process is not successful, a reservation failure signal is output. Is output, so that the application module can control the other information processing apparatus to be controlled by the first module.
Whether the device requires the above process or the device that does not need the process can be managed with certainty, and the design of the application program becomes easy.

Further, the first processing and the second processing are performed in association with each other, and if at least one of them is unsuccessful, a signal indicating that the reservation is unsuccessful is output. It is prevented that the processing device is occupied unnecessarily, and the resources on the bus can be effectively used.

Further, when another information processing apparatus to be controlled is switched, both the first processing and the second processing are performed in advance, so that the user can obtain other information as in the conventional case. When trying to control the processing device, the first reservation process fails, and when the information processing device cannot be occupied, or when the user wants to transmit data, the second reservation process fails. This prevents transmission from becoming impossible. In other words, if both the first reservation process and the second reservation process cannot be completed in the first place, the control target cannot be changed, so that the operability is improved.

The information processing apparatus according to claim 9,
According to the information processing method described in Item 0 and the medium described in Item 11, a control command for another information processing apparatus is output to the interface, and the first reservation processing and the second reservation processing from the interface are performed. A reservation signal based on the result of the reservation processing is received, and information is exchanged with another information processing device via the bus in response to the reservation signal. Regardless of the device that requires processing or the device that does not require processing, it is possible to easily and reliably transfer information to and from another information processing device through the same processing.

According to the information processing apparatus described in claim 12, the information processing method described in claim 13, and the medium described in claim 14, the first means is different from the second means in other respects. The second means executes a first reservation process and a second reservation process in response to the command, and outputs a reservation signal corresponding to the result of the reservation. The information is output to the first means, and the first means exchanges information with another information processing apparatus in response to the reservation signal, so that the other information processing apparatus executes the first reservation processing. It is possible to control the information processing apparatus by a unified process, whether the apparatus is necessary or not.

Further, it is possible to prevent the resources connected to the bus from being unnecessarily occupied, and to realize a system with improved operability.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a conventional bus system.

FIG. 2 is a block diagram showing a configuration of a bus system to which the present invention is applied.

FIG. 3 is a block diagram illustrating a configuration example of a set-top box 24 and a target 22 in FIG.

FIG. 4 is a flowchart illustrating an operation of the application module 42 in FIG. 3;

5 is a diagram illustrating Conn of the IEEE1394 interface 81 in FIG.
It is a flowchart explaining an ect process.

FIG. 6 is a diagram illustrating Connect save information stored in the IEEE 1394 interface 81 of FIG. 3;

FIG. 7 is a flowchart illustrating details of a disconnect process in step S22 of FIG. 5;

8 is a diagram showing a Reco of the IEEE 1394 interface 81 in FIG.
It is a flowchart explaining a nnect process.

FIG. 9 is a diagram illustrating the format of an FCP frame.

FIG. 10 is a diagram illustrating a command register and a response register.

FIG. 11 is a diagram illustrating the format of an AV / C command frame.

FIG. 12 is a diagram illustrating the format of an AV / C response frame.

FIG. 13 is a diagram illustrating a command type.

FIG. 14 is a diagram illustrating a subunit type.

FIG. 15 is a diagram illustrating a subunit ID.

FIG. 16 is a diagram illustrating a format of a Reserve control command.

FIG. 17 is a diagram illustrating stored priority.

FIG. 18 is a diagram illustrating a format of a Reserve status command.

FIG. 19 is a diagram illustrating a Response code.

FIG. 20 is a diagram illustrating a quick transaction of AV / C.

FIG. 21 is a diagram for explaining a delayed transaction of AV / C.

FIG. 22 is a diagram illustrating a cycle of an IEEE 1394 high-speed serial bus.

FIG. 23 is a diagram illustrating a structure of an address space of the CSR architecture.

FIG. 24 is a diagram illustrating offset addresses, names, and functions of CSRs.

FIG. 25 is a diagram illustrating the format of a general ROM.

FIG. 26 is a diagram illustrating a configuration of a bus info block, a root directory, and a unit directory.

FIG. 27 is a diagram illustrating a configuration of a PCR.

FIG. 28 is a diagram illustrating the configuration of oMPR, oPCR, iMPR, and iPCR.

FIG. 29 is a diagram illustrating the relationship between a plug, a plug control register, and an isochronous channel.

FIG. 30 is a diagram illustrating a medium.

FIG. 31 is a block diagram illustrating a configuration example of a personal computer 301 in FIG.

[Explanation of symbols]

21 IEEE 1394 bus, 22, 23 target,
24 set-top boxes, 41 IRD modules, 42 application modules, 43 operation panels, 44 IEEE 1394 modules, 51 tuners, 54 demultiplexers, 55 MPEG video decoders, 58 MPEG audio decoders, 71
CPU, 81 IEEE1394 interface, 10
1 CPU, 110 IEEE1394 interface

Claims (14)

[Claims] 1. An information processing apparatus for controlling another information processing apparatus via a bus, wherein the receiving means receives a control command for the other information processing apparatus, and the receiving means controls the other information processing apparatus. A first reservation process for controlling the other information processing device as a control target and a second reservation process for transmitting and receiving information to and from the other information processing device via the bus. A first reservation unit that performs one of the first reservation process and a second reservation process that performs the other reservation process of the first reservation process and the second reservation process when the reservation process by the first reservation unit succeeds. When both the reservation by the first reservation unit and the reservation by the second reservation unit succeed, a reservation success signal is output. When at least one of the reservations does not succeed, the reservation failure signal The information processing apparatus according to an outputting means for outputting. 2. The information processing apparatus according to claim 1, wherein the bus is an IEEE 1394 high-speed serial bus. 3. The method according to claim 1, wherein the first reservation processing is performed by the IEEE 139.
4. The information processing apparatus according to claim 2, wherein the second process is a process of reserving a band and a channel of the IEEE 1394 high-speed serial bus. 4. 4. The result of the reservation by the first reservation means,
The information processing apparatus according to claim 1, further comprising a storage unit configured to store a result of the reservation by the second reservation unit. 5. The first reservation unit and the second reservation unit, when the other information processing device is changed, in response to a reservation result stored in the storage unit, The first reservation processing and the second reservation processing for the other information processing apparatus are canceled, and the first reservation processing and the second reservation processing are respectively performed for the changed other information processing apparatus. The information processing apparatus according to claim 4, wherein the reservation processing is performed. 6. The first and second reservation units, when the bus is reset, correspond to the reservation result stored in the storage unit, and the other information processing device The information processing apparatus according to claim 4, wherein the first reservation processing or the second reservation processing for re-executing is performed again. 7. An information processing method for an information processing apparatus for controlling another information processing apparatus via a bus, wherein: a receiving step of receiving a control instruction for the other information processing apparatus; Receiving a control instruction for the information processing device of the first type, a first reservation process for controlling the other information processing device as a control target, and transmitting and receiving information to and from the other information processing device via the bus. A first reservation step for performing one of the second reservation processing of the above, and when the reservation processing by the processing of the first reservation step has succeeded, the first reservation processing and the second reservation processing A second reservation step for performing the other reservation processing; and when both the reservation in the first reservation step and the reservation in the second reservation step are successful, a reservation success signal is output. And, when at least one is not successful, the information processing method characterized by comprising an output step of outputting a signal of reservation unsuccessful. 8. A program for information processing for controlling another information processing device via a bus, comprising: a receiving step of receiving a control instruction for the other information processing device; Receiving a control instruction for the information processing device of the first type, a first reservation process for controlling the other information processing device as a control target, and transmitting and receiving information to and from the other information processing device via the bus. A first reservation step for performing one of the second reservation processing of the above, and when the reservation processing by the processing of the first reservation step has succeeded, the first reservation processing and the second reservation processing A second reservation step for performing the other reservation processing; and when both the reservation by the first reservation step and the reservation by the second reservation step are successful, output a reservation success signal. When at least one is not successful, medium to execute the program characterized by comprising an output step for outputting a signal reserved unsuccessful computer. 9. An information processing apparatus having an interface for exchanging information with another information processing apparatus via a bus, an output unit for outputting a control command to the other information processing apparatus to the interface, In response to the command output by the output unit, the first processing performed by the interface to control the other information processing apparatus, and the other information processing apparatus via the bus. The interface outputs based on a result of a second reservation process for exchanging information;
Receiving means for receiving a reservation signal indicating that both have succeeded, or at least one of which has not succeeded, and the other information processing apparatus via the bus in response to the reservation signal received by the receiving means An information processing apparatus comprising: a transmission / reception unit that transmits and receives information. 10. An information processing method of an information processing apparatus having an interface for exchanging information with another information processing apparatus via a bus, wherein an output of outputting a control command to the other information processing apparatus to the interface is provided. A first reservation process for setting the other information processing device as a control target, which is performed by the interface, in response to the command output by the process of the output step; and Based on the result of the second reservation process for exchanging information with the other information processing device, the interface outputs a reservation signal indicating that both have succeeded or that at least one has not succeeded. A receiving step of receiving, and the other information processing apparatus via the bus in response to a reservation signal received by the processing of the receiving step An information processing method, comprising: transmitting and receiving information. 11. A program for information processing of an information processing device having an interface for exchanging information with another information processing device via a bus, wherein the control command for the other information processing device is transmitted by the interface. An output step of outputting to the controller, a first reservation process for controlling the other information processing device, which is performed by the interface, in response to the command output by the process of the output step, Based on a result of a second reservation process for exchanging information with the other information processing device via a bus, the interface outputs, that both have succeeded, or that at least one has failed. A receiving step of receiving a reservation signal representing the reservation information, and the other information via the bus corresponding to the reservation signal received by the processing of the receiving step. A medium for causing a computer to execute a program, comprising: an information processing device; and a transmitting / receiving step of transmitting / receiving information. 12. An information processing apparatus comprising: first means for controlling another information processing apparatus via a bus; and second means for performing an interface process between the first means and the bus. A first output unit that outputs a control command to the other information processing apparatus to the second unit; and a first output unit that outputs the control command to the second information processing device. A first reservation process performed by the second means for controlling the other information processing device as a control target; and a second reservation process for exchanging information with the other information processing device via the bus. A first reception unit that receives a reservation signal output from the second unit based on a result of the reservation process, the reservation signal indicating that both have succeeded, or that at least one has not succeeded; In response to the reservation signal received by the receiving means, A second means for transmitting and receiving information to and from the other information processing apparatus via a bus, wherein the second means controls the other information processing apparatus output by the first output means. A second receiving unit that receives a control instruction; and a first receiving unit that, when the second receiving unit receives a control instruction to the another information processing device, sets the other information processing device as a control target. A first reservation unit for performing one of a reservation process for transmitting and receiving information with the other information processing device via the bus, and a reservation process performed by the first reservation unit. Succeeds, a second reservation unit that performs the other reservation process of the first reservation process and the second reservation process; a reservation by the first reservation unit; and a reservation by the second reservation unit. In response to the result of An information processing apparatus, comprising: a second output unit that outputs to a receiving unit. 13. An information processing apparatus comprising: a first means for controlling another information processing apparatus via a bus; and a second means for performing an interface process between the first means and the bus. In the information processing method, the information processing method of the first means includes: a first output step of outputting a control command to the other information processing apparatus to the second means; and a process of the first output step. A first reservation process performed by the second means for controlling the other information processing apparatus in response to the instruction output by the second unit, and the other information processing via the bus. Based on the result of a second reservation process for exchanging information with the device, receiving a reservation signal output by the second means, indicating that both have succeeded or at least one has not succeeded. First receiving step A transmission / reception step of transmitting / receiving information to / from the other information processing apparatus via the second means and a bus in response to the reservation signal received in the processing of the first reception step; The information processing method according to the second aspect, further comprising: a second receiving step of receiving a control instruction to the other information processing apparatus output by the processing of the first output step; When receiving a control instruction for another information processing device, a first reservation process for controlling the other information processing device as a control target, and information exchange with the other information processing device via the bus A first reservation step for performing one of the second reservation processing for the first time, and when the reservation processing by the processing of the first reservation step is successful, the first reservation processing and the second reservation processing are performed. The other A second reservation step of performing a reservation process; and a reservation signal of the first reception step corresponding to a result of the reservation by the process of the first reservation step and a result of the reservation by the process of the second reservation step. A second output step of outputting for processing. 14. An information processing apparatus comprising: first means for controlling another information processing apparatus via a bus; and second means for performing an interface process between the first means and the bus. An information processing program, wherein the information processing program of the first means includes: a first output step of outputting a control instruction to the other information processing apparatus to the second means; A first reservation process for controlling the other information processing device as a control target, which is performed by the second means, in response to the command output in the process of the first output step; Based on the result of the second reservation process for exchanging information with the other information processing apparatus, the second unit outputs a message indicating that both have succeeded, or that at least one has not succeeded. Receive reservation signal A first receiving step; a transmitting / receiving step of transmitting / receiving information to / from the other information processing apparatus via the bus with the second means in response to the reservation signal received by the processing of the first receiving step; And a second receiving step of receiving a control instruction for the other information processing apparatus output by the processing of the first output step, the second information processing program comprising: Receiving a control command for the other information processing apparatus by the processing of the receiving step 2; a first reservation processing for controlling the other information processing apparatus as a control target; and the other reservation processing via the bus. A first reservation step for performing one of a second reservation process for exchanging information with the information processing apparatus; and a first reservation process when the reservation process by the first reservation step is successful. And a second reservation step of performing the other reservation processing of the second reservation processing; and a reservation corresponding to the result of the reservation by the processing of the first reservation step and the result of the reservation by the processing of the second reservation step. And a second output step of outputting the reservation signal for the processing of the first receiving step.