JP2000353748A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the exposure time of a resist material layer and to stably form a fuse window, without increasing exposure of light for patterning the resist material layer, when the fuse window is formed in a semiconductor device. SOLUTION: This laminated material is a laminated material 15 of a constitution, where a group 3 of fuses, which is formed by arranging a plurallty of the fuses 2 in parallel to each other, is formed on an insulating film 1 on a semiconductor substrate 10, and an interlayer insulating film 4 is formed on the group 3 and the film 1. The laminated material 15, provided with light reflecting layers 6, is prepared in the film 4 over the gaps 2a between the adjacent fuses 2, a resist material layer 7 is formed on the film 4, the layer 7 is exposed with light for patterning a resist and the layer 7 is developed, whereby resist patterned layers 8 corresponding to a fuse window are formed on the film 4, the film 4 is etched using the layers 8 as etching resists, and a fuse window 9 is formed in a semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having a fuse group for a redundant circuit.

[0002]

2. Description of the Related Art A fuse group in which a plurality of fuses made of a conductive material such as W-polycide are arranged in parallel as fuses for a redundant circuit on an insulating film on a surface of a semiconductor substrate, and an interlayer insulating covering the fuse group. Semiconductor devices including films are widely used.

By the way, in order to cut these redundant circuit fuses, laser light is applied to the fuses. In this case, when the thickness of the interlayer insulating film on the fuse is large, it is necessary to relatively increase the output of the irradiation laser light. In this case, the protective layer, the interlayer insulating film, or the semiconductor substrate is cracked or broken. There is a problem that damage is caused.

Accordingly, as shown in FIG.
A semiconductor device having a fuse group 43 in which a plurality of fuses 42 are arranged in parallel on an insulating film 41
The interlayer insulating film 44 above the fuse group 43 is etched to form a fuse window 45 (i.e., a portion where the thickness of the interlayer insulating film is small). Reduction of irradiation time has been performed.

[0005] Such a fuse window is formed as shown in FIG.

First, a fuse group 43 including a plurality of fuses 42 is arranged on an insulating film 41 of a semiconductor substrate 50.
Further, a laminated body 4 on which an interlayer insulating film 44 is formed
0, a resist material layer 46 is formed (FIG. 5).
(A)).

Next, the resist material layer 46 is exposed to light for resist patterning and developed to form a resist pattern layer 47 corresponding to the fuse window (45, see FIG. 5C) (FIG. 5B). )).

Next, using the resist pattern layer 47 as an etching resist, the interlayer insulating film 44 is appropriately etched off so that the fuses 42 are not exposed to form fuse windows 45 (FIG. 5C).

[0009]

However, as semiconductor devices become more highly integrated and multilayer wiring of metal films becomes more common, it becomes more difficult to create a fuse window as described below.

That is, in order to cut the fuse by irradiating the laser beam, it is necessary to reduce the thickness of the interlayer insulating film covering the fuse, thereby increasing the thickness of the interlayer insulating film to be etched off. In order to increase the thickness of the interlayer insulating film to be etched off, it is necessary to increase the thickness of the resist material layer, and accordingly, the amount of light exposure for patterning the resist material layer must be increased. As a result, the manufacturing cost of the semiconductor device increases.

Further, a plurality of fuses are arranged below the fuse window, and the degree of light reflection between the fuse portion and the portion other than the fuse is different, so that the amount of light exposure to the resist material layer is not uniform. Problem. For this reason, the exposure amount must be set to the portion having the smallest exposure amount, and as a result, a large exposure amount is required.

When the fuse window is formed simultaneously with the formation of the bonding pad, as shown in FIG.
It is necessary to etch the interlayer insulating film 44 on the fuse window 45 side for a longer time than the interlayer insulating film 44 on the bonding pad 48 side.
The surface of No. 8 is exposed to the etchant for a long time, and there is a problem that the bonding property is reduced.

An object of the present invention is to solve the above-mentioned problems of the prior art, and when forming a fuse window in a semiconductor device, without increasing the light exposure for patterning a resist material layer. An object is to shorten the exposure time.

[0014]

According to the present invention, a light reflecting layer for patterning a resist material layer is provided in an interlayer insulating film above and around a fuse.
Alternatively, the present inventors have found that providing a fuse window in the interlayer insulating film above the fuse so as to cover the whole of the plurality of fuses facilitates opening of the fuse window, and has completed the present invention.

That is, a first aspect of the present invention relates to a method of manufacturing a semiconductor device having a fuse group in which a plurality of fuses are arranged in parallel, wherein a fuse window is formed in an interlayer insulating film above the fuse group. A stack of fuses formed on an insulating film of a semiconductor substrate and an interlayer insulating film formed thereon, wherein a light reflecting layer is provided in the interlayer insulating film above a gap between adjacent fuses. Forming a resist material layer on the interlayer insulating film of the laminated body; forming a resist pattern layer corresponding to the fuse window by exposing and developing the resist material layer with light for resist patterning; and resist. Provided is a manufacturing method including a step of etching an interlayer insulating film using a pattern layer as an etching resist.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a fuse group in which a plurality of fuses are arranged in parallel, wherein a fuse window is formed in an interlayer insulating film above the fuse group. A stacked body in which a fuse group is formed on an insulating film of a semiconductor substrate and an interlayer insulating film is formed thereon, wherein a light reflection layer covers the entire fuse group in the interlayer insulating film above the fuse group Forming a resist material layer on the interlayer insulating film of the laminate provided as described above; forming a resist pattern layer corresponding to the fuse window by exposing and developing the resist material layer with light for resist patterning Step: using the resist pattern layer as an etching resist, etching the interlayer insulating film until the light reflecting layer is exposed; removing the exposed light reflecting layer by etching Extent; and to provide a manufacturing method including a step of etching the interlayer insulating film on the fuses.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the drawings.

FIG. 1 is an explanatory view of a manufacturing process of the first preferred manufacturing method of the present invention.

First, a semiconductor substrate 10 such as a silicon wafer
A fuse group 3 composed of a plurality of fuses 2 made of W-polycide or the like, and an interlayer insulating film 4 made of silicon dioxide or the like formed on the insulating film 1 of FIG. A laminate 5 having a light reflection layer 6 provided in an interlayer insulating film 4 above a gap 2a of a fuse 2 to be formed is prepared (FIG. 1A, top view, FIG. 1B, XX sectional view). Then, a resist material layer 7 is formed on the interlayer insulating film 4 (FIG. 1C). In FIG. 1A, a portion surrounded by a dotted line is a fuse window.

Here, the light reflecting layer 6 is preferably formed of a material (for example, aluminum) having a higher reflectivity to the resist patterning light than the fuse 2. Such a light reflection layer 6 can be formed as a dummy wiring pattern when forming an internal wiring.

The formation of the resist material layer 7 can be carried out by spin coating a usual positive resist solution.

Next, the resist material layer 7 is exposed to light for resist patterning and developed according to a conventional method to form a resist pattern layer 8 corresponding to the fuse window (FIG. 1D). In this case, since the light reflection layer 6 is formed, the exposure time can be reduced without increasing the exposure amount.

Next, using the resist pattern layer 8 as an etching resist, the interlayer insulating film 4 is etched according to a conventional method so that a thin interlayer insulating film remains on the fuse 2.
Thereby, the fuse window 9 can be formed stably, and the fuse group 3 in which the plurality of fuses 2 are arranged in parallel is provided.
And a semiconductor device in which the fuse window 9 is stably formed in the interlayer insulating film 4 above the fuse group 3 with good reproducibility (FIG. 1E).

Next, FIG. 2 is an explanatory view of the manufacturing process of the second preferred manufacturing method of the present invention.

First, a semiconductor substrate 10 such as a silicon wafer
A fuse group 3 composed of a plurality of fuses 2 made of W-polycide or the like, and an interlayer insulating film 4 made of silicon dioxide or the like formed thereon, A stacked body 5 having a light reflecting layer 6 'provided in an interlayer insulating film 4 above the group 3 so as to cover the entire group 3 is prepared (FIG. 2A top view, FIG. 2B XX sectional view). ). Then, a resist material layer 7 is formed on the interlayer insulating film 4 (FIG. 2C). In FIG. 2A,
A portion surrounded by a dotted line is a fuse window.

Here, it is preferable that the light reflecting layer 6 'is formed of a material (for example, aluminum) having a higher reflectivity to the resist patterning light than the fuse 2. Such a light reflecting layer 6 'can be formed as a dummy wiring pattern when forming an internal wiring.

The formation of the resist material layer 7 can be carried out by spin coating a normal positive resist solution.

Next, the resist material layer 7 is exposed to light for resist patterning and developed according to a conventional method to form a resist pattern layer 8 corresponding to the fuse window (FIG. 2D). In this case, since the light reflection layer 6 'is formed, the exposure time can be shortened without increasing the exposure amount.

Next, using the resist pattern layer 8 as an etching resist, the interlayer insulating film 4 is etched in a usual manner until the light reflecting layer 6 'is exposed (FIG. 2E), and the exposed light reflecting layer 6' is exposed. Is removed by etching (Fig. 2
(F)) Then, the interlayer insulating film 4 is etched again according to a conventional method so that a thin interlayer insulating film remains on the fuse 2. As a result, the fuse window 9 can be formed stably, and the fuse group 3 includes a plurality of fuses 2 arranged in parallel, and the interlayer insulating film 4 above the fuse group 3 is provided.
A semiconductor device in which the fuse window 9 is formed stably with good reproducibility can be obtained (FIG. 2G).

When the fuse window is formed simultaneously with the formation of the bonding pad, the interlayer insulating film 4 is etched off until the bonding pad 20 is exposed as shown in FIG. After removing the pattern layer 8, a resist material layer 7 'is formed again (FIG. 3).
(B)). Thereafter, as described with reference to FIG. 2, the resist material layer 7 'is processed into a resist pattern layer 8' corresponding to the fuse window, and the resist pattern layer 8 'is further used as an etching resist to form the light reflection layer 6' and the interlayer insulating film on the fuse 2. 4 is etched to form a fuse window 9 (FIG. 3c)). Thus, in the case of the embodiment of FIG.
Although the upper resist material layer is relatively thick, but the light reflection layer 6 'is present, the amount of light exposure and the exposure time for patterning the resist material layer can be suppressed.

[0031]

According to the present invention, when forming a fuse window in a semiconductor device, the exposure time can be shortened without increasing the amount of light exposure for patterning a resist material layer, and the fuse can be stably formed. Windows can be formed.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a manufacturing process of a manufacturing method of the present invention.

FIG. 2 is an explanatory view of a manufacturing process of the manufacturing method of the present invention.

FIG. 3 is an explanatory view of a manufacturing process of the manufacturing method of the present invention.

FIG. 4 is a sectional view of a fuse portion of a conventional semiconductor device.

FIG. 5 is a diagram illustrating a manufacturing process of a conventional method for manufacturing a semiconductor device.

FIG. 6 is an explanatory diagram of a problem associated with a conventional semiconductor device manufacturing method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Insulating film, 2 ... Fuse, 3 ... Fuse group, 4 ... Interlayer insulating film, 6, 6 '... Light reflection layer, 9 ... Fuse window, 10 ...
Semiconductor substrate

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: a fuse group in which a plurality of fuses are arranged in parallel; and a fuse window formed in an interlayer insulating film above the fuse group. Wherein a fuse group is formed and an interlayer insulating film is formed thereon, wherein the light reflecting layer is provided in the interlayer insulating film above a gap between adjacent fuses. Forming a resist material layer on the film; forming a resist pattern layer corresponding to the fuse window by exposing and developing the resist material layer with light for resist patterning; and using the resist pattern layer as an etching resist. A manufacturing method including a step of etching an interlayer insulating film. 2. A method of manufacturing a semiconductor device, comprising: a fuse group in which a plurality of fuses are arranged in parallel; and a fuse window formed in an interlayer insulating film above the fuse group. Wherein a fuse group is formed, and an interlayer insulating film is formed thereon, wherein the light reflecting layer is provided in the interlayer insulating film above the fuse group so as to cover the entire fuse group. Forming a resist material layer on the interlayer insulating film; forming a resist pattern layer corresponding to the fuse window by exposing and developing the resist material layer with resist patterning light;
Using the resist pattern layer as an etching resist, etching the interlayer insulating film until the light reflecting layer is exposed;
A manufacturing method including a step of removing the exposed light reflecting layer by etching; and a step of etching an interlayer insulating film on the fuse group.