JP2000349605A - Identification circuit - Google Patents

Abstract

(57) [Summary] PROBLEM TO BE SOLVED: To provide a knowledge that a transmission side can generate a multi-level signal more freely.
It is to provide another circuit. SOLUTION: In an identification circuit D1, a waveform shaping circuit 3 is provided.
Converts the waveform of one of the two branched multi-level signals MS into a control signal.
Based on the control signal CS from the signal generation circuit 10,
When the detection circuit 4 has the first reference level RL₁ Can be detected correctly
Shape the waveform. The detection circuit 4 outputs the output of the waveform shaping circuit 3.
Force signal OS_Three From the first reference level RL ₁ Detect
You. Also, the reference level generation circuit 5 outputs the multi-level signal MS
Reference level RL of 2_Two Generate The threshold generation circuit 6
First reference level RL₁ And a second reference level RL_Two
Based on the required number of thresholds Th₁ , Th_Two And Th
_Three Generate The comparators 82 to 84 are connected to the other
The amplitude of the multi-level signal MS and the threshold value Th₁ ~ Th_Three Compare with
You. The control signal generation circuit 10 determines the ratio of each of the comparators 82 to 84.
A control signal CS is generated based on the comparison result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an identification circuit,
More specifically, the present invention relates to an identification circuit that automatically generates an optimum threshold value and discriminates an amplitude of an input multilevel signal using the generated threshold value.

[0002]

2. Description of the Related Art Conventionally, a multi-level signal having three or more amplitude values may be transmitted and received in a transmission system. In such a multilevel signal, information is assigned to each amplitude value.
The receiving side of this transmission system discriminates the amplitude of the sent multi-level signal using a predetermined threshold value. However,
Since the amplitude of the multi-level signal fluctuates due to various factors, a fixed threshold value often deviates from the center between a certain amplitude value of the multi-level signal and the amplitude value one level below it. As a result, the receiving side may perform incorrect amplitude discrimination, or the pulse width of the identification result may be distorted.

[0003] In a transmission system of a binary signal having a value of "Hi" or "Lo", the receiving side may perform amplitude discrimination by an identification circuit CD as shown in FIG. In FIG. 12, the identification circuit CD can automatically generate a threshold suitable for amplitude discrimination even when the amplitude of the received binary signal fluctuates (so-called automatic threshold control). 21, a branching unit 22, a peak detection circuit 23, a base level generation circuit 24, a threshold value generation circuit 25, and a comparator 26.

[0004] A branching unit 22 divides the binary signal input through the input terminal 21 into two, outputs one binary signal to a peak detection circuit 23, and outputs the other binary signal to a comparator 26. Output. The peak detection circuit 23 detects and holds the peak value of the input binary signal. The detected peak value is
It has the same potential as the binary signal “Hi” and has a threshold generation circuit 2
5 given. Further, the base level generation circuit 24
A base level having the same potential as “Lo” of the value signal is generated, and given to the threshold generation circuit 25. The threshold generation circuit 25
An intermediate level between the input peak value and the base level is generated and output to the comparator 26 as a threshold. The comparator 26
The amplitude of the other input binary signal is compared with a threshold value, and the result is output as the identification result. As described above, since the peak detection circuit 23 detects the peak value, even if the amplitude of the binary signal fluctuates, the threshold generation circuit 25 can automatically generate a threshold corresponding to the amplitude fluctuation. .

[0005]

When the above-described discrimination circuit CD is applied to a transmission system for multi-level signals, in principle, the threshold generation circuit 25 can be used to generate a multi-level signal from a circuit for generating an intermediate level. What is necessary is just to change to the circuit which produces | generates the several threshold value which has an amplitude value and the intermediate level of the amplitude value 1 level lower. However, in a multi-level signal, generally, the ratio (mark rate) at which each amplitude value appears is lower than that of a binary signal. Therefore, a case may occur in which the maximum amplitude value of the multilevel signal does not appear within the period defined by the time constant of the peak detection circuit 23. In such a case, the peak value detected by the peak detection circuit 23 does not become the same potential as the maximum amplitude value of the multilevel signal, so that the threshold generation circuit 25 cannot generate an accurate threshold.

Further, it is difficult to manage the mark ratio of a multi-level signal as compared with that of a binary signal. Further, the average value of the multilevel signal does not always indicate the center level of the amplitude. Therefore, it is not practical to replace the peak detection circuit 23 with an average value detection circuit.

[0007] From the above background, in the conventional multi-level signal transmission system, the transmitting side determines at least the maximum amplitude value (and, if necessary, the minimum amplitude value) of the multi-level signal at predetermined time intervals. It is necessary to transmit the signal to the receiving side to charge the capacitor of the peak detection circuit 23, or to generate a multi-level signal in which at least the maximum amplitude value (or the minimum amplitude value in some cases) appears appropriately. was there. As described above, when the conventional identification circuit CD is applied to a transmission system of a multi-level signal, there is a problem that generation of the multi-level signal on the transmission side is restricted.

Therefore, an object of the present invention is to provide an identification circuit that allows a transmitting side to more freely generate a multilevel signal.

[0009]

A first aspect of the present invention is an identification circuit for identifying a multi-level signal having three or more amplitude values, wherein a multi-level signal input from the outside is branched into two. A first branching section, a waveform shaping circuit for shaping the waveform of one multi-level signal output from the first branching section under a predetermined condition, and a first reference signal based on an output signal of the waveform shaping circuit. A detection circuit for detecting a level, a reference level generation circuit for generating a second reference level of a multilevel signal input from the outside, and a required number of thresholds based on the first and second reference levels A threshold generation circuit, a comparison circuit that compares the threshold value generated by the threshold generation circuit with the amplitude of the other multi-level signal output from the first branching unit, and a control unit that performs control based on a comparison result by the comparison circuit. And a control signal generation circuit for generating a signal. Shaping circuit, a control signal based on the control signal outputted from the generating circuit, the waveform of the multilevel signal to be input, the detection circuit shapes the first reference level to correct detectable waveform.

A second invention is dependent on the first invention,
The threshold generation circuit generates different thresholds (the number of amplitude values minus one) based on the first and second reference levels, and the comparison circuit generates an input multi-level signal based on the (multiplied amplitude value). A second branching unit that branches into the number of 1) and a threshold generated by the threshold generation circuit are input one by one, and a multi-level signal branched by the second branching unit is input one by one. ,
(The number of amplitude values-1) comparators, and each comparator compares the input threshold with the amplitude of the multi-level signal.

According to the first and second aspects of the present invention, the waveform shaping circuit can be configured such that even if a multi-level signal in which a specific amplitude value is biased in a certain time interval is input to the identification circuit,
Since the above-mentioned waveform shaping is performed based on the control signal,
The comparison circuit can use the accurate threshold value to discriminate the amplitude of the multilevel signal. As a result, the restriction on the generation of the multi-level signal on the transmitting side is reduced, and the multi-level signal can be generated more freely.

A third invention is dependent on the first invention,
The amplitude of the other multi-level signal output from the first branch unit;
The apparatus further includes an amplitude adjustment circuit for adjusting a relative difference between the threshold value and the threshold value generated by the threshold value generation circuit.

According to the third aspect, the amplitude adjustment circuit adjusts the relative difference between the amplitude of the other multi-level signal and the threshold. Therefore, the threshold value generation circuit generates a more optimal threshold value, so that the possibility that an erroneous identification result is generated is significantly reduced, and further, pulse width distortion is less likely to occur in the identification result.

A fourth invention is dependent on the first invention,
The reference level generation circuit generates a potential when no multi-level signal is transmitted as a second reference level. According to the fourth aspect, the second reference level can be easily generated.

A fifth invention is dependent on the first invention,
The control signal defines a time section in which a predetermined amplitude value exists in a biased manner in the input multi-level signal, and the waveform shaping circuit determines a predetermined time section in the time section defined by the control signal. The waveform of the input multi-level signal is shaped so that the amplitude value becomes the same value as the second reference level.

According to the fifth aspect, the control signal generation circuit generates a control signal for defining a time section in which the predetermined amplitude value is biased based on the comparison result from the comparison circuit. Is fed back to the waveform shaping circuit, so that the waveform shaping circuit can appropriately shape the waveform of the multilevel signal currently received by the identification circuit.

According to a sixth aspect of the present invention, there is provided an identification circuit for identifying a multi-level signal having three or more amplitude values, wherein the multi-level signal input from the outside is branched into three to form first to third multi-level signals. A first branching section for outputting a value signal, a first waveform shaping circuit for shaping the waveform of the first multi-level signal output from the first branching section under a predetermined condition, and a first waveform From the output signal of the shaping circuit,
A first detection circuit for detecting the first reference level, a second waveform shaping circuit for shaping the waveform of the second multi-level signal output from the first branch section under predetermined conditions, A second detection circuit that detects a second reference level from an output signal of the second waveform shaping circuit; a threshold generation circuit that generates a required number of thresholds based on the first and second reference levels; A comparison circuit that compares the threshold value generated by the threshold value generation circuit with the amplitude of the third multilevel signal output from the first branch unit;
A control signal generation circuit for generating a control signal based on a comparison result by the comparison circuit, wherein the first waveform shaping circuit comprises:
Based on the control signal output from the control signal generation unit, the waveform of the input first multilevel signal is shaped into a waveform that allows the first detection circuit to correctly detect the first reference level.
The waveform shaping circuit of the above, based on the control signal output from the control signal generation unit, the waveform of the input second multi-level signal,
A second detection circuit shapes the second reference level into a waveform that can be correctly detected.

A seventh invention is dependent on the sixth invention,
The threshold value generation circuit generates different threshold values (the number of amplitude values minus one) based on the first and second reference levels, and the comparison circuit generates the input third multi-valued signal as ( A second branching unit that branches into 1) number of amplitude values and a threshold generated by the threshold generation circuit are input one by one, and a third multilevel signal branched by the second branching unit is input. And (Comparison of the number of amplitude values-1) comparators which are input one by one, and each comparator compares the input threshold with the amplitude of the third multi-level signal.

According to the sixth and seventh inventions, the first and second waveform shaping circuits input a multi-valued signal in which a specific amplitude value is biased in a certain time section to the identification circuit. Even so, since the waveform shaping is performed based on the control signal as described above, the comparison circuit can use the accurate threshold value to discriminate the amplitude of the multilevel signal. As a result, the restriction on the generation of the multi-level signal on the transmitting side is reduced, and the multi-level signal can be generated more freely.

An eighth invention is according to the sixth invention,
The apparatus further includes an amplitude adjustment circuit that adjusts a relative difference between the amplitude of the third multi-level signal input to the comparison circuit and the threshold generated by the threshold generation circuit. A ninth invention is according to the sixth invention, wherein the control signal specifies a time section in which a predetermined amplitude value is present in a biased manner in the input multi-level signal, The second waveform shaping circuit is configured to input the first and second input signals such that the predetermined amplitude value becomes the same value as the first and second reference levels during the time interval specified by the control signal. Is shaped.

According to a tenth aspect of the present invention, there is provided an identification circuit for identifying a multi-level signal having three or more amplitude values, comprising: a first branching unit that branches a multi-level signal input from the outside into two; A first waveform shaping circuit for shaping the waveform of one of the multi-valued signals output from the branching unit under predetermined conditions, and shaping the waveform of the output signal of the first waveform shaping circuit under predetermined conditions Second
And the output signals of the second waveform shaping circuit are provided, and the output signal of the first detection circuit for detecting the first reference level and the output signal of the second waveform shaping circuit are provided from the output signal. A second detection circuit that detects a second reference level from the output signal; a threshold generation circuit that generates a required number of thresholds based on the first and second reference levels;
A comparison circuit that compares the threshold value generated by the threshold value generation circuit with the amplitude of the other multi-level signal output from the first branch unit; and a control signal that generates a control signal based on a comparison result by the comparison circuit. A first waveform shaping circuit, based on a control signal output from the control signal generating unit, and a first detection circuit that adjusts a waveform of the input multilevel signal to a first reference level. Shape the waveform into a correctly detectable
Is based on a control signal output from the control signal generation unit, and detects a waveform of an output signal of the first waveform shaping circuit and a waveform that allows the second detection circuit to correctly detect a second reference level. To be shaped.

An eleventh invention is according to the tenth invention, wherein the threshold value generating circuits are different from each other (the number of amplitude values-
1) thresholds are generated based on the first and second reference levels, and the comparing circuit branches the input multi-level signal into (the number of amplitude values-1) second branching unit And the threshold value generated by the threshold value generation circuit is input one by one, and the multi-level signal branched by the second branching unit is input one by one. And each comparator compares the input threshold with the amplitude of the multi-level signal.

According to the tenth and eleventh aspects, the first aspect
And the second waveform shaping circuit performs the above-described waveform shaping based on the control signal even when a multi-level signal in which a specific amplitude value is biased in a certain time section is input to the identification circuit. Therefore, the comparison circuit can use the accurate threshold value to discriminate the amplitude of the multilevel signal. This reduces the constraints on the transmitter when generating multi-level signals,
Multi-level signals can be generated more freely.

A twelfth aspect is according to the tenth aspect, wherein the relative value between the amplitude of the other multi-level signal output from the first branching unit and the threshold value generated by the threshold value generation circuit is determined. And an amplitude adjusting circuit for adjusting the difference.

A thirteenth invention is according to the tenth invention, wherein the control signal defines a time section in which a predetermined amplitude value exists in a biased manner in the input multi-level signal. The first and second waveform shaping circuits shape the waveforms of the respective input signals so that a specific amplitude value becomes the same as the first and second reference levels in a time section defined by the control signal. I do.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a multi-level signal MS input to an identification circuit D1 according to a first embodiment will be described with reference to FIG. The multi-level signal MS is a signal in which each symbol is represented by any one of n (n is a natural number of 3 or more) amplitude values. FIG. 1 shows a case where n = 4 as an example. Now, for convenience of explanation, the multi-level signal MS has amplitude values “W”, “X”, “Y” and “Z”.
It is assumed that (W>X>Y> Z). In addition, |
Assume that W−X | = | X−Y | = | Y−Z | = ΔV.

The above multi-level signal MS is generated on the transmission side of the transmission system. The multi-level signal MS does not need to be a signal in which each amplitude value is appropriately mixed, and a certain specific amplitude value may exist in a certain time section. In the multi-level signal MS of FIG. 1A, the amplitude value “W” is not used between the time sections T ₁ and T ₃ , and the amplitude value “W” is used between the time sections T _2. It exists unevenly. The transmitting side transmits the above-described multi-level signal MS to the receiving side via a transmission path in the state of an electric signal, or converts the multi-level signal MS into an optical signal and transmits the optical signal to the receiving side.

FIG. 2 shows a schematic configuration on the receiving side in the case of an optical transmission system. In FIG. 2, the receiving side includes an optical receiver Rx and an identification circuit D1. The optical receiver Rx converts an optical signal received via an optical transmission line (not shown) into a multi-level signal MS and outputs it to the identification circuit D1. When the transmitting side transmits the multi-level signal MS in the state of an electric signal, the optical receiver Rx is unnecessary, and the multi-level signal MS is directly input to the identification circuit D1.

The identification circuit D 1 includes an input terminal 1, a first branch section 2, a waveform shaping circuit 3, a detection circuit 4, a reference level generation circuit 5, a threshold generation circuit 6, and an amplitude adjustment circuit 7.
, A comparison circuit 8, an output terminal group 9, and a control signal generation circuit 10.

The multi-level signal MS output from the optical receiver Rx or the multi-level signal MS transmitted on the transmission path is input to the input terminal 1. The first branch unit 2 branches the multi-level signal MS input through the input terminal 1 into two. One of the two-branched multi-level signal MS is supplied to the drain of a transistor 31 (described later) of the waveform shaping circuit 3, and the other is supplied to the amplitude adjustment circuit 7.

The waveform shaping circuit 3 includes a control signal generating circuit 10
The detection circuit 4 shapes the waveform of the input multi-level signal MS into a waveform that allows the detection circuit 4 to correctly detect the first reference level RL ₁ (described later) based on a control signal CS (described later) output from the control circuit CS. As a configuration example therefor, the waveform shaping circuit 3 includes a transistor 31 and two resistors 32 and 33.
The drain of the transistor 31 is connected to one output terminal of the first branch 2. The source is connected to the anode of the diode 41 of the detection circuit 4. Further, a resistor 32 is connected between the drain and the source. Further, the source is connected to the reference level generation circuit 5 via the resistor 33. The gate is connected to the output terminal of the control signal generation circuit 10.

The value R ₃₂ of the resistor ₃₂ and the value R _{33 of the} resistor ₃₃
Is determined by the format of the multi-level signal MS and / or the specifications of the identification circuit D1. Hereinafter, an example of a resistance value R ₃₂ and R _33. In the present embodiment, the first reference level R
L ₁ is assumed to be chosen to substantially the same potential as the amplitude value "X". Further, assume that the specifications of the identification circuit D1, the waveform shaping circuit 3 adjusts the amplitude value "W" to the first reference level RL _1. Under these assumptions, the resistance value R ₃₂ and the resistance value R ₃₃ is, R _32: R ₃₃ = 1: 2 is chosen to establish.

The control signal CS output from the control signal generation circuit 10 is input to the gate of the transistor 31. Although the details will be described later, when the control signal generation circuit 10 determines that the amplitude value “W” is present unevenly in the multi-level signal MS, it generates the “Hi” control signal CS, Is determined, the “Lo” control signal CS
Is generated (see FIG. 1B). When the control signal CS is "H
In the case of “i”, since the transistor 31 does not conduct, the waveform shaping circuit 3 outputs the output signal of the first branch unit 2 to the resistor 32
And 33 are applied to the anode of diode 41. When the control signal CS is “Lo”, the transistor 31 conducts, and as a result, the multi-level signal MS of the first branch 2 is directly supplied to the anode of the diode 41.

Next, a specific example of the operation of the waveform shaping circuit 3 will be described. As is clear from the above description, FIG.
When the multi-valued signal MS having the waveform as shown in (a) is input to the identification circuit D1, the control signal generation circuit 10 sets the time interval T ₂
, The control signal CS indicating “Hi” is supplied to the transistor 3
1 and between the time intervals T ₁ and T ₃ , “Lo”
(See FIG. 1B). Therefore, the waveform shaping circuit 3 directly supplies the multi-level signal MS from the first branch unit 2 to the anode of the diode 41 during the time intervals T ₁ and T ₃ . Also, the time section T ₂
In the meantime, the multi-level signal MS from the first branch 2 is divided by the resistors 32 and 33,
To the anode. As a result, the amplitude of the output signal OS ₃ of the waveform shaping circuit 3, as in FIG. 1 (c), the time interval T _2, when compared to the amplitude of the input multi-level signal MS, substantially attenuated to 2/3 The peak value is substantially the same as the amplitude value “X”.

Referring again to FIG. Detection circuit 4, the output signal OS _3, detects the first reference level RL _1.
As a preferable configuration therefor, the detection circuit 4 includes a diode 41, a capacitor 42, a transistor 43,
And a current source 44. The anode of diode 41 is connected to the source of transistor 31. Its cathode is connected to the gate of transistor 43. The cathode is grounded via a capacitor 42. The drain of the transistor 43 is connected to a constant voltage source (not shown), and the source is grounded via a current source 44. Further, the source is a resistor 61 (described later) of the threshold generation circuit 6.
Connected to

In the detection circuit 4 having the above configuration, the
Threshold value V of threshold 41_thIs substantially the first reference level RL₁ When
The same potential is selected. The capacitor 42 is
Output signal OS via the ode 41_Three And the input power
Pressure V_i And output voltage V_o Is charged to the same value as
You. In this way, the capacitor 42 outputs the output signal OS
_Three Of the first reference level RL₁ age
To one end of the resistor 61. The transistor 4
3 and the current source 44 cut off the discharge path of the capacitor 42
Configure the buffer. This buffer allows the capacitor
42 is affected by the output impedance of the detection circuit 4
Without the output signal OS_Three The peak value of
Can be.

Next, a specific example of the operation of the detection circuit 4 will be described. In the present embodiment, the anode of the diode 41, the signal of FIG. 1 (c) is given, the capacitor 42, as the first reference level RL _1, the amplitude value "X"
Is detected and held. Therefore, the first reference level RL ₁ output from the detection circuit 4, as shown in FIG. 1 (d), has the same potential as the constant and the amplitude value "X" to the time.

The reference level generation circuit 5 generates a _second reference level RL2 of the multi-level signal MS. In this embodiment,
Assume the second reference level RL ₂ is, the base level of the multi-level signal MS (that is, amplitude value "Z") is selected at substantially the same potential as the. Further, in the present embodiment, an optical receiver Rx is provided in a stage preceding the identification circuit D1. In such a case, the reference level generation circuit 5 outputs the dummy optical receiver 51
It is preferable to be composed of Dummy optical receiver 51
Has the same input / output characteristics as the optical receiver Rx installed in the preceding stage of the identification circuit D1, and its output terminals include a resistor 33, a resistor 64 (described later) of the threshold generation circuit 6, and an amplitude adjustment circuit 7
Is connected to a resistor 72 (described later). From the output terminal of the optical receiver 51, the potential when the multi-level signal MS is not transmitted is output as the _second reference level RL2.

In the present embodiment, the optical receiver Rx has the configuration shown in FIG.
Since the multi-level signal MS shown in (a) is output to the input terminal 1, the output terminal of the dummy optical receiver 51 is
(D), the as the second reference level RL _2,
The base level (amplitude value “Z”) of the multi-level signal MS is output.

The optical receiver Rx is provided before the identification circuit D1.
Is not installed (that is, in the case of an electric transmission system), it is preferable that the reference level generation circuit 5 be configured by a reference potential generation circuit. The reference potential generation circuit 5 generates the same potential as the base level of the multi-level signal MS (that is, the amplitude value “Z”).

The threshold value generation circuit 6 receives the first
And a required number of thresholds are generated based on the reference level RL ₁ of the second reference level and the second reference level RL ₂ from the reference level generation circuit 5. In the present embodiment, since the multi-level signal MS is composed of four values, three thresholds Th ₁ , Th _2, and Th
₃ needs to be generated. Therefore, the threshold generation circuit 6
Includes four resistors 61-64 and three wires 65-67. The resistors 61 to 64 are connected in series between the source of the transistor 43 and the output terminal of the reference level generation circuit 5. The wiring 65 is composed of two adjacent resistors 61 and 6
2 and the comparator 82 of the comparison circuit 8
(Described later). Other wirings 66 and 67 are:
Between resistors 62 and 63, and resistors 63 and 64
And comparators 83 and 84
(Described later).

The amplitude adjusting circuit 7 controls the amplitude of the other multi-level signal MS output from the first branch unit 2 and the threshold value generating circuit 6
Adjust the relative level difference between the threshold and the threshold generated by. As one configuration example for realizing this function, the amplitude adjustment circuit 7 includes two resistors 71 and 72 and a wiring 73. The resistors 71 and 72 are connected in series between the other output terminal of the first branch unit 2 and the output terminal of the reference level generation circuit 5. The wiring 73 is drawn out from between the resistors 71 and 72 and is connected to the second branch portion 81 of the comparison circuit 8.

Here, the value R of the resistors 61-64₆₁~ R
₆₄And the value R of the resistor 71₇₁And the value R of the resistor 72₇₂One with
An example will be described. Resistance value R₆₁~ R₆₄And the resistance value R₇₁
And R ₇₂Is the format and / or knowledge of the multi-level signal MS.
Determined based on the specifications of separate circuit D1, but related to each other
I do. For example, the resistance value R₆₁~ R₆₄Is R₆₁: R₆₂:
R₆₃: R₆₄= 1: 2: 2: 1
Assume. Also, the input of one and the other of the threshold generation circuit 6 is performed.
The force terminal has a first reference level RL₁ (The amplitude value "X"
The same potential) and the second reference level RL_Two (Amplitude value "Z"
And the same potential). In this case, the threshold Th₁ , T
h_Two And Th_Three Is the second reference level RL_Two Based on
And have potentials of 5X / 6, X / 2 and X / 6.
Here, the amplitude value “X” is based on the amplitude value “Z”.
Since X = 2ΔV, as shown in FIG.
The generation circuit 6 receives the signal T via the wirings 65, 66 and 67.
h₁ = 5ΔV / 3, Th_Two = ΔV and Th_Three = ΔV /
A threshold value of 3 is given to the comparison circuit 8.

Here, when the multi-level signal MS of FIG. 1A is subjected to amplitude discrimination, generally three thresholds Th ₁ ′ and Th ₂ ′ are used.
And Th ₃ ′ are preferably selected at the center level between a certain amplitude value and an amplitude value one level below the amplitude value. Therefore, usually, 5ΔV / 2 and 3ΔV / 2 based on the amplitude value “Z”.
And ΔV / 2. In this case, (Th ₁ / Th
_{1 ') = (Th 2 /} Th 2') = (Th 3 / Th 3 ')
= 2/3 holds. Therefore, the threshold value Th ₁ ,
In order to accurately discriminate the other multi-level signal MS output from the first branching unit 2 using Th ₂ and Th ₃ , the resistance values R ₇₁ and R ₇₂ are determined as follows: R ₇₁ : R ₇₂ = 1: 2 is preferably selected to hold. In such a case, the amplitude adjusting circuit 7, as shown in FIG. 3 (b), to generate a signal OS ₇ that the amplitude of the input other multi-level signal MS is divided 2/3 binary, the comparison circuit 8 give.

The comparison circuit 8 compares the threshold values Th ₁ , Th ₂ and Th ₃ from the threshold value generation circuit 6 with the amplitude of the output signal OS ₇ of the amplitude adjustment circuit 7. The comparison result indicates the identification result of the multilevel signal MS input to the identification circuit D1. As a general configuration for identifying a quaternary signal, the comparison circuit 8 includes a second branch unit 81 and three comparators 82 to 82.
84. The second branching unit 81 branches the output signal OS7 of the amplitude adjustment circuit ₇ into three. Comparators 82 to 84 include:
3 branch signal OS ₇ is input one by one. Further, the comparators 82 to 84 are connected through wires 65 to 67,
The threshold Th ₁ to TH ₃ is input. The comparator 82 compares the magnitude relation between the amplitude and the threshold value Th ₁ of the input signal OS _7, and outputs the comparison result represented by "Hi" or "Lo". Comparators 83 and 84 compares the amplitude of the input signal OS _7, the magnitude relation between the threshold Th ₂ and Th _3,
The comparison result represented by “Hi” or “Lo” is output. The comparison circuit 8 outputs the comparison results of the comparators 82 to 84 to the outside through output terminals 91 to 93 of the output terminal group 9. The comparison result output from the output terminals 91 to 93 indicates the identification result of each symbol of the multi-level signal MS.

With the above configuration, when the amplitude value of the multi-level signal MS input to the identification circuit D1 is "W", all the comparators 82 to 84 output "H" through the output terminals 91 to 93.
i ”to the outside, and when the amplitude value is“ X ”, only the comparators 83 and 84 output“ Hi ”through the output terminals 92 and 93, and when the amplitude value is“ Y ”, , Only the comparator 84 outputs “Hi” through the output terminal 93, and when the amplitude value is “Z”, all the comparators 82 to
84 outputs “Lo” through the output terminals 91 to 93. Further, the above comparison result is transmitted to the control signal generation circuit 10. Here, for the convenience of the following description, the comparison result {Hi, Hi, Hi} is calculated for all comparators 82 to 84.
Indicates that "Hi" has been output. The comparison result {Lo, Hi, Hi} indicates that “Hi” has been output only from the comparators 83 and 84. Further, the comparison result {Lo, Lo, Hi} is obtained from only the comparator 84 as “Hi”.
Is output. Furthermore, the comparison result {Lo, L
o, Lo｝ is “Lo” from all the comparators 82 to 84.
Is output.

The control signal generation circuit 10 typically has a CP
U (Central Processing Uni)
t), FPGA (Field Programmable)
e Gate Array) or a logic circuit, and generates a control signal CS (see FIG. 1B) based on a comparison result from the comparison circuit 8 to generate a transistor 31
Give to the gate. Hereinafter, an example of a method of generating the control signal CS will be described.

The control signal generation circuit 10 has a parallel 3-bit
The comparison result is repeatedly received at substantially constant time intervals. System
The control signal generation circuit 10 determines the latest comparison result in advance.
Number N_PRE Only memorize inside. Next, control signal generation
The circuit 10 stores the currently stored N _PRE Among the comparison results,
How many comparison results {Hi, Hi, Hi} are included
Count. Next, the control signal generation circuit 10
The number N of fruits {Hi, Hi, Hi}_WIs the reference value N_REFThan
Is also determined.

The control signal generation circuit 10_W > N_REFTo
If it is determined to be satisfied, the multi-level signal MS currently being received
On the other hand, assuming that the amplitude value “W” exists unevenly,
A control signal CS having "Hi" is generated. Meanwhile, control
The signal generation circuit 10_W ≤N_REFDetermined to satisfy
In this case, the amplitude value “W” is present in the multilevel signal MS currently being received.
Assuming that there is no bias, control signal "Lo"
Generate CS. As described above, the control signal CS is
Is done. According to this generation method, the multi-level signal shown in FIG.
When the signal MS is input to the identification circuit D1, the time interval T₁ 
And T _Three During which the control signal having a value of “Lo” is substantially
The signal CS is generated and transmitted to the waveform shaping circuit 3. Ma
Time interval T_Two Has a value of substantially “Hi” during
The control signal CS is transmitted to the waveform shaping circuit 3. Note that N
_PRE , N_W N_REFDepending on how to select the control signal CS,
The periods of “Hi” and “Lo” are slightly shifted.

Next, the technical effects of the identification circuit D1 will be described. When the conventional discrimination circuit CD (see FIG. 12) is applied to discrimination of the multi-level signal MS, the multi-level signal MS is input to the peak detection circuit 23 without waveform shaping. The amplitude value becomes “W” or “X”, and becomes undefined. For this reason, the identification circuit CD cannot generate an accurate threshold value, and the multi-level signal MS (FIG. 1) in which a specific amplitude value is biased in a certain time interval.
(Refer to (a)), the amplitude cannot be accurately discriminated, and there is a restriction that the transmitting side must generate a multi-level signal in which the maximum amplitude value appears every predetermined time and each amplitude value is appropriately dispersed. .

[0051] In contrast, according to the identification circuit D1, if the multi-level signal MS as shown in FIG. 1 (a) is input, since the control signal CS is "Hi" at time interval T _2,
Switch (transistor 31) becomes non-conductive to the time interval T _2. As a result, the waveform shaping circuit 3 sets the time interval T
₂ , the amplitude value of the multi-level signal MS is set to 2 /
Partial pressure to 3. Therefore, the charge potential of the capacitor 42 does not exceed the first reference level RL _1, the first reference level RL ₁ is constant at the same potential as the amplitude value "X".
Therefore, the threshold generation circuit 6 can generate constant thresholds Th ₁ , Th _2, and Th ₃ that can accurately identify the multi-level signal MS. As is clear from the above, even if a multi-level signal MS (see FIG. 1A) in which a specific amplitude value in a certain time section is concentrated is transmitted, the discrimination circuit D1 receives the multi-level signal MS. MS can be accurately amplitude-discriminated. As a result, the transmitting side can freely generate the multi-level signal MS without restriction as compared with the related art.

In the first embodiment, the amplitude adjusting circuit 7 is disposed between the first branching unit 2 and the comparing circuit 8,
The input multi-level signal MS is attenuated. However, as described above, the amplitude adjustment circuit 7 controls the other multi-level signal MS.
As long as the relative level difference between the threshold and the threshold can be adjusted, they may be arranged at other positions. For example, between the first branch unit 2 and the waveform shaping circuit 3, between the waveform shaping circuit 3 and the detecting circuit 4, between the detecting circuit 4 and the threshold generating circuit 6, or between the threshold generating circuit 6 and the comparing circuit. 8, the amplitude adjustment circuit 7 can be arranged. In such an arrangement, the first branch unit 2 and the comparison circuit 8 are directly connected,
The multi-level signal MS shown in (a) is input to each of the comparators 82 to 84. Therefore, the amplitude adjustment circuit 7 arranged at the above position is constituted by an amplifier, and the amplifier amplifies the input signal by 1.5 times. Note that the identification circuit D1 may be configured to include two or more amplitude adjustment circuits 7.

[0053] In the first embodiment, the waveform shaping circuit 3 is given a signal shown in FIG. 1 (c) to the detection circuit 4, further first reference level RL ₁ is the amplitude value "X" The detection circuit 4 has a configuration for detecting the peak value of the input signal. However,
The detection circuit 4 may have a configuration as shown in FIG.
However, in the configuration of FIG. 4A, the first reference level RL
Since _one becomes the average value and the potential of the input signal of the detection circuit 4, the voltage dividing ratio of the resistance value R ₆₁ to R partial pressure ratio and / or the resistance value R ₇₁ and R ₇₂ of ₆₄ also need to appropriately choose.

Further, in the first embodiment, the waveform shaping circuit 3 is constituted by a voltage dividing circuit. However, the present invention is not limited to this. As shown in FIG. It may be constituted by an amplifier whose degree can be changed.
For example, assume that a multi-level signal MS as shown in FIG. 5A is input to the identification circuit D1. The multi-level signal M shown in FIG.
For S, the amplitude value “Z” is not used between the time sections T ₄ and T ₆ , and the amplitude value “Y” is appropriately used.
Also, during time period T _5, are present amplitude value "Z" is biased. 4 amplification degree time period T ₅ of an amplifier (b)
, The amplifier sets the amplitude of the input multi-level signal MS to (2/3) with reference to the amplitude value “W”.
Amplify (attenuate) in 3). Other time intervals T ₄ and T ₆
The amplification degree is set to 1 between. As a result, FIG.
As shown in (b), an output signal having a bottom value having the same potential as the amplitude value “Y” appears at the output terminal of the amplifier and is supplied to the detection circuit 4.

The detection circuit 4 generates a signal as shown in FIG.
If given, it should be configured as shown in FIG.
Is preferred. However, in the configuration of FIG.
Reference level RL₁ Is the bottom value of the input signal of the detection circuit 4
Since the potential is the same, the resistance value R ₆₁~ R₆₄And the partial pressure ratio of
/ Or resistance value R₇₁And R₇₂The appropriate partial pressure ratio
Need to be done. Note that each of the detection circuits 4 described above is
Connect a transistor between the circuit
May be configured.

Further, the detection circuit 4 performs the first operation in a shorter time.
Because of better that outputs a reference level RL _1, it is preferable to operate within the minimum pulse width of the input multi-level signal MS. More specifically, the control speed from the generation of the control signal CS in the control signal generation circuit 10 to the waveform shaping of the multilevel signal MS in the waveform shaping circuit 3 based on the control signal CS is the first control speed in the detection circuit 4. more preferably higher than follow-up speed for detecting the reference level RL _1.

Further, the reference level generation circuit 5 generates the second reference level RL ₂ based on the control signal CS from the control signal generation circuit 10, thereby optimizing the second reference level RL _2. be able to.

Next, the identification circuit D2 according to the second embodiment
Will be described. FIG. 6 shows a detailed circuit configuration of the identification circuit D2. 6, the identification circuit D2 includes an input terminal 1, a first branch unit 11, a first waveform shaping circuit 12, a first detection circuit 13, and a second waveform shaping circuit 1.
4, a second detection circuit 15, a threshold generation circuit 6, a comparison circuit 8, an output terminal group 9, and a control signal generation circuit 16. Note that, in the identification circuit D2, components corresponding to the configuration of the identification circuit D1 are denoted by the same reference numerals, and description thereof will be omitted.

A multi-level signal MS as shown in FIG. 7A is input to the first branch section 11 through the input terminal 1. Here, the multi-level signal MS in FIG.
, Each symbol has four amplitude values (“W”,
It is assumed that the signal is represented by any one of "X", "Y", and "Z". | W−X | = | X−Y | = | Y
Assume that −Z | = ΔV. Also in the multi-level signal MS of FIG. 7A, a certain specific amplitude value may be concentrated in a certain time section. In the example of FIG. 7 (a), during the time interval T _8, the amplitude value "X" and "Y" is the multi-level signal M
Although there is a bias in S, the amplitude values “X” and “Y” do not exist in a bias between time sections T ₇ and T ₉ . The first branching unit 11 branches the multilevel signal MS into three. The three-branched multi-level signal MS is supplied to the comparison circuit 8, the first
1 in the waveform shaping circuit 12 and the second waveform shaping circuit 14 of FIG.
Are output one by one.

The first waveform shaping circuit 12 converts the waveform of the input multi-level signal MS based on a control signal CS (described later) sent from the control signal generating circuit 16 into a first detection circuit 13. The first reference level RL ₁ (described later) is shaped into a waveform that can be correctly detected. As a configuration example for that, the first
The waveform shaping circuit 12 includes a first amplifier 121. The input terminal of the first amplifier 121 is connected to the first branch unit 11, and the output terminal is connected to the anode of the first diode 131. Further, the first amplifier 121 has 2
It is also connected to the control signal generation circuit 16 via a bit width bus.

The control signal CS from the control signal generation circuit 16 is transmitted to the first amplifier 121. In the present embodiment, the control signal CS is represented by two parallel bits. The control signal CS has four patterns as shown in FIG. The first control signal CS ₁ has two bits “Hi” and the currently received multi-level signal MS 1
It shows that the amplitude values “X” and “Y” are present unevenly. The second control signal CS ₂ indicates that the two bits are both “Lo” and that the amplitude values “X” and “Y” are not present in the multi-level signal MS being received. The third control signal CS ₃ indicates that the bits on one and the other lines of the bus are “Hi” and “Lo”,
This indicates that the amplitude value “X” is present unevenly in the multi-level signal MS being received. The fourth control signal CS ₄ indicates that the bits on one and the other lines of the bus are “Lo” and “H”.
In the case of “i”, it indicates that the amplitude value “Y” is biased in the multi-level signal MS being received.

Amplification degree A of first amplifier 121₁₂₁ Is
Upper first control signal CS₁ ~ 4th control signal CS_Four In response
Are set to different values. Amplification degree A₁₂₁ Is a multi-level signal
Depending on the format of the signal MS and / or the specification of the identification circuit D2
Is determined. Hereinafter, amplification degree A₁₂₁An example will be described.
The first amplifier 121 outputs the first control signal CS₁ Or third
Control signal CS_Three Is received, its amplification A₁₂₁ Is
With reference to the base level (amplitude value “Z”) of the multi-level signal MS
Thus, it is set to the value of W / X. In the present embodiment, W / X
Is 1.5. On the other hand, the first amplifier 121
Control signal CS_Two Or the fourth control signal CS _Four Received
When the amplification degree A₁₂₁ Is set to 1.

Next, the first waveform shaping circuit 12 having the above configuration
A specific example of the operation will be described. When the multi-level signal MS of FIG. 7A is input to the identification circuit D2, the time interval T ₇
And between the T _9, since the second control signal CS ₂ is transmitted to the first amplifier 121, the amplification factor A ₁₂₁ is set to 1. Therefore, the first amplifier 121 converts the input multi-level signal MS into the first diode 13
Output to 1. Between the time interval T _8, since the first control signal CS ₁ is sent to the first amplifier 121, amplification degree A ₁₂₁ is set to 1.5 to basal levels as the reference input The amplitude of the multi-level signal MS is amplified according to the amplification degree _A121 . As described above, the first
Waveform shaping circuit 12 shapes the waveform of the input multi-level signal MS. As a result, the amplitude of the output signal OS ₁₂ is 7
As (b), when compared to the amplitude of the input multi-level signal MS, at the time interval T _8, are amplified basal levels as the reference, the peak value is substantially the same potential as the amplitude value "W" Become.

Referring back to FIG. First detection circuit 13
Detects the _first reference level RL1 from the output signal of the first waveform shaping circuit 12. As its preferred configuration,
The first detection circuit 13 includes a first diode 131, a first capacitor 132, and a first transistor 133.
And a first current source 134. The above circuit configuration is
Since the operation is the same as that of the detection circuit 4 in FIG. 2, the description of the operation is simplified.

In the first detection circuit 13, the threshold value V _th of the first diode 131 is substantially equal to the first reference level R.
L ₁ to have been selected at the same potential. First capacitor 132
Is the signal OS ₁₂ via the first diode 131.
Is given, the input voltage V _i and the output voltage V _o is charged to the same value. In this way, the first capacitor 132 detects the peak value of the output signal OS _12, as the first reference level RL ₁ as in FIG. 7 (c), gives the one end of the resistor 61.

Referring back to FIG. The second waveform shaping circuit 14 detects the waveform of the multi-level signal MS output from the first branching unit 11 based on the control signal CS (see FIG. 8) from the control signal generation circuit 16 for the second detection. The circuit 15 shapes the second reference level RL ₂ (described later) into a waveform that can be correctly detected. As a configuration example therefor, the second waveform shaping circuit 1
4 includes a second amplifier 141. Second amplifier 141
Is connected to the first branch unit 11, and its output terminal is connected to the cathode of the second diode 151. Further, the second amplifier 141 is also connected to the control signal generation circuit 16 via a 2-bit bus.

[0067] Amplification of A ₁₄₁ of the second amplifier 141 in response to the control signal CS ₄ of the first control signal CS ₁ ~ 4 described above, is switched to a different value. The value of the amplification degree A ₁₄₁ is predetermined according to the format of the multi-level signal MS and / or the specifications of the identification circuit D2. Hereinafter, an example of the value of the amplification degree A ₁₄₁ will be described. When the second amplifier 141 receives the first control signal CS ₁ or the fourth control signal CS ₄ , the amplification degree A ₁₄₁ is Z / Y based on the amplitude value “W” of the multi-level signal MS. Is set to the value of In the present embodiment, Z
/ Y is 1.5. On the other hand, the second amplifier 141
When the control signal CS ₂ or the third control signal CS ₃ is received, the amplification factor A ₁₄₁ is set to 1.

Next, the second waveform shaping circuit 14 having the above configuration
A specific example of the operation will be described. Multi-level signal of FIG.
When the signal MS is input to the identification circuit D2, the time interval T₇ 
And T₉ During the second control signal CS_Two Is the second increase
Since it is transmitted to the width unit 141, its amplification degree A₁₄₁Is
Set to 1. Therefore, the second amplifier 141
The multi-level signal MS from the first branch unit 11 is directly converted to the second signal.
The cathode of the electrode 151 is supplied. In addition, time section T
₈ During the first control signal CS₁ Is the second amplifier 14
1, the amplification degree A₁₄₁ Set to 1.5
Is done. Therefore, the second amplifier 141 receives the input
The amplitude of the multi-level signal MS is determined based on the amplitude value “W” as follows:
Amplify by 5 times and connect to the cathode of the second diode 151
give. The second waveform shaping circuit 14 generates the waveform as described above.
Since the shaping is performed, the output signal OS ₁₄Of FIG. 7 (d)
As shown in the following, when compared with the amplitude of the input multi-level signal MS,
Time interval T₈ In the above, 1. based on the amplitude value “W”.
It is amplified by a factor of 5, and its bottom value is substantially equal to the amplitude value "Z".
At the same potential.

FIG. 6 is referred to again. Second detection circuit 15
From the output signal OS ₁₄ of the second waveform shaping circuit 14 detects the second reference level RL _2. As a preferable configuration therefor, the second detection circuit 15 includes a second diode 151, a second capacitor 152, a second transistor 153, and a second current source 154. The cathode of the second diode 151 is connected to the output terminal of the second amplifier 141. Its anode is connected to the gate of the second transistor 153. The anode is
Grounded via a second capacitor 152. The drain of the second transistor 153 is connected to a constant voltage source (not shown), and the source is grounded via the second current source 154. Further, the source is connected to one end of a resistor 64 (described later) of the threshold generation circuit 6.

In the second detection circuit 15 having the above configuration,
Threshold V _th of the second diode 151 is substantially selected to the second reference level RL ₂ have the same potential. The second capacitor 152, according the second diode 151 output signal OS ₁₄ via a is given, the input voltage V _i and the output voltage V
It is charged until _o becomes the same value. In this way,
The second capacitor 152 detects the bottom value of the output signal OS _14, as the second reference level RL _2, resistor 64
Give to one end. Note that the second transistor 153 and the current source 154 constitute a buffer that cuts off the discharge path of the second capacitor 152. With this buffer, the second
The capacitor 152 can be stably hold the bottom value of the input signal OS _14.

In this embodiment, the second diode 151
The cathode of the signal OS ₁₄ of the waveform shown in FIG. 7 (d) is given, the second reference level RL ₂ is, FIG. 9
As shown in (a), it has a constant potential with time and the same potential as the amplitude value “Z”.

The functions and functions of the threshold generation circuit 6 and the comparison circuit 8
And the configuration are as described in the first embodiment.
Therefore, the description is omitted. However, in the present embodiment, the threshold
The value generation circuit 6 has a first reference level RL₁ As amplitude
The value "W" and the second reference level RL_Two As the amplitude value
Given "Z", the three thresholds T
h₁, Th_Two And Th_Three Is based on the amplitude value "Z"
Th₁ = 5ΔV / 2, Th _Two = 3ΔV / 2 and Th
_Three = ΔV / 2.

The comparator 82 compares the magnitude relationship between the input multi-level signal MS and the threshold value Th ₁ and outputs a comparison result represented by “Hi” or “Lo”. Comparator 8
3 and 84 compares the amplitude of the multilevel signal MS, the magnitude relation between the threshold Th ₂ and Th _3, and outputs the comparison result represented by "Hi" or "Lo". Comparator 82-
The comparison result of 84 indicates the identification result of each symbol of the multi-level signal MS, and the output terminal 91 included in the output terminal group 9
Through 93 to the outside.

Further, the above comparison result is transmitted to the control signal generation circuit 16. Here, in the following description, the comparison result {Hi, Hi, Hi} is used for all the comparators 82 to 82.
84 indicates that “Hi” has been output. The comparison result {Lo, Hi, Hi} indicates that “Hi” has been output only from the comparators 83 and 84. The comparison result {Lo, Lo, Hi} is obtained from the comparator 84 alone as “H
i "is output. Furthermore, the comparison result ΔL
o, Lo, Lo} indicate that “Lo” has been output from all of the comparators 82 to 84.

The control signal generation circuit 16 typically has a CP
U, an FPGA, or a logic circuit, generates a control signal CS (see FIG. 8) based on the comparison result from the comparison circuit 8, and generates the control signal CS via a 2-bit width bus. And to the second waveform shaping circuit 14. The method of generating the control signal CS is also determined according to the format of the multi-level signal MS and / or the specifications of the identification circuit D2. In the present embodiment, an example will be described.

The control signal generation circuit 16 has a parallel 3-bit
The comparison result is repeatedly received at substantially constant time intervals. System
The control signal generation circuit 16 determines the latest comparison result in advance.
Number N_PRE Only memorize inside. Next, control signal generation
Circuit 16 stores the currently stored N _PRE Among the comparison results,
How many {Lo, Hi, Hi} are included
Count. Next, the control signal generation circuit 16
The number N of fruits {Lo, Hi, Hi}_X Is the first reference value N
_REF1It is determined whether it is greater than. In addition, control signal generation
The composer 16 stores the comparison result in the comparison results currently stored.
Count how many {Lo, Lo, Hi} are included
I do. Next, the control signal generation circuit 16 compares the comparison result ｛L
The number N of o, Lo, Hi｝_Y Is the second reference value N_REF2Than
Is also determined.

If the control signal generation circuit 16 determines that N _X > N _REF1 and N _Y > N _REF2 , the control signal generation circuit 16 _adds the amplitude values “X” and “Y” to the multilevel signal MS currently being received.
Of the first control signal CS
Generates ₁ . Further, the control signal generation circuit 16 determines that N _X ≦
If it is determined that N _REF1 is satisfied and N _Y ≦ N _REF2 is satisfied, it is determined that the amplitude values “X” and “Y” are not present in the multilevel signal MS currently being received in a biased manner, and the second It generates a control signal CS _2. The control signal generation circuit 16
_When it is determined that _X > _NREF1 is satisfied and _NY ≦ _NREF2 , the amplitude value “X” is _added to the multilevel signal MS currently being received.
Of the third control signal CS
Generates ₃ . Further, the control signal generation circuit 16 determines that N _X ≦
If it is determined that N _REF1 is satisfied and N _Y > N _REF2 is satisfied, it is considered that the amplitude value “Y” is present in the multi-level signal MS currently being received with a bias, and the fourth control signal CS Generate ₄ .

[0078] According to the above production method, if the multi-level signal MS shown in FIG. 7 (a) is input to the identification circuit D2, Between time interval T ₇ and T _9, as described above, the second control signal CS ₂ is transmitted to the first waveform shaping circuit 12 and the second waveform shaping circuit 14, between the time interval T _8, the first control signal CS ₁ is shaping circuit 12 and the second first waveform The signal is transmitted to the waveform shaping circuit 14.

The above-described identification circuit D2 is also provided with the identification circuit D1.
It has the same technical effect as. That is, the identification circuit D2
Is to accurately discriminate the amplitude of a multi-level signal MS even when a multi-level signal MS (see FIG. 7A) in which a specific amplitude value in a certain time section is biased is transmitted. Can be. As a result, the transmitting side can freely generate the multi-level signal MS without restriction as compared with the related art.

Next, the identification circuit D3 according to the third embodiment
Will be described. FIG. 10 shows a detailed circuit configuration of the identification circuit D3. The identification circuit D3 includes an identification circuit D2.
Since the same configuration as that shown in FIG. 6 is included, in FIG. 10, components corresponding to those in FIG. 6 are denoted by the same reference numerals. However, the identification circuit D3 is significantly different from the identification circuit D2 in that the first waveform shaping circuit 12 and the second waveform shaping circuit 14 are connected in series. Below,
The points related to such differences will be mainly described.

The first branching section 11 branches the multi-level signal MS (see FIG. 7A) input through the input terminal 1 into two. One of the two-branched multi-level signals MS is output to the first waveform shaping circuit 12, and the other is output to the comparison circuit 8.

The first waveform shaping circuit 12 includes a first amplifier 121. The input terminal of the first amplifier 121 is
And an output terminal thereof is connected to an input terminal of the second amplifier 141. Further, the first amplifier 121 is also connected to the control signal generation circuit 16.

Amplification degree A of first amplifier 121₁₂₁ Is before
As described above, the first control signal CS₁ ~ 4th control signal CS
_Four (See FIG. 8). amplification
Degree A ₁₂₁ Is the format and / or discrimination time of the multi-level signal MS.
It is determined according to the specification of the road D3. Hereinafter, amplification degree A₁₂₁
An example will be described. The first amplifier 121 receives the first control signal.
Issue CS₁ Is received, its amplification A₁₂₁Is a multilevel signal
With reference to the base level of MS (amplitude value “Z”), W /
Set to the value of X. In the present embodiment, W / X is 1.5
It is. On the other hand, the first amplifier 121 outputs the second control signal C
S_Two Or the fourth control signal CS_Four Is received,
Width A₁₂₁ Is set to 1.

[0084] With the above arrangement, Figure 7 if the multi-level signal MS of (a) is input to the identification circuit D3, between the time interval T ₇ and T _9, the second control signal CS ₂ is first , The amplification degree A ₁₂₁ is 1
Is set to Therefore, the first amplifier 121
Is output to the input terminal of the second amplifier 141 as it is. Between the time interval T _8, since the first control signal CS ₁ is sent to the first amplifier 121, amplification degree A ₁₂₁ is set to 1.5. Therefore, the first amplifier 121 amplifies the amplitude of the input multi-level signal MS by 1.5 times based on the base level. As a result, the amplitude of the output signal, as shown in FIG. 7 (b), when compared to the amplitude of the input multilevel signal MS, is amplified to 1.5 times in the time interval T _8, the peak value, the amplitude value It has substantially the same potential as “W”.

In FIG. 10, the second waveform shaping circuit 14 includes a second amplifier 141. Second amplifier 14
One input terminal is connected to the first amplifier 121, and its output terminal is connected to the anode of the first diode 131 and the cathode of the second diode 151. Further, the second amplifier 141 is also connected to the control signal generation circuit 16.

[0086] Amplification of A ₁₄₁ of the second amplifier 141 in response to the control signal CS ₄ of the first control signal CS ₁ ~ 4 described above, is switched to a different value. The value of the amplification degree A ₁₄₁ is predetermined according to the format of the multi-level signal MS and / or the specifications of the identification circuit D3. Hereinafter, an example of the value of the amplification degree A ₁₄₁ will be described. When the second amplifier 141 receives the first control signal CS ₁ , the amplification A ₁₄₁ thereof is | W−Z | / | W− based on the amplitude “W” of the multi-level signal MS.
3 · Y / 2 |. In the present embodiment, | W
−Z | / | W−3 · Y / 2 | is 2. On the other hand, when the second amplifier 141 receives the second control signal CS ₂ or the third control signal CS ₃ , the amplification A ₁₄₁ is set to 1.

Next, the second waveform shaping circuit 14 having the above configuration
A specific example of the operation will be described. If the signal shown in FIG. 7 (b) is input to the second amplifier 141, between the time interval T ₇ and T _9, since the second control signal CS ₂ is transmitted to the second amplifier 141 , Its amplification A ₁₄₁ is 1
Is set to Therefore, the second amplifier 141 directly supplies the input signal to the first diode 131 and the second diode 151. Between the time interval T _8, since the first control signal CS ₁ is sent to the second amplifier 141, amplification degree A ₁₄₁ is set to 2. Therefore, the second amplifier 141, the amplitude of the input signal OS _12, amplifies twice the amplitude value "W" as a reference, providing a first diode 131 and second diode 151. As described above, the second waveform shaping circuit 14 shapes the waveform of the output signal of the first waveform shaping circuit 12. As a result, the amplitude of the output signal OS _14, as shown in FIG. 11, when compared to the amplitude of the input signal OS ₁₂ (see FIG. 7 (b)), in the time interval T _8, based on the amplitude value "W" Since it is amplified twice, its bottom value is the amplitude value “Z”.
Is substantially the same.

Since the signal OS ₁₄ shown in FIG. 11 is input to the first detection circuit 13 and the second detection circuit 15,
As in the third embodiment, it is possible to detect a constant peak value and bottom value. Therefore, similarly to the identification circuit D1, the identification circuit D3 also has a multi-level signal MS (FIG. 7) in which a specific amplitude value in a certain time section exists in a biased manner.
(See (a)), the amplitude of the multi-level signal MS can be accurately discriminated. As a result, the transmitting side can freely operate the multi-level signal MS without any restriction as compared with the related art.
Can be generated.

The discriminating circuits D2 and D3 do not have a configuration corresponding to the amplitude adjusting circuit 7 of the discriminating circuit D1. Because the amplitude values “W” and “Z” are selected as the first reference level RL ₁ and the second reference level RL ₂ , the threshold value generation circuit 6 does not generate pulse width distortion in the identification result. This is because threshold values Th ₁ , Th _2, and Th ₃ capable of accurately distinguishing the amplitude can be generated. However, the first reference level RL ₁ and the second selection of the reference level RL _2, to identification circuit D3 and the identification circuit D2, it is necessary to amplitude adjusting circuit 7 is arranged. For example, in the identification circuit D2, as a reference level RL ₂ of the first reference level RL ₁ and the second, when the amplitude value "X" and "Z" is selected, the input signal 2
The first branching unit 11
And the comparison circuit 8. In addition,
As in the case of the identification circuit D1, the amplitude adjustment circuit 7
May be arranged between the branching unit 11 and the first waveform shaping circuit 12 and the second waveform shaping circuit 14, or between the threshold generation circuit 6 and the comparison circuit 8, or two or more. May be.

In the second and third embodiments, the first detection circuit 13 or the second detection circuit 15 calculates the average of the output signals of the first waveform shaping circuit 12 or the second waveform shaping circuit 14. A circuit for detecting a value (see FIG. 4A) may be used.

In each of the second and third embodiments, the first detection circuit 13 and the second detection circuit 15 have the minimum pulse width range similar to the detection circuit 4 of the first embodiment. It is preferable to work within.

In the first to third embodiments,
Immediately after the activation of the identification circuits D1 to D3, unnecessary amplitude values are biased.
When the multi-level signal MS that is present is transmitted,
A detection circuit consisting of an ode (or resistor) and a capacitor
The road has a first reference level RL ₁ Or the second reference level
RL_Two May not be detected quickly. For example, figure
Immediately after the activation of the identification circuit D1, the amplitude value “Y” or
A multi-level signal MS in which “Z” exists unevenly is transmitted
And the detection circuit 4 sets the first reference level RL₁ (Amplitude value
It takes a considerable amount of time to detect "X")
The threshold generation circuit 6 determines that the₁ , Th_Two and
Th_Three Cannot be generated quickly.

[0093] The identification circuit D1 is accurate amplitude discrimination immediately after startup, it is preferable to arrange the initial value generating circuit for generating a first initial value of the reference level RL ₁ to the detection circuit 4. The initial value generation circuit operates only for a certain period of time after the activation of the identification circuit D1, and gives the generated initial value of the _first reference level RL1 to the threshold value generation circuit 6. Thus, the threshold value generating circuit 6 can generate the thresholds Th _1, Th ₂ and Th ₃ quick and accurate immediately after starting the identification circuit D1. The above initial value generation circuit can be similarly arranged in the first detection circuit 13 or the second detection circuit 15.

Also, by arranging the initial value generating circuit for generating the initial values of the threshold values Th ₁ , Th ₂ and Th _{3 in} the threshold value generating circuit 6, the identification circuits D1 to D3 can perform accurate amplitude discrimination immediately after the start. Will be able to do it. Such initial value generating circuit is operated for a certain time after starting of identification circuit D1 to D3, gives the generated initial value of the threshold Th _1, Th ₂ and T ₃ to the comparators 82, 83 and 84.

Further, prior to the multi-level signal MS, the transmitting side
By transmitting the training signal to the identification circuits D1 to D3 only for a certain period of time, the identification circuits D1 to D3 can perform accurate amplitude discrimination immediately after startup.
Such a training signal has a predetermined amplitude value or pattern. For example, if a training signal having the amplitude value “X” is transmitted to the identification circuit D1 only at least during the charging time of the capacitor 42, the detection circuit 4
An accurate first reference level R from the beginning of the multi-level signal MS
L ₁ can be detected.

In the above embodiment, the multi-level signal MS
Has been described as having four amplitude values. However, the technical idea of the present identification circuits D1 to D3 is not limited to this.
The present invention can be easily applied to a signal capable of discriminating the amplitude of a multi-level signal MS including a plurality of amplitude values. That is, in this discrimination circuit D1 to D3, the first reference level RL ₁ and / or the second
Reference level RL ₂ is, because it is the point to have a constant potential predetermined, the multi-level signal MS,
The part where a certain value is biased is the first reference level R
L ₁ and / or such that the second potential of the reference level RL _2, waveform shaping circuit 3 may be shaped by the first waveform shaping circuit 12 or the second waveform shaping circuit 14.

[Brief description of the drawings]

FIG. 1 is a diagram showing waveforms of a multi-level signal MS, a control signal CS, an output signal OS ₃ , a first reference level RL ₁ , and a second reference level RL _{2 according} to the first embodiment.

FIG. 2 is a circuit diagram illustrating an entire configuration of an identification circuit D1 according to the first embodiment.

3 is a diagram showing the waveform of the threshold value Th _1, Th ₂ and T ₃ and the output signal OS ₇ according to the first embodiment.

FIG. 4 is a circuit diagram showing another configuration of the detection circuit 4 and the waveform shaping circuit 3.

5 is a diagram showing the multi-level signal MS, the other waveform of the output signal OS _3.

FIG. 6 is a circuit diagram illustrating an entire configuration of an identification circuit D2 according to a second embodiment.

FIG. 7 shows a multi-level signal MS and an output signal according to the second embodiment.
OS₁₂, The first reference level RL ₁, And the output signal OS
₁₄It is a figure which shows the waveform of.

FIG. 8 is a diagram for explaining a control signal CS according to the second embodiment.

FIG. 9 shows a second reference level RL ₂ according to the second embodiment.
And is a diagram showing a waveform of the threshold value Th _1, Th ₂ and Th _3.

FIG. 10 is a circuit diagram illustrating an entire configuration of an identification circuit D3 according to a third embodiment.

11 is a diagram showing the waveform of the third output signal OS ₁₄ according to the embodiment of.

FIG. 12 is a circuit diagram showing an entire configuration of a conventional identification circuit CD.

[Explanation of symbols]

 D1, D2, D3: identification circuit 2, 11: first branching unit 3: waveform shaping circuit 4: detection circuit 5: reference level generation circuit 6: threshold generation circuit 7: amplitude adjustment circuit 8: comparison circuit 10: control signal Generation circuit 12: First waveform shaping circuit 13: First detection circuit 14: Second waveform shaping circuit 15: Second detection circuit 16: Control signal generation circuit

 ──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Satoshi Furusawa 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term in Matsushita Electric Industrial Co., Ltd. 5J039 DA12 DB07 DB19 KK16 KK22 MM07 NN01 5K029 FF02 GG03 HH08 KK24 LL00

Claims (13)

[Claims] 1. An identification circuit for identifying a multi-level signal having three or more amplitude values, comprising: a first branch section for splitting a multi-level signal input from outside into two; The waveform of one output multi-level signal is
A waveform shaping circuit for shaping under predetermined conditions; a detection circuit for detecting a first reference level from an output signal of the waveform shaping circuit; and a reference for generating a second reference level of a multilevel signal input from the outside A level generation circuit, a threshold generation circuit that generates a required number of thresholds based on the first and second reference levels, a threshold generated by the threshold generation circuit, and the other output from the first branch unit A comparison circuit that compares the amplitude of the multi-level signal with the control signal generation circuit that generates a control signal based on a comparison result of the comparison signal. The waveform shaping circuit controls the control signal output from the control signal generation circuit. An identification circuit for shaping, based on a signal, a waveform of an input multilevel signal into a waveform that allows a detection circuit to correctly detect a first reference level. 2. The threshold value generating circuit generates different threshold values (the number of amplitude values−1) based on first and second reference levels, and the comparing circuit generates an input multi-level signal. , (The number of amplitude values−1) branches, a threshold value generated by the threshold generation circuit is input one by one, and the multi-level signal branched by the second branch unit is 1 2. The identification circuit according to claim 1, further comprising: (number of amplitude values−1) comparators, each of which is compared with an input threshold value and the amplitude of the multilevel signal. 3. . 3. An amplitude adjusting circuit for adjusting a relative difference between an amplitude of the other multi-level signal output from the first branching unit and a threshold value generated by the threshold value generating circuit. Item 2. The identification circuit according to Item 1. 4. The identification circuit according to claim 1, wherein the reference level generation circuit generates a potential when no multi-level signal is transmitted as a second reference level. 5. The control signal defines a time section in which a predetermined amplitude value is present in a biased manner in the input multi-level signal, and the waveform shaping circuit controls the time section defined by the control signal. Shaping the waveform of the input multi-level signal so that the predetermined amplitude value becomes the same value as the second reference level,
The identification circuit according to claim 1. 6. An identification circuit for identifying a multi-level signal having three or more amplitude values, wherein the multi-level signal input from the outside is branched into three, and
A first branching section that outputs a multi-level signal of the following, and a waveform of the first multi-level signal output from the first branching section.
A first waveform shaping circuit for shaping under a predetermined condition, a first detection circuit for detecting a first reference level from an output signal of the first waveform shaping circuit, and an output from a first branch unit The waveform of the second multi-level signal is
A second waveform shaping circuit for shaping under predetermined conditions, a second detection circuit for detecting a second reference level from an output signal of the second waveform shaping circuit, and a first and a second reference levels. A threshold generation circuit that generates a required number of thresholds based on the threshold value; a comparison circuit that compares the threshold generated by the threshold generation circuit with the amplitude of a third multi-level signal output from the first branch unit; A control signal generation circuit that generates a control signal based on a comparison result by the comparison circuit, wherein the first waveform shaping circuit is configured to input a first signal based on a control signal output from the control signal generation unit. The first detection circuit shapes the waveform of the multi-valued signal into a waveform from which the first reference level can be correctly detected. The waveform of the input second multilevel signal is Out circuit shapes the second reference level correctly detectable waveform discrimination circuit. 7. A threshold value generation circuit generates different threshold values (the number of amplitude values minus one) based on the first and second reference levels, and a comparison circuit outputs the input third number. A second branch unit for branching the value signal into (number of amplitude values-1), and a third branch unit that receives one threshold value generated by the threshold generation circuit and branches by the second branch unit. , And (Comparison of the number of amplitude values−1) comparators, each of which compares the input threshold with the amplitude of the third multi-level signal. The identification circuit according to claim 6. 8. The apparatus according to claim 6, further comprising an amplitude adjustment circuit for adjusting a relative difference between an amplitude of the third multi-level signal input to the comparison circuit and a threshold generated by the threshold generation circuit.
An identification circuit according to claim 1. 9. The control signal defines a time section in which a predetermined amplitude value is present in a biased manner in the input multilevel signal, and the first and second waveform shaping circuits perform In a prescribed time section, the waveforms of the input first and second multilevel signals are shaped so that the predetermined amplitude value becomes the same value as the first and second reference levels. Item 6
An identification circuit according to claim 1. 10. A discriminating circuit for identifying a multi-level signal having three or more amplitude values, comprising: a first branch section for branching a multi-level signal input from the outside into two; The waveform of one output multi-level signal is
A first waveform shaping circuit for shaping under predetermined conditions, a second waveform shaping circuit for shaping the waveform of an output signal of the first waveform shaping circuit under predetermined conditions, and a second waveform shaping circuit. An output signal is provided, a first detection circuit for detecting a first reference level from the output signal, and an output signal of a second waveform shaping circuit are provided. From the output signal, a second reference level is determined. A second detection circuit for detecting, a threshold generation circuit for generating a required number of thresholds based on the first and second reference levels, a threshold generated by the threshold generation circuit, and a first branch unit A comparison circuit that compares the amplitude of the other multi-level signal to be output; and a control signal generation circuit that generates a control signal based on a comparison result by the comparison circuit. Based on the control signal output from the generator, The first detection circuit shapes the waveform of the input multi-level signal into a waveform that can correctly detect the first reference level, and the second waveform shaping circuit converts the control signal output from the control signal generation unit into a waveform. An identification circuit for shaping a waveform of an output signal of the first waveform shaping circuit into a waveform capable of correctly detecting a second reference level on the basis of the output signal of the first waveform shaping circuit. 11. A threshold generation circuit generates different thresholds (the number of amplitude values minus one) based on the first and second reference levels, and the comparison circuit generates an input multi-level signal. , (The number of amplitude values−1) branches, a threshold value generated by the threshold generation circuit is input one by one, and the multi-level signal branched by the second branch unit is 1 11. The identification circuit according to claim 10, further comprising: (number of amplitude values−1) comparators, each of which is compared with the input threshold and the amplitude of the multi-level signal. 12. . 12. An amplitude adjusting circuit for adjusting a relative difference between an amplitude of the other multi-level signal output from the first branching unit and a threshold value generated by the threshold value generating circuit,
The identification circuit according to claim 10. 13. The control signal defines a time section in which a predetermined amplitude value is present in a biased manner in the input multi-level signal, and the first and second waveform shaping circuits control the control signal in accordance with the control signal. The identification circuit according to claim 10, wherein the waveforms of the respective input signals are shaped so that the specific amplitude value becomes the same value as the first and second reference levels in a prescribed time interval.