JP2000323717A - Thin film transistor and manufacture of thin film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the diffusion of impurities from a glass substrate while making small the influence of a threshold voltage Vth, etc., on variance in characteristics of a thin film transistor. SOLUTION: This thin film transistor has an insulating undercoat thin film layer which covers the glass substrate, a semiconductor active layer 26 of polycrystalline silicon formed on the insulating undercoat thin film layer, and a gate electrode 28 which is insulated and formed on the semiconductor active layer 26. Specially, the insulating undercoat thin film layer covers a silicon nitride film 22 covering the glass substrate 21 and a silicon oxide film 23 which covers the silicon nitride film 22 and >=100 nm thick.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor incorporated in, for example, a liquid crystal display device and a method for manufacturing the thin film transistor.

[0002]

2. Description of the Related Art In an active matrix type liquid crystal display device, a semiconductor active layer has good uniformity even on a large-area substrate.
Since it can be formed at a relatively low temperature, an amorphous silicon thin film transistor is used for a switching element of a liquid crystal display pixel, and recently, not only a switching element of a display pixel but also a peripheral driving circuit element are formed on the same substrate. Thin film transistors have been used. However,
As the thin film transistor of the peripheral driving circuit element, a thin film transistor using polycrystalline silicon having a higher field-effect mobility than an amorphous silicon thin film transistor for a semiconductor active layer is used.

As the thin film transistor, a top gate type in which a gate insulating layer and a gate electrode are formed on a semiconductor active layer is mainly used. 7 and 8 show a manufacturing process of the top gate type thin film transistor.

First, as shown in FIG. 7A, a thin amorphous silicon film 2 is formed on an insulating substrate 1 such as quartz by parallel plate RF plasma CVD. Next, heat treatment is performed on the insulating substrate 1 to degas hydrogen in the film. Next, as shown in FIG. 7B, XeC
The polycrystalline silicon film 3 is formed by irradiating the excimer laser and melting the amorphous silicon film 2 to make it polycrystalline.

Next, as shown in FIG. 7C, the polycrystalline silicon film 3 is patterned by photolithography to form a semiconductor active layer 4 made of an island-shaped polycrystalline silicon film. Next, as shown in FIG. 7D, a gate insulating layer 5 is formed on the island-shaped semiconductor active layer 4 by depositing silicon oxide by plasma CVD. Next, a molybdenum tungsten alloy layer is formed on the gate insulating layer 5 by sputtering, and this is patterned by photolithography to form a gate electrode 6 as shown in FIG.

[0008] Next, as shown in FIG. 8 (f), using the gate electrode 7 as a mask, P (phosphorus) is added as an impurity to the semiconductor active layer 5 via the gate insulating layer 5 by a mass separation type ion implantation apparatus. ) Is implanted to form a source region 7 and a drain region 8. Thereafter, annealing is performed again to activate the implanted phosphorus.

[0008] Next, as shown in FIG. 8 (g), after depositing silicon oxide by plasma CVD to form an interlayer insulating layer 9, a contact hole is formed by patterning the interlayer insulating layer 9 by photolithography. I do.

Next, as shown in FIG. 8H, a molybdenum tungsten alloy is deposited by sputtering, and is patterned by photolithography to form a source electrode 10 and a drain electrode 11.

Through the above steps, a polycrystalline silicon thin film transistor is formed. When the insulating substrate 1 is made of quartz, since there is almost no diffusion of mobile ions such as Na in the presence of impurities from the substrate, an amorphous silicon film may be formed directly on the substrate as described above. Alternatively, before forming an amorphous silicon film, a silicon oxide film was formed as an undercoat thin film layer, and an amorphous silicon film was formed thereon.

[0010]

However, in recent years, it has been required to use an inexpensive glass substrate instead of an expensive quartz substrate due to a demand for a larger screen or lower cost of the panel. However, when a glass substrate is used, diffusion of impurities from the substrate is a problem. Even when a semiconductor active layer is formed directly on a glass substrate, even when a silicon oxide film is used to form an undercoat thin film layer, the silicon oxide film has a low ability to stop impurities such as mobile ions. Glass substrates cannot be used.

As a countermeasure against impurity diffusion, there is a method of using silicon nitride having a high impurity blocking ability as an undercoat thin film layer. However, since silicon nitride has a higher defect density and charge density in the film than silicon oxide, a semiconductor active layer is not formed directly on the silicon nitride, but rather a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film. There is also a method in which an undercoat thin film layer having a two-layer structure is formed, and a semiconductor active layer is formed thereon.

However, the silicon nitride / silicon oxide interface also has defects and charges, and the state of this interface is difficult to control, which may affect the characteristics of the thin film transistor, particularly the variation and shift of the threshold voltage Vth. is there.

The quality of the silicon oxide film in contact with the semiconductor active layer, particularly the charge density in the film, is naturally the threshold voltage Vth.
Affect. However, as the size of the substrate increases and the process temperature decreases due to the use of a glass substrate, the silicon oxide film must be formed by plasma CVD. Unlike the thermal oxidation process of silicon, the silicon oxide film is formed by plasma CVD. The film quality is hard to be constant, and the variation in the film quality of the silicon oxide film causes the variation in the threshold voltage Vth.

The present invention has been made in view of the above-described problems of the conventional thin film transistor, and has a reduced effect on the characteristics of the thin film transistor, particularly the variation in the threshold voltage Vth, while diffusing impurities from the glass substrate. It is an object of the present invention to provide a thin film transistor capable of suppressing the occurrence of a thin film and a method for manufacturing the thin film transistor.

[0015]

According to the present invention, in order to prevent diffusion of impurities from a glass substrate and to form an electrically good interface with a semiconductor active layer, a silicon nitride / silicon nitride layer is formed from the glass substrate side. The undercoat thin film layer is composed of two layers of silicon oxide, and the thickness of the undercoat silicon oxide film is 1
00 nm or more, and from the semiconductor active layer to the silicon nitride /
By increasing the distance to the silicon oxide interface, the influence of the charge on the silicon nitride / silicon oxide interface of the undercoat thin film layer on the thin film transistor is reduced.

In the present invention, a silicon oxide film for an undercoat thin film layer is formed by plasma CVD. In this case, since the variation in the film quality of the silicon oxide film can be suppressed and the characteristics of the thin film transistor can be stabilized, a silicon oxide film whose oxidation is sufficiently promoted is used for forming the undercoat. At this time, the refractive index of the silicon oxide film is set to 1.465 or less with respect to light having a wavelength of 632.8 nm, and the infrared absorption spectrum peak position wave number of the silicon oxide film in the Si—O bond stretching mode is 1055 cm ^−1.
Above.

In the present invention, a silicon nitride film and a silicon oxide film are formed as an undercoat thin film layer by plasma CVD so as to easily correspond to a large-area liquid crystal display device.

Further, according to the present invention, not only a silicon nitride film and a silicon oxide film are formed as an undercoat thin film layer by plasma CVD, but also the plasma CV
In the case of forming polycrystalline silicon of the semiconductor active layer or amorphous silicon as a base material thereof in D, the interface defects between the silicon nitride film and the silicon oxide film and between the silicon oxide film and the amorphous silicon film are removed. To reduce
A silicon nitride film, a silicon oxide film, and polycrystalline silicon or amorphous silicon as a base material thereof are formed by plasma C.
It is formed in a VD apparatus without breaking vacuum. In the case where these films are formed without breaking vacuum, these films may be formed in the same reaction chamber. Alternatively, the substrate may be transported through a vacuum-evacuated transport chamber, and these films may be formed in separate reaction chambers.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an N-type polycrystalline silicon thin film transistor according to one embodiment of the present invention will be described. FIG.
FIG. 2 shows a manufacturing process of the thin film transistor.
As shown in FIG. 1A, a 50-nm-thick silicon nitride film 22 and a 100-nm-thick silicon nitride film 22 are placed on a glass substrate 21 (for example, 1737 manufactured by Corning Incorporated) in the same reaction chamber of parallel plate RF plasma CVD. A silicon oxide film 23 and an amorphous silicon film 24 having a thickness of 50 nm are sequentially formed. Next, the glass substrate 21 is heat-treated at about 500 ° C. for about 1 hour to partially degas hydrogen in the silicon nitride film 22, the silicon oxide film 23, and the amorphous silicon film 24.
Next, as shown in FIG. 1B, a polycrystalline silicon film 25 is formed by irradiating the amorphous silicon film 24 with a XeCl excimer laser to melt and recrystallize the amorphous silicon film 24.

Next, as shown in FIG. 1 (c), a polycrystalline silicon film 25 is patterned by photolithography to form the semiconductor active layer 26 by an island shape by CF ₄ dry etching. Next, as shown in FIG. 1D, silicon oxide is deposited on the island-shaped semiconductor active layer 26 by plasma CVD to form the gate insulating layer 2.
7 is formed. Next, a molybdenum-tungsten alloy layer is formed on the gate insulating layer 27 by sputtering, and is patterned by photolithography.
A gate electrode 28 as shown in FIG.

Next, as shown in FIG. 2F, using the gate electrode 28 as a mask, P (phosphorus) is implanted into the semiconductor active layer 26 through the gate insulating layer 26 by a mass separation type ion implantation apparatus. ) Is formed to form a source region 29 and a drain region 30. Thereafter, annealing is performed again at about 500 ° C. to activate the implanted phosphorus.

Next, as shown in FIG. 2 (g), after an interlayer insulating layer 11 is formed by depositing silicon oxide by plasma CVD, a contact hole is formed by patterning the interlayer insulating layer 31 by photolithography. Form.

Next, as shown in FIG. 2H, a molybdenum-tungsten alloy is deposited by sputtering, and the molybdenum-tungsten alloy layer obtained by this deposition is patterned by photolithography to form a source electrode 32 and a drain electrode 33. Form.

Through the above steps, a polycrystalline silicon thin film transistor according to the present invention is manufactured.

FIG. 3 shows a change in the threshold voltage Vth of the N-type thin film transistor when the thickness of the silicon oxide film 23 used for forming the undercoat thin film layer is changed in the thin film transistor thus manufactured. When the thickness of the silicon oxide film 23 is smaller than 100 nm,
Vth is greatly affected by the change in the film thickness due to the influence of the interface charge between the silicon nitride film 22 and the silicon oxide film 23. On the other hand, according to the present invention, the silicon oxide film 2
3, the interface between the silicon nitride film 22 and the silicon oxide film 23 is separated from the semiconductor active layer, the influence of interface charges on the semiconductor active layer can be reduced. It is possible to stabilize the threshold voltage Vth with respect to the film thickness fluctuation and variation.

FIG. 4 shows the charge density in the film of the silicon oxide film formed by the parallel plate RF plasma CVD with respect to the change in the film RF power density. FIG. 5 shows the oxide film formed by the parallel plate RF plasma CVD. Silicon film wavelength 63
FIG. 6 shows the refractive index for 2.8 nm light with respect to the change in the film RF power density.
The infrared absorption spectrum peak position wave number of the Si—O bond stretching mode of the silicon oxide film formed by the above method is shown with respect to the change in the film RF power density.

A silicon oxide film formed by plasma CVD
The refractive index of the film for light having a wavelength of 632.8 nm is determined by the acid
As the stoichiometry approaches to the stoichiometric composition, the refractive index increases
It is about 1.45 to 1.44. Also, plasma CVD
Bond stretching of silicon oxide film formed by
In the infrared absorption spectrum peak position wave number of the
As the stoichiometric composition progresses, the peak position wave number becomes
1079-1081cm ^-1About.

As shown in FIGS. 4, 5 and 6, according to the present invention, the refractive index for light having a wavelength of 632.8 nm is 1.465 or less, or the peak position of the infrared absorption spectrum in the Si—O bond stretching mode is reduced. Wave number is 1055cm ^-1
By employing the above-described silicon oxide film as the undercoat thin film layer, the plasma CVD method can be used to prevent the fluctuation and the variation of the film forming parameters (in FIG. 4, FIG. 5, and FIG. 6, RF power density is an example of the parameter). It is possible to stabilize the charge density in the silicon oxide film of the undercoat thin film layer formed by the above, and to stabilize the threshold voltage Vth of the thin film transistor.

Then, in order to promote the oxidation of the silicon oxide film formed by plasma CVD, as shown in FIGS. 4, 5 and 6, the RF power density of the film formation is increased, and particularly, 0.35 W / cm ² or more is desirable. In addition to increasing the deposition RF power density, raising the abdominal pressure is also effective in promoting oxidation, and is preferably 1 Torr or more.

[0030]

According to the thin film transistor and the method of manufacturing the same of the present invention, a silicon nitride film covering the substrate and a silicon oxide film covering the silicon nitride film are formed under the semiconductor active layer as an undercoat. By setting the thickness to 100 nm or more, even when an inexpensive glass substrate is used, diffusion of impurities from the substrate is prevented, and electric charge at an interface between the silicon nitride film and the silicon oxide film is reduced by the threshold voltage of the thin film transistor. The effect on Vth can be reduced, and the threshold voltage Vth can be stabilized. Therefore, it is possible to reduce the cost of the substrate and stabilize the transistor characteristics. Further, the refractive index of the silicon oxide film formed by plasma CVD used for the undercoat with respect to light having a wavelength of 632.8 nm is 1.465 or less, and the infrared absorption spectrum peak position wave number of the Si—O bond stretching mode of the infrared absorption spectrum is 105.
By setting it to 5 cm ^-1 or more, the threshold voltage V
th can be stabilized.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a thin film transistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of the thin film transistor subsequent to the manufacturing process shown in FIG.

FIG. 3 is a graph showing a change in a threshold voltage Vth of an N-type thin film transistor with respect to a thickness of a silicon oxide film for an undercoat thin film layer shown in FIGS. 1 and 2;

FIG. 4 is a graph showing a charge density in a silicon oxide film formed by a parallel plate RF plasma CVD with respect to a change in a film RF power density.

FIG. 5 is a graph showing a refractive index of a silicon oxide film formed by parallel plate RF plasma CVD with respect to light having a wavelength of 632.8 nm, with respect to a change in film forming RF power density.

FIG. 6 is a graph showing a peak position wave number of an infrared absorption spectrum in a Si—O bond stretching mode of a silicon oxide film formed by a parallel plate RF plasma CVD with respect to a change in film formation RF power density.

FIG. 7 is a cross-sectional view showing a manufacturing process of a conventional polycrystalline silicon thin film transistor.

8 is a cross-sectional view showing a manufacturing step of the conventional thin film transistor following the manufacturing step shown in FIG.

[Explanation of symbols]

 Reference Signs List 21 glass substrate 22 silicon nitride film 23 silicon oxide film 24 amorphous silicon film 25 polycrystalline silicon film 26 semiconductor active layer 27 gate insulating layer 28 date electrode 29 source region 30 drain region 31 ... Interlayer insulating layer 32 ... Source electrode 33 ... Drain electrode

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) 2H092 HA28 JA25 JA34 JA37 KA04 KA05 KB25 MA05 MA08 MA13 MA19 MA29 MA30 NA24 NA25 PA01 5F110 AA08 AA17 CC02 DD02 DD13 DD14 DD17 DD24 EE06 EE44 FF02 FF30 GG02 GG13 HJ01 NN13JJ NN23 NN35 PP03

Claims (15)

[Claims] 1. An insulating undercoat thin film layer covering a glass substrate, a semiconductor active layer formed on the insulating undercoat thin film layer, and a gate electrode formed insulated on the semiconductor active layer. A thin film transistor, wherein the insulating undercoat thin film layer includes a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film, and the silicon oxide film has a thickness of 100 nm or more. 2. An insulating undercoat thin film layer covering a glass substrate, a semiconductor active layer formed on the insulating undercoat thin film layer, and a gate electrode formed insulated on the semiconductor active layer. The insulating undercoat thin film layer includes a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film. The silicon oxide film has a thickness of 1.28 with respect to light having a wavelength of 632.8 nm.
A thin film transistor having a refractive index of 465 or less. 3. The thin film transistor according to claim 2, wherein the silicon oxide film has a thickness of 100 nm or more. 4. An insulating undercoat thin film layer covering a glass substrate, a semiconductor active layer formed on the insulating undercoat thin film layer, and a gate electrode formed insulated on the semiconductor active layer. The insulating undercoat thin film layer includes a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film, wherein the silicon oxide film has an infrared absorption spectrum peak position wave number of a Si—O bond stretching mode. Characterized in that it has a characteristic of 1055 cm ^-1 or more. 5. The thin film transistor according to claim 4, wherein the silicon oxide film has a thickness of 100 nm or more. 6. The thin film transistor according to claim 1, wherein the thin film transistor is formed as a switching element of a liquid crystal display pixel or a drive circuit element of the liquid crystal display pixel. 7. A step of forming an insulating undercoat thin film layer covering a glass substrate, a step of forming a semiconductor active layer on the insulating undercoat thin film layer, and a step of insulating a gate electrode on the semiconductor active layer. And a step of forming
A method of manufacturing a thin film transistor, wherein the step of forming the insulating undercoat thin film layer includes a step of forming a silicon nitride film covering the glass substrate and a silicon oxide film having a thickness of 100 nm or more covering the silicon nitride film. . 8. The insulating undercoat thin film layer is formed by plasma CVD.
3. The method for manufacturing a thin film transistor according to item 1. 9. A step of forming an insulating undercoat thin film layer covering a glass substrate, a step of forming a semiconductor active layer on the insulating undercoat thin film layer, and a step of insulating a gate electrode on the semiconductor active layer. And a step of forming
The step of forming the insulating undercoat thin film layer includes a step of forming a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film by plasma CVD, wherein the silicon oxide film has a wavelength of 632.8 nm. A method of manufacturing a thin film transistor, wherein the thin film transistor has a refractive index of 1.465 or less. 10. A step of forming an insulating undercoat thin film layer covering a glass substrate, a step of forming a semiconductor active layer on the insulating undercoat thin film layer, and a step of insulating a gate electrode on the semiconductor active layer. Forming a silicon nitride film covering the glass substrate and a silicon oxide film covering the silicon nitride film by plasma CVD, wherein the silicon oxide film is formed. The film has an infrared absorption spectrum peak position wave number of 1055c in the Si—O bond stretching mode.
A method for manufacturing a thin film transistor, wherein the method has a characteristic of at least m- ¹ . 11. The method according to claim 9, wherein the silicon oxide film has a thickness of 100 nm or more. 12. The step of forming the semiconductor active layer includes the step of depositing polycrystalline silicon on the glass substrate by plasma CVD or the step of depositing amorphous silicon on the glass substrate by plasma CVD. 11. The method according to claim 7, further comprising a step of crystallizing silicon. 13. The silicon nitride film and the silicon oxide film are formed by continuously depositing silicon nitride and silicon oxide without breaking a vacuum in a plasma CVD apparatus. 11. The method for manufacturing a thin film transistor according to any one of the above items. 14. The semiconductor device according to claim 1, wherein the insulating undercoat thin film layer and the semiconductor active layer are continuously formed without breaking a vacuum by a plasma CVD apparatus.
3. The method for manufacturing a thin film transistor according to item 2. 15. The method of manufacturing a thin film transistor according to claim 7, wherein the thin film transistor is formed as a switching element of a liquid crystal display pixel or a drive circuit element of the liquid crystal display pixel.