JP2000307025A - Electronic component, manufacturing method thereof, and electronic component mounted body - Google Patents

Abstract

(57) [Problem] To mount an electronic component on a wiring board by soldering, a crack is generated in a solder layer or the like due to a stress due to a difference in thermal expansion coefficient between the interposer board and the wiring board, and connection reliability is increased. It is an object of the present invention to provide an electronic component excellent in connection reliability, a method of manufacturing the electronic component, and an electronic component mounted body. A connecting portion of an electronic component for mounting an LSI chip on an interposer substrate is connected to an electrode.
5 and the stress relief structure 16 and the relay metal layer 17. The cross-sectional shape of the relay metal layer 17 is trapezoidal, and the area of the surface in contact with the stress relief structure 16 is smaller than the area of the opposite surface. Accordingly, when the electronic component 13 is mounted on the wiring board, the occurrence of cracks in the solder layer or the like can be prevented, and the connection reliability of the electronic component mounted body can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a method of connecting electronic parts having different thermal expansion coefficients to a wiring board.
The present invention relates to an electronic component having a configuration capable of relieving a strain stress generated by a difference in thermal expansion coefficient and preventing a connection failure and the like, a method of manufacturing the electronic component, and an electronic component mounted body. The electronic components according to the present invention include mechanical components and circuit boards such as semiconductor packages, capacitors, resistors, coils, various sensors, and switches, and circuit modules such as MCMs and HICs. It is possible to

[0002]

2. Description of the Related Art An example of a semiconductor package as one of conventional electronic components according to the present invention will be described below. Conventionally, plastic QFPs (quad flat packages) that lead input / output leads from four sides of a package are often used as package-type semiconductor devices. With the progress of large-scale integration of electronic components such as semiconductor devices, the number of input / output terminals has been increased and the package shape of the QFP has been inevitably increased. To solve this problem, the design rules of the semiconductor chip have been made ultra-fine, and the lead pitch has been narrowed to cope with the miniaturization and thinning of a wide variety of electronic devices.

However, an LSI having a scale exceeding 400 pins
Therefore, even if the pitch is narrowed, it has become impossible to sufficiently cope with problems such as mass productivity of soldering. Another problem that cannot be avoided when electronic components such as a semiconductor package are mounted on a wiring board is a difference in thermal expansion coefficient between the two components. It has been extremely difficult to reliably connect a large number of input / output leads of an electronic component having different coefficients of thermal expansion to a large number of electrode terminals on a wiring board. In addition, a long input / output lead associated with an increase in the size of the plastic QFP has a problem that the signal transmission speed is reduced.

In order to solve many problems of such a plastic QFP, recently, instead of the QFP, a ball grid array (BGA) in which spherical connection terminals are arranged in a two-dimensional array on the back surface of a semiconductor package. And an LGA (land grid array) in which many flat electrodes are arranged in an array on the back of the package and mounted
In addition, a semiconductor device called a CSP (chip size package), which does not have a lead pin such as a QFP, has attracted attention.

In these semiconductor devices, since the external connection electrodes of the chip carrier are arranged in a lattice on the back surface of the chip carrier, the semiconductor device can be reduced in size and many electronic components can be mounted at a high density. This has made it possible to greatly contribute to the miniaturization of electronic devices. In addition, since it is leadless, the connection distance between the semiconductor device and the wiring board can be shortened, and the signal processing speed can be improved.

[0006]

However, even in a conventional BGA having the above-mentioned structure, when a package is mounted on a wiring board and soldering is performed, there is a problem of package destruction or connection failure due to a difference in thermal expansion coefficient. Cannot be solved and cannot withstand a reliability test such as a thermal shock test. For example, since a difference in thermal expansion coefficient between a chip carrier mainly composed of ceramic and a wiring substrate made of glass fiber and resin is very large, a large stress is generated in a connection portion, and connection reliability is reduced.

FIG. 6 shows a conventional connection structure for connecting an electronic component such as a semiconductor device to a wiring board.
The electrode 4 of the electronic component 3 having the SI chip 1 mounted on the ceramic carrier 2 and the electrode 6 of the wiring board 5 are connected by a solder layer 7. In such a connection structure, the difference in thermal expansion coefficient between the ceramic carrier 2 of the electronic component 3 and the wiring board 5 made of synthetic resin or the like is large. Therefore, as the dimension L of the electronic component 3 increases, a greater stress is generated at the connection portion. However, the danger of breaking the connection part is increased, and therefore, the material that can be used for the electronic component or the wiring board is greatly restricted.

[0008] The present invention is to solve the above problems,
The electronic component and the wiring board are connected with high reliability via a stress relaxation mechanism having conductivity, and a defective connection portion due to a difference in the coefficient of thermal expansion between the electronic component and the wiring board, particularly a solder layer Electronic component capable of preventing the occurrence of cracks, a method of manufacturing the electronic component, and mounting the electronic component on a wiring board, package, circuit module, or the like to provide an electronic component mounted body having excellent connection reliability. And

[0009]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a stress relaxation structure having conductivity on the upper surface of an electrode provided on the surface of a substrate which is one of constituent substrates of an electronic component. Formed on the surface of the stress relieving structure, a relay metal layer having an area of a surface in contact with the surface of the stress relieving structure having an area smaller than an area of an opposite surface thereof. According to the above, when an electronic component is mounted on a wiring board, mechanical stress caused by a difference in thermal expansion coefficient between the two components is applied to the surface of the electronic component or the surface of the wiring board even when a sudden temperature change occurs in an external environment. A portion having a small area of the relay metal layer is connected to the stress relaxation structure at the same time as the provided stress relaxation mechanism absorbs, and a portion having a large area of the relay metal layer is connected to the solder layer. To avoid stress concentration to prevent cracking, it is possible to prevent the occurrence of defects in the connection portion between the electronic component and the wiring board.

According to a first aspect of the present invention, there is provided an electrode provided on a substrate surface, a conductive stress relaxation structure formed on an upper surface of the electrode, and a stress relief structure provided on the surface of the stress relaxation structure. A relay metal layer, wherein the area of the surface of the relay metal layer in contact with the surface of the stress relaxation structure is smaller than the area of the surface on the opposite side, and the coefficient of thermal expansion during the thermal shock test The stress caused by the difference between the two is absorbed by the stress relaxation mechanism, and the area of the relay metal layer in contact with the solder layer on the wiring board is made larger than the area of the opposite side, so that the electronic component or the electronic component and the wiring board Breakage does not occur in the connection portion with the semiconductor device, particularly in the solder layer, and the reliability of the semiconductor device and the electronic device can be improved.

According to a second aspect of the present invention, there is provided the electronic component according to the first aspect, wherein the surface area of the relay metal layer in contact with the surface of the stress relaxation structure is equal to or greater than the surface area of the stress relaxation structure. Is formed to have
The effects described in the embodiment according to claim 1 can be further improved.

According to a third aspect of the present invention, in the electronic component according to the first aspect, a stress relaxation structure having conductivity is provided.
This is provided so as to cover the entire exposed surface of the electrode, so that the reliability of bonding between the substrate and the electrode at the time of thermal shock can be improved.

According to a fourth aspect of the present invention, there is provided the electronic component according to the first aspect, wherein a copper foil is used as the relay metal layer, and since the bonding strength with the solder layer and the stress relaxation structure is excellent, The reliability of a semiconductor device or an electronic device can be improved.

According to a fifth aspect of the present invention, there is provided the electronic component according to the first, second, or third aspect, wherein the stress relaxation structure is formed of a conductive adhesive, and is formed by a relatively simple method. It can be manufactured at low cost.

According to a sixth aspect of the present invention, a precursor of a stress relaxation structure made of a conductive resin composition is selectively formed so as to cover a plurality of electrodes provided on a substrate made of an insulator. And placing a metal foil on the top surface of the stress relief structure precursor, and then heating and curing the stress relief structure precursor, and applying a photosensitive resist on the top surface of the metal foil. After the exposure, a step of exposing a predetermined pattern to the resist through an exposure mask, a step of developing and removing an unexposed portion of the resist, and a stress relaxation structure by side-etching the metal foil using the exposed resist as a mask Providing a relay metal layer having an inverted trapezoidal cross section on the upper surface of the body, comprising a relay metal layer having an inverted trapezoidal cross section on the stress relaxation structure by a relatively easy method. It can be formed that electronic components.

According to a seventh aspect of the present invention, a precursor of a stress relaxation structure made of a conductive resin composition is selectively formed to cover a plurality of electrodes provided on a substrate made of an insulator. A first step of obtaining a component substrate by performing the above process, and a relay metal layer having a trapezoidal cross section having the same pattern arrangement as a plurality of electrodes disposed on the substrate made of an insulator on the upper surface of the release substrate Forming a transfer plate to form a transfer plate, and positioning and attaching the component substrate obtained in the first step and the transfer plate obtained in the second step, and then heating the plate. After curing the precursor of the stress relieving structure made of the conductive resin composition, the third substrate is transferred to the upper surface of the stress relieving structure by transferring the trapezoidal relay metal layer by peeling the releasable substrate. And a method for manufacturing an electronic component, comprising: In order to create and copy version in advance in a separate process, it is possible to improve the yield of the product there is no waste.

An eighth aspect of the present invention relates to the method of manufacturing an electronic component according to the seventh aspect, wherein at least a surface of the releasable substrate is made of a substance having releasability and reducing property to metal. It is possible to improve the releasability of the relay metal layer from the transfer plate and to suppress the formation of an oxide film on the surface of the relay metal layer.

According to the ninth aspect of the present invention, there are provided the first to fifth aspects.
The electronic component described in any one of the above is mounted on a wiring board, and an electronic component mounted body applicable to an electronic device used under severe environmental conditions can be provided.

According to a tenth aspect of the present invention, there is provided the electronic component package according to the ninth aspect, wherein the electronic component comprises a plurality of electronic components having different shapes, and the electronic component having any shape is mounted. Even in such a case, it is possible to obtain an electronic component mounted body having excellent connection reliability.

An eleventh aspect of the present invention relates to the electronic component package according to the ninth aspect, wherein the stress relaxation structure and the relay metal layer are provided on at least one of the electronic component and the wiring board. In any aspect of the electronic component and the wiring board constituting the electronic component package, a free manufacturing process can be selected, and efficient and inexpensive manufacturing can be achieved.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1A shows the overall configuration of an electronic component according to a first embodiment of the present invention.
(B) is an enlarged view of a part thereof. FIG.
As shown in FIG. 1A, connection terminals (connection portions) 14 for connection to a wiring board or the like are provided on the bottom surface of an electronic component 13 composed of an interposer substrate 12 on which an LSI chip 11 is mounted. As shown in FIG. 1B, the connection terminals 14 are formed on the surface of the interposer substrate 12 and are connected to electrode pads (not shown) of an LSI chip face-bonded to the other surface of the interposer substrate 12. Connected electrode 15, stress relief structure 16 formed from a conductive resin composition made of copper paste or the like, and solderable relay metal layer 1 formed on its surface
7.

The feature of the present invention is that the relay metal layer 1
1 and the area connected to the stress relieving structure 16 is smaller than the area on the opposite side, as is clear from FIG. 1B. By forming the relay metal layer 17 in a trapezoidal shape in this way, the electronic component 1
In the case where 3 is mounted on a wiring board or the like, when the temperature rises, the stress generated due to the difference in the coefficient of thermal expansion between the electronic component 13 and the wiring board is absorbed by the elasticity of the stress relieving structure 16, and the electronic component is broken or It is possible to avoid the occurrence of a defect such as peeling of the wiring conductor from the wiring, the occurrence of cracks in the solder layer due to the conventional shape of the relay metal layer, and the like. Further, as shown in FIG. 1C, the connection portion 14a may be configured such that the relay metal layer 17 has a surface area connected to the surface of the stress relieving structure 16a larger than the surface area of the stress relieving structure 16a. It is possible.

The stress relaxation structure 16 is made of, for example, copper powder,
Since it can be formed from a conductive adhesive made of a mixture of a conductive filler such as silver powder and a synthetic resin material, FIG.
As shown in (c), the shape can be a free structure 16a.

(Embodiment 2) Next, a second embodiment of the present invention will be described. FIG. 2 shows a configuration of an electronic component according to a second embodiment of the present invention. The basic configuration is the same as that of the first embodiment, but the conductive stress relaxation structure 16b has the same configuration. Is provided so as to cover the entire exposed surface of the electrode 15 on the interposer substrate 12,
The connection portion 14b on the top 2 has an area where the stress relief structure 16b is in contact with the area where the electrode 15 is in contact, thereby improving the adhesion strength of the connection portion 14b to the interposer substrate 12.

(Embodiment 3) Next, a third embodiment of the present invention will be described. FIG. 3 is a process sectional view showing a method of manufacturing an electronic component according to a third embodiment of the present invention. First, as shown in FIG.
An interposer substrate 12 made of ceramic or synthetic resin or the like having a plurality of electrodes 15 formed on another surface connected to electrode pads (not shown) for mounting an SI chip and through-hole conductors. Figure 3 on the top
As shown in (b), a precursor of the stress relaxation structure 16 is formed on the electrode 15 by selectively printing a conductive adhesive having a stress relaxation function. Next, after arranging the copper foil 21 on the upper surface of the stress relaxation structure 16, the precursor is completely cured by heating (FIG. 3).
(C)). Next, as shown in FIG. 3D, a photosensitive resist 22 is provided on the upper surface of the copper foil, and after exposing the photosensitive resist through an exposure mask 23, a developing process is performed.
Unexposed portions of the photosensitive resist 22 are removed. Next, as shown in FIG. 3E, the copper foil 21 is etched under the selected conditions via the photosensitive resist 22, thereby forming the stress relief structure 16 on the stress relief structure 16 as shown in FIG. The relay metal layer 17 in which the side surface of each of the copper foils 21 is side-etched and the cross-sectional shape of the copper foil 21 has an inverted trapezoidal shape can be formed on the stress relaxation structure 16. After this step,
The LSI chip 11 is mounted on the opposite surface of the interposer substrate 12.

In the present embodiment shown in FIG.
Although the cross section of the stress relief structure 16 formed only on the surface of the electrode 5 is shown in a square or rectangular shape, in the printing process of the stress relief structure 16, not only on the surface of the electrode 15 but also on the electrode 15 It is also necessary for the design of the electronic component to form the shape protruding on the peripheral interposer substrate 12 (see FIG. 2) and the shape of the stress relaxation structure 16 itself into a trapezoidal shape (see FIG. 1C). It is possible according to gender.

(Embodiment 4) Next, a fourth embodiment of the present invention will be described. 4A to 4C are cross-sectional views illustrating a method of manufacturing an electronic component according to a fourth embodiment of the present invention. FIGS. 4A and 4B illustrate a first process, and FIGS.
FIG. 4F shows the second step, and FIGS. 4G and 4H show the third step.

First, in a first step shown in FIGS. 4A and 4B, a plurality of electrodes 15 are formed on an interposer substrate 12 made of an insulator (FIG. 4A), and FIG. By mounting the precursor of the stress relaxation structure 16 as shown in (b), a component substrate 24 similar to that obtained in the first half step shown in FIG. 3 is formed.

On the other hand, in the second step, as shown in FIG. 4 (c), the surface thereof is made of a material having releasability and reducing property against a metal foil such as copper, for example, a carbon film or a BN film. Copper foil 26 is temporarily attached to the surface of the release substrate 25
By selectively etching the copper foil 26 via the etching resist 27 as shown in FIG. 4D, the trapezoidal relay metal layer 2 as shown in FIG.
8 can be formed. After the etching, the etching resist 27 is dissolved and removed, and the resultant is inverted.
A transfer plate 29 having a trapezoidal relay metal layer 28 as shown in FIG.

Next, in the third step shown in FIGS. 4G and 4H, the component board 24 obtained in the first step and the second
After aligning the transfer plate 29 obtained in the step, the precursor of the stress relieving structure 16 is cured by heating and the relay metal layer 28 is firmly bonded, and then the release substrate 25 is peeled off. By mounting the LSI chip 11 on the opposite surface of the interposer substrate 12, the electronic component shown in FIG. 4H can be obtained.

(Embodiment 5) Next, a fifth embodiment of the present invention will be described with reference to FIG. FIG. 5 (a)
(C) is a partial cross-sectional view showing the structure of the electronic component mounted body according to the present embodiment, in which one of the electronic components having the structure described in Embodiment 1 or 2 is mounted on a wiring board. It is. First, as shown in FIG. 5A, an interposer substrate 12 on which an LSI chip 11 is mounted
The electronic component 31 having the connection portion 14 formed of the stress relaxation structure 16 and the trapezoidal relay metal layer 17 according to the present invention on the electrode 15 is soldered to the electrode terminal 33 formed on the wiring board 32. They are connected by the layer 34 to constitute an electronic component mounted body. The shape of the solder layer 34 can be changed depending on the size and shape of the electrode terminals 33 on the wiring board 32 or the soldering method, and the shape is reversed for the electrode terminals 33a having a small area as shown in FIG. As a result, the solder layer 34a has a trapezoidal cross section.
As shown in (c), a solder layer 34b having a trapezoidal cross section is formed on the electrode terminal 33b having an area larger than the exposed area of the relay metal layer 17. However, as is clear from the drawings shown in FIG. 5, the end face having a large area in the cross-sectional shape of the relay metal layer 17 was always connected to the solder layer 34, and the end face having a small area was connected to the stress relaxation structure 16. It has a structure.

On the other hand, the strain stress caused by the difference in the thermal expansion coefficient between the electronic component and the wiring board in the electronic component package is
Dispersion occurs at the same size on both end surfaces of the relay metal layer 17 (when both end surfaces of the relay metal layer have the same area).
However, the strain stress density per unit area generated on both end surfaces of the trapezoidal relay metal layer 17 increases on the small area side of the relay metal layer 17 and decreases on the large area side. Therefore, since the stress relaxation structure is arranged on the end face of the relay metal layer 17 where the strain stress is largely concentrated, the large strain stress is absorbed by the elasticity of the stress relaxation structure, thereby destructing the electronic component and reducing the connection portion. In addition, since the end surface having a large area of the relay metal layer 17 is disposed on the connection surface with the solder layer that is relatively hard to absorb the strain stress, the strain applied to the solder layer can be prevented. The stress can be reduced, and the occurrence of cracks or the like in the solder layer can be prevented.

Next, the shape of the above-mentioned solder layer 34 is arbitrarily set as a condition under which a defect such as a crack is most unlikely to occur due to the material (namely, thermal expansion coefficient difference), the shape, the pitch between electrodes, etc. of the electronic component and the wiring board. can do.

In the electronic component package according to the present invention, a plurality of electronic components can be mounted on the wiring board, and the same effect can be obtained.

Further, in the present invention, the example in which the stress relaxation structure and the relay metal layer are formed on the electronic component side has been described, but the same effect can be obtained when these are formed on the wiring board side. .

As described above, according to each embodiment of the present invention, a large-sized semiconductor device on which an LSI chip is mounted, and an MCM on which a plurality of semiconductor chips are mounted
High connection reliability can be obtained even when a large number of large electronic components such as a (multi-chip module) or small electronic components typified by cylindrical chip resistors and chip capacitors are mounted on a wiring board.

[0038]

As is apparent from the above embodiment, the present invention provides a stress relief structure having a conductive property in advance on the upper surface of an electrode of an electronic component at a portion where the electronic component is mounted on a wiring board and connected. A metal layer is provided, in particular, the cross-sectional shape of the relay metal layer is trapezoidal, the end face having a small area is connected to the stress relaxation structure, and the end face having a large area is on the electrode terminal of the wiring board. It is designed to be connected to a solder layer, and when soldering an electronic component to a wiring board or during a thermal shock test of a mounted electronic component, an electronic component due to a strain stress generated due to a difference in thermal expansion coefficient. Alternatively, cracks and the like do not occur in the connection portion between the electronic component and the wiring board, particularly in the solder layer, and the reliability of the electronic device equipped with the electronic component mounted body according to the present invention can be significantly improved. The ability.

[Brief description of the drawings]

1A is a sectional view of an electronic component according to a first embodiment of the present invention; FIG. 1B is a partially enlarged sectional view of the electronic component according to the first embodiment; Partial enlarged sectional view of another electronic component according to the embodiment.

FIG. 2 is a partially enlarged cross-sectional view of an electronic component according to a second embodiment of the present invention.

FIGS. 3A to 3F are process cross-sectional views illustrating a method of manufacturing an electronic component according to a third embodiment of the present invention.

FIGS. 4A to 4H are process cross-sectional views illustrating a method of manufacturing an electronic component according to a fourth embodiment of the present invention.

FIGS. 5A to 5C are partially enlarged views of an electronic component package having different connection portions according to a fifth embodiment of the present invention.

FIG. 6 is a cross-sectional view of a conventional electronic component mounted body.

[Explanation of symbols]

 1,11 LSI chip 2 ceramic carrier 3,13,31 electronic component 4,6,15,33,33a, 33b electrode 5,32 wiring board 7,34,34a, 34b solder layer 12 interposer board 14,14a, 14b Connection part 16, 16a, 16b Stress relaxation structure 17, 17a, 17b, 28 Relay metal layer 21, 26 Copper foil 22 Photosensitive resist 23 Exposure mask 24 Component substrate 25 Releasable substrate 27 Etching resist 29 Transfer plate

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Minehiro Itagaki 1006 Kazuma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. F term (reference) 5E319 AA03 AB05 CC22 GG20 5E336 AA04 AA11 BB01 BB02 CC34 CC36 CC44 CC52 CC53 CC58 EE03 EE08 GG05 GG30

Claims (11)

[Claims] An electrode provided on a substrate surface; a conductive stress relaxation structure formed on an upper surface of the electrode;
A relay metal layer provided on the surface of the stress relaxation structure, wherein the area of the surface of the relay metal layer in contact with the surface of the stress relaxation structure is smaller than the area of the surface on the opposite side of the relay metal layer. An electronic component, characterized in that: 2. The electronic component according to claim 1, wherein a surface area of the relay metal layer in contact with a surface of the stress relaxation structure has an area equal to or larger than a surface area of the stress relaxation structure. 3. The electronic component according to claim 1, wherein the stress relaxation structure having conductivity is provided so as to cover the entire exposed surface of the electrode. 4. The electronic component according to claim 1, wherein the relay metal layer is a copper foil. 5. The electronic component according to claim 1, wherein the stress relaxation structure is formed of a conductive adhesive. 6. A step of selectively forming a precursor of a stress relaxation structure made of a conductive resin composition so as to respectively cover a plurality of electrodes provided on a substrate made of an insulator; After arranging the metal foil on the top surface of the precursor of the structure, heating and curing the precursor of the stress relaxation structure, and after adhering a photosensitive resist on the top surface of the metal foil, the exposure mask A step of exposing a predetermined pattern to the resist, a step of developing and removing an unexposed part of the resist, and a step of side-etching the metal foil using the exposed resist as a mask to form an upper surface of the stress relaxation structure. Providing a relay metal layer having an inverted trapezoidal cross section. 7. A component substrate is obtained by selectively forming a precursor of a stress relaxation structure made of a conductive resin composition so as to cover a plurality of electrodes provided on a substrate made of an insulator, respectively. A first step of forming a relay metal layer having a trapezoidal cross section having a pattern similar to that of the plurality of electrodes disposed on the substrate made of the insulator on an upper surface of the release substrate; And the component substrate obtained in the first step and the transfer plate obtained in the second step are aligned and adhered, and then heated to obtain the conductive resin composition. After curing the precursor of the stress relaxation structure, the release substrate is peeled off to transfer the trapezoidal relay metal layer to the upper surface of the stress relaxation structure.
And a method for manufacturing an electronic component. 8. The method for manufacturing an electronic component according to claim 7, wherein at least the surface of the releasable substrate is made of a substance having releasability and reducing property for metal. . 9. An electronic component mounted body, wherein the electronic component according to claim 1 is mounted on a wiring board. 10. The electronic component package according to claim 9, wherein the electronic component is a plurality of electronic components having different shapes. 11. The electronic component package according to claim 9, wherein the stress relaxation structure and the relay metal layer are provided on at least one of the electronic component and the wiring board.