JP2000261029A - Optical semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor element in a relatively simple constitution for guiding injection currents to a region separated from a part which is a shade of an upper electrode. SOLUTION: A current passage control layer 2 constituted of an n-type AlAs current conducting region 2-1 and an AlxOy current preventing region 2-2, an n-type Al0.4Ga0.6As lower clad layer 3, a p type Al0.15Ga0.85As active layer 4, and a p-type Al0.4Ga0.6As upper clad layer 5 are successively formed on an n-type GaAs substrate 1. Moreover, a P+ type GaAs electrode contact layer 6 having a light emitting window is formed on this, and an intermediate insulating film 7 and a P-electrode layer 8 are formed, and an N-electrode layer 9 is formed on the back face of the n-type GaAs substrate 1. A region which is the shade of the upper electrode layer, when viewed from the light emitting face side, is formed as the AlxOy current preventing region 2-2, and injection currents are introduced to a part which is not shield by the upper electrode. Thus, the decrease in light emission output due to the shape of the P-electrode layer 8 can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device such as a light emitting diode (LED), a semiconductor laser, or a light receiving device.

[0002]

2. Description of the Related Art Various applied devices have been put into practical use as optical semiconductor devices. Among them, for example, surface-emitting LEDs are used as various light sources, and an LED array device in which the LEDs are arrayed is used, for example, as a light source for an electrophotographic printer. In a typical surface-emitting type LED, a semiconductor layer having a double hetero structure including an active layer, an upper clad layer, and a lower clad, which is a light-emitting layer, is provided on one surface of a semiconductor substrate, and an electrode contact layer is provided. An upper electrode layer is provided by laminating on a partial region of the upper cladding layer, and a lower electrode layer is provided on the other surface of the semiconductor substrate, and the upper electrode is provided on a portion having the highest emission intensity. Configuration. Therefore, there is a problem that the light emission is blocked by the upper electrode and the light emission output of the LED cannot be sufficiently increased, and there is a problem that the light emission output that can be taken out from the upper surface varies due to minute processing variation of the electrode. Conventionally, as a solution to such a problem, for example, in Japanese Patent Application Laid-Open No. 6-302856, a current diffusion layer is provided on the upper part of a double hetero structure, so that a portion other than a portion that becomes a shadow of the upper electrode (a portion immediately below the upper electrode). The injection current is spread.

[0003]

However, in such a configuration in which the current diffusion layer is provided on the upper portion, the thickness of the current diffusion layer needs to be sufficiently large, and it takes a long time to form the diffusion layer and perform island-shaped etching to the element shape. Is required. Therefore, an object of the present invention is to provide an optical semiconductor device and a method for manufacturing the same, which are configured to conduct a current to a region away from a portion where the upper electrode is hidden by using a relatively thin layer. .

[0004]

According to the present invention, a semiconductor layer including an active layer is provided on one surface of a semiconductor substrate, and a partial region in the semiconductor layer is provided with or without an electrode contact layer. A first electrode layer, which is an upper electrode for supplying a current, for example, is provided thereon, and is a lower electrode for supplying a current, for example, to the other surface of the semiconductor substrate. And an optical semiconductor device provided with a second electrode layer. Here,
The semiconductor layer including the active layer is, for example, a semiconductor layer having a double hetero structure including a light emitting layer, and a semiconductor layer having a pn junction for light emission. According to a first aspect of the present invention, a current path regulating layer including a current carrying region and a current blocking region is provided between a semiconductor substrate and a semiconductor layer including an active layer. The current-carrying region there is made of a conductive semiconductor, and the current-blocking region is the first region as viewed from the light-receiving / emitting surface side.
And is formed of the same semiconductor oxide insulator as the pre-current conducting region. The light receiving / emitting surface means a light emitting surface, a light receiving surface, and a light emitting / receiving surface. According to this configuration, for example, when a current path regulating layer is provided below a semiconductor layer having a double heterostructure of an LED, at least an insulating layer is provided immediately below the upper electrode. In addition to being guided by a portion not concealed by the opaque electrode, a decrease in luminous output due to the shadow of the opaque electrode is prevented, and luminous variation due to processing variations of the electrode is reduced. The invention according to claim 2 is a semiconductor device, comprising: a conductive AlAs layer on a semiconductor substrate;
A semiconductor layer including an active layer, and an electrode contact layer,
A first step of sequentially forming, and a second step of etching a layer obtained in the first step, that is, a layer from the conductive AlAs layer to the electrode contact layer to obtain a predetermined island-shaped laminate, Forming an antioxidant film covering the laminate except for a predetermined side surface portion of the laminate, and then performing an oxidation treatment, the method comprising: a lower part of the semiconductor layer including the active layer; Then, a current path regulating layer composed of a conductive type AlAs region as a current flow region and an Al oxide insulator region as a current blocking region is formed. The antioxidant film here is provided so as to correspond to the region where the current flow region is formed in the current path regulating layer. Desirably, the entirety of one side surface of each laminate is adapted to the planar shape of the upper electrode. Alternatively, it is provided so as to cover the entire remaining portion except for the central portion of one side surface.

[0005]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of the present invention.
FIG. 2 is a plan view of the ED array device, and FIG. 2 and FIG. 3 are cross-sectional views showing a manufacturing process of the LED shown in FIG. The current path regulating layer, 2-1 is an n-type AlAs current conducting region, and 2-2 is AlxO
y current blocking region, 3 is an n-type Al0.4Ga0.6As lower cladding layer, 4 is a p-type Al0.15Ga0.85As active layer, 5 is a p-type Al0.15Ga0.85As active layer.
Type Al0.4Ga0.6As upper cladding layer, 6 is p + type Ga
An As electrode contact layer, 7 is an intermediate insulating film, 8 is a P electrode layer, and 9 is an N electrode layer. First, a configuration and a manufacturing process of the LED according to this embodiment will be described with reference to FIGS. As shown in FIG. 2A, on an n-type GaAs substrate 1, an n-type AlAs layer 2, an n-type Al0.4 Ga0.6 As layer 3, a p-type Al0.15 Ga0.85 As layer 4, a p-type Al0.4 Ga
The 0.6 As layer 5 and the p + -type GaAs layer 6 are sequentially grown epitaxially. MOCVD, MBE and the like are suitable for the method of epitaxial growth. Next, FIG.
As shown in (B), the above-described epitaxially grown films 2 to 6 are processed into an island shape by photolithography and etching to perform element isolation. As the etching here, dry etching or wet etching using a neighboring acid-based etchant can be used. In this process,
n-type Al0.4Ga0.6As lower cladding layer 3, p-type Al0.
15Ga0.85As active layer 4 and p-type Al0.4Ga0.6A
The shape of the upper cladding layer 5 is determined. Next, FIG.
As shown in (1), a selective oxidation preventing film is formed, and is etched and removed by a photolithographic etching technique except for a portion that is not selectively oxidized. That is, the selective oxidation prevention film 11 is formed to cover the remaining portion except for one side surface of the island-shaped laminate.
As the etching, dry etching or wet etching using a hydrofluoric acid-based etchant or the like can be used.

[0006] Next, as shown in FIG.
The s layer 2 is selectively oxidized from the end face direction to form an oxide insulator region 2-2. This selective oxidation can be performed, for example, by exposing to a steam atmosphere at a high temperature of about 400 ° C.
Only the type AlAs layer 2 can be oxidized. The length of selective oxidation can be controlled by time. In this step, the n-type AlAs current conducting region 2-1 and Alx
The region of the Oy current blocking region 2-2 is determined. Next, FIG.
As shown in (E), after the oxidation is completed, the unnecessary selective oxidation preventing film 11 is removed by etching. Next, as shown in FIG. 2F, an intermediate insulating film for insulating the P electrode layer 8 from the n-type GaAs substrate 1 is formed. As the intermediate insulating film, a silicon nitride film, a silicon oxide film, or the like can be used. This film can be formed by a plasma CVD method or the like.
After the film formation, an opening is formed on the upper surface of the island connecting the P electrode layer 8 by photolithography / etching technology. As the etching, dry etching or wet etching using a hydrofluoric acid-based etchant can be used. In this step, the shape of the intermediate insulating film 7 is determined.

[0007] Next, as shown in FIG.
To form The P electrode layer 8 can be used as long as it can form an ohmic junction with the p + -type GaAs electrode contact layer 6.
For example, aluminum (Al) can be used. P electrode layer 8
Forms a film to be a P electrode on the entire surface of the substrate and processes it into a desired shape by a photolithographic etching technique. After this, P
In order to improve the bonding between the electrode layer 8 and the p + -type GaAs electrode contact layer 6, a heat treatment can be performed. Next, as shown in FIG. 2H, the p + -type GaAs layer 6 other than the portion necessary for connection with the P electrode layer 8 is removed by etching. This is because when light emitted inside is taken out, p
The purpose is to eliminate a decrease in the amount of light due to light absorption of the + type GaAs layer 6, and this step can be omitted. In this step, the shape of the p + -type GaAs layer 6 is determined. Next, as shown in FIG. 2J, the n-type GaAs substrate 1
The N electrode layer 9 is formed on the back surface of the substrate. N-type G for improved characteristics
After polishing the back surface of the aAs substrate 1, the N electrode layer 9 may be formed. Here, the material forming the N electrode layer 9 is n-type Ga
The material is not particularly limited as long as the material can make ohmic contact with As substrate 1. For example, a gold (Au) -based alloy can be used as a constituent material of the N electrode layer 9.

By the above steps, as shown in FIG.
N-type AlAs current flowing region 2-1 on n-type GaAs substrate 1
, A current path regulating layer 2 comprising an AlxOy current blocking region 2-2, an n-type Al0.4 Ga0.6 As lower cladding layer 3, a p-type A
0.15 Ga0.85 As active layer 4, p-type Al0.4 Ga0.6 As
An upper clad layer 5, ap + -type GaAs electrode contact layer 6 having an emission window, an intermediate insulating film 7, and a P electrode layer 8 as a lower electrode are provided, and an N electrode as a lower electrode on the back surface of the n-type GaAs substrate 1. The LED array device provided with the layer 9 is manufactured. In FIG. 1, the hatched region is the AlxOy current blocking region 2-2 in the current path regulating layer 2, and this AlxOy current blocking region 2-2 is at least the P electrode layer 8 which is the upper electrode. Since the shaded region is covered, the injection current supplied from the P electrode layer 8 is guided to a portion not concealed by the electrode, and the light emission due to the injection current does not become shade of the P electrode layer 8. , Can be taken out from the upper surface. According to this embodiment,
Since the injection current path is regulated by the current path regulation layer composed of the current conduction area composed of the conductive type semiconductor layer and the current blocking area composed of the oxide insulator of the semiconductor, a particularly thick layer is used. In addition, it is possible to prevent the light emission output from being reduced due to the shadow of the opaque electrode, and to reduce the light emission variation due to the electrode processing variation. Further, according to this embodiment, since the current blocking region made of an oxide insulator may be arranged in accordance with the arrangement of the upper electrode, the light emitting area can be increased or the light emitting portion can be arranged in an array. It becomes possible to arrange at high density.

Next, another embodiment of the present invention will be described with reference to FIG. FIG. 4 shows an embodiment of the present invention.
FIG. 4 is a plan view of the ED array device and a cross-sectional view taken along the line B′-B ″. The LED in FIG. 4 is an n-type GaAs substrate 1 and an n-type Al 0.4 Ga 0.6 As, similarly to the above-described embodiment.
Lower cladding layer 3, p-type Al0.15Ga0.85As active layer 4, p-type Al0.4Ga0.6As upper cladding layer 5, p + -type GaAs electrode contact layer 6 having an emission window, intermediate insulating film 7, P electrode layer 8 , And an N electrode layer 9, and a current path regulating layer 20 different from the above-described embodiment. The current path regulating layer 20 is formed by performing selective oxidation from the entire periphery of the island-shaped laminated body without using an antioxidant film instead of the steps (C) to (E) in FIG. As shown by hatching in the figure, an n-type AlAs current conducting region 201
And an AlxOy current blocking region 202 is provided therearound. According to this configuration, similarly to the above-described embodiment, it is possible to control the current path, and light emitted by the current supplied from the P electrode layer can be extracted to the upper surface without being shaded by the P electrode layer. It becomes possible. Further, according to this embodiment, the current path regulating layer has a current confinement function, and thus is not suitable for use as a light source for a high-density printer, but is suitable for a light source for high output. In the above embodiment, an LED device having a double hetero structure as a semiconductor layer including an active layer has been described. However, if the current control element is formed by using a selective oxide film, a single hetero junction type,
The present invention can be applied to a homojunction type element, and can also be applied to a surface emitting laser or a light receiving element.

[0010]

As described above, according to the present invention, a current path regulating layer including a current conducting region formed of a conductive semiconductor layer and a current blocking region is provided, and the current blocking region is viewed from the light emitting surface side. Providing, for example, an injection current to a portion that is not concealed by the upper electrode by providing the current application region with a semiconductor oxide insulator in the current application region at least including a region that is hidden by the first electrode layer. So there is no need to provide a special thick layer,
It has effects such as simple configuration and easy manufacturing.

[Brief description of the drawings]

FIG. 1 is a plan view of a main part of an LED array device showing an embodiment of the present invention, and a cross-sectional view taken along line A′-A ″ thereof.

FIG. 2 is a sectional view showing a manufacturing process of the LED of FIG. 1;

FIG. 3 is a sectional view showing a manufacturing process of the LED of FIG. 1;

FIG. 4 is a plan view of a main part of an LED array device showing another embodiment of the present invention, and a cross-sectional view thereof taken along line B′-B ″.

[Explanation of symbols]

 Reference Signs List 1 n-type GaAs substrate 2 current path regulating layer 2-1 n-type AlAs current conducting region 2-2 AlxOy current blocking region 3 n-type Al0.4 Ga0.6 As lower cladding layer 4 p-type Al0.15 Ga0.85 As active layer 5 p-type Al0.4Ga0.6As upper cladding layer 6 p + type GaAs electrode contact layer 7 intermediate insulating film 8 P electrode layer 9 N electrode layer

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masumi Koizumi 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd. (72) Inventor Shigeki Ogura 1-7-112 Toranomon, Minato-ku, Tokyo Offshore F-term (reference) in Denki Kogyo Co., Ltd. 5F041 AA04 AA31 CA04 CA12 CA22 CA36 CA77 CB04 5F049 MA03 MB07 NA08 QA01 SS04 5F073 AB16 CA05 CB02 DA27

Claims (2)

[Claims] A semiconductor layer including an active layer is provided on one surface of a semiconductor substrate and partially laminated on a partial region of the semiconductor layer with or without an electrode contact layer. In an optical semiconductor device provided with a first electrode layer and a second electrode layer provided on the other surface of the semiconductor substrate, a current-carrying region is provided between the semiconductor substrate and the semiconductor layer. A current blocking region comprising a current blocking region, wherein the current conducting region of the current path regulating layer is made of a conductive semiconductor; and the current blocking region of the current path regulating layer is viewed from the light receiving / emitting surface side. An optical semiconductor element provided in a region including at least a region that is a shadow of the first electrode layer, and is made of the same semiconductor oxide insulator as the current-carrying region. 2. A first step of sequentially forming at least a conductive AlAs layer, a semiconductor layer including an active layer, and an electrode contact layer on a semiconductor substrate; and forming a layer obtained in the first step. A second step of etching to obtain a predetermined island-shaped laminate, and a third step of forming an antioxidant film covering the laminate except for a predetermined side surface of the laminate, and then performing an oxidation treatment. A conductive type Al between the semiconductor substrate and the semiconductor layer.
A method for manufacturing an optical semiconductor device, comprising forming a current path regulating layer comprising an As region and an oxide insulator region thereof.