JP2000243783A - Semiconductor sensor and fabrication thereof - Google Patents
Semiconductor sensor and fabrication thereofInfo
- Publication number
- JP2000243783A JP2000243783A JP11042748A JP4274899A JP2000243783A JP 2000243783 A JP2000243783 A JP 2000243783A JP 11042748 A JP11042748 A JP 11042748A JP 4274899 A JP4274899 A JP 4274899A JP 2000243783 A JP2000243783 A JP 2000243783A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- semiconductor sensor
- sensor chip
- substrate
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 89
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000002184 metal Substances 0.000 claims abstract description 131
- 229910052751 metal Inorganic materials 0.000 claims abstract description 131
- 239000000463 material Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 abstract description 36
- 238000005259 measurement Methods 0.000 abstract description 2
- 230000005540 biological transmission Effects 0.000 abstract 1
- 230000008859 change Effects 0.000 description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 230000008569 process Effects 0.000 description 9
- 239000011521 glass Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920002050 silicone resin Polymers 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005549 size reduction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/13078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体のパッケー
ジング技術に関するもので、より具体的には基板と半導
体センサチップの電気的接合技術に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor packaging technique, and more particularly, to an electrical joining technique between a substrate and a semiconductor sensor chip.
【０００２】[0002]
【従来の技術】半導体センサチップを回路基板に実装し
てパッケージングする方法の一つとして、従来からワイ
ヤボンディング法が用いられている。すなわち、図１に
示すように、半導体センサチップ１を樹脂製のステム２
の底面にダイボンディング材３を用いて固定する。次い
で、ステム２に一体的に形成されたリード端子４と半導
体センサチップ１の端子とをボンディングワイヤ５にて
接続する。そして、ステム２の外側に突出したリード端
子４の先端を回路基板上の配線パターンに電気的に導通
させるようにしている。2. Description of the Related Art As one of the methods for mounting a semiconductor sensor chip on a circuit board for packaging, a wire bonding method has conventionally been used. That is, as shown in FIG. 1, a semiconductor sensor chip 1 is connected to a resin stem 2.
Is fixed using a die bonding material 3 on the bottom surface of the substrate. Next, the lead terminals 4 formed integrally with the stem 2 and the terminals of the semiconductor sensor chip 1 are connected by bonding wires 5. The distal end of the lead terminal 4 protruding outside the stem 2 is electrically connected to the wiring pattern on the circuit board.
【０００３】また、係るボンディングワイヤ法では、半
導体センサチップ１をステム２に実装し、そのステム２
を基板に装置実装するようになっており、しかも、ボン
ディングワイヤ５をはわせる空間が必要となるので、小
型化に限界があった。In the bonding wire method, a semiconductor sensor chip 1 is mounted on a stem 2 and the stem 2
Is mounted on a substrate, and a space for the bonding wire 5 is required, which limits the size reduction.
【０００４】そこで、さらなる小型化を図るため、最
近、一般のＩＣで用いられているバンプを用いたベアチ
ップ実装（フリップチップ実装）を半導体センサの実装
にも適用することが試みられている。In order to further reduce the size, attempts have recently been made to apply bare chip mounting (flip chip mounting) using bumps used in general ICs to mounting of semiconductor sensors.
【０００５】すなわち、図２に示すように、半導体セン
サチップ１の電極部に金属突起（バンプ）７を設け、そ
れを基板８と向かい合わせて接合する。このとき、金属
突起７は、基板８上に形成された配線パターンに接合さ
れる。さらに、金属突起７の存在しない基板８と半導体
センサチップ１の隙間には、接合材９が充填される。こ
のように、半導体センサチップ１を直接基板８に接続す
ることにより、大幅な小型化を図ることができる。That is, as shown in FIG. 2, a metal projection (bump) 7 is provided on an electrode portion of the semiconductor sensor chip 1, and the metal projection is bonded to a substrate 8. At this time, the metal projection 7 is joined to the wiring pattern formed on the substrate 8. Further, a bonding material 9 is filled in a gap between the substrate 8 and the semiconductor sensor chip 1 where no metal protrusion 7 exists. As described above, by directly connecting the semiconductor sensor chip 1 to the substrate 8, it is possible to significantly reduce the size.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、図２に
示す構造では、小型化は図れるものの、新たな問題が生
じる。すなわち、半導体センサチップ１内に発生する応
力によってセンサに歪みが発生し、出力特性の変化が起
こってしまう。However, in the structure shown in FIG. 2, although a size reduction can be achieved, a new problem arises. That is, the sensor generates distortion in the sensor due to the stress generated in the semiconductor sensor chip 1, and the output characteristics change.
【０００７】すなわち、半導体センサチップ１は、通常
検出対象の物理量を受けて変位する可動部（梁（重り）
・ダイアフラムなど）を有するシリコン基板と、そのシ
リコン基板を固定するガラス基板を積層した構造となっ
ている。また、基板８は、上記シリコンやガラスに比べ
て熱膨張係数の大きいガラエポ樹脂により構成されてい
る。That is, the semiconductor sensor chip 1 normally has a movable portion (beam (weight)) which is displaced by receiving a physical quantity to be detected.
A structure in which a silicon substrate having a diaphragm and a glass substrate for fixing the silicon substrate are laminated. The substrate 8 is made of glass epoxy resin having a larger coefficient of thermal expansion than the above silicon or glass.
【０００８】さらに、金属突起７の高さは、高くても１
００μｍ程度が限度であり、実際には数１０μｍ程度と
なる。したがって、基板８と半導体センサチップ１の一
体化の度合いが強く、金属突起７の部分では応力が吸収
されない。Further, the height of the metal projection 7 is at most 1
The limit is about 00 μm, and in practice it is about several tens of μm. Therefore, the degree of integration between the substrate 8 and the semiconductor sensor chip 1 is high, and stress is not absorbed at the metal projection 7.
【０００９】そして、温度変化にともない基板８が大き
く膨張・収縮しようとした場合、その基板８に接合され
ているガラス基板はそれに追従して比較的大きく膨張・
収縮するものの、基板に接続されていないシリコン基板
や、ガラス基板（３層構造の場合）は、フリー状態であ
るのでもともと有する熱膨張係数にしたがって膨張・収
縮するのでその変化量は少ない。その結果、シリコン基
板の両面（基板に接続されたガラス基板側と、その反対
側の面）での膨張率が異なるので、シリコン基板自体に
も応力がかかるとともに、測定対象の物理量が変化しな
いにもかかわらずその温度変化にともなって可動部が変
位してしまい、ガラス基板とのギャップが上下で異なっ
てしまう。その結果、オフセット値が変動してしまい、
正確な出力特性が得られなくなる。When the temperature of the substrate 8 is largely expanded and contracted due to the temperature change, the glass substrate bonded to the substrate 8 is relatively expanded and contracted.
Although a silicon substrate or a glass substrate (in the case of a three-layer structure) that contracts but is not connected to a substrate expands and contracts in accordance with the thermal expansion coefficient that is originally in the free state, the change amount is small. As a result, since the coefficients of expansion on both sides of the silicon substrate (the glass substrate connected to the substrate and the opposite side) are different, stress is applied to the silicon substrate itself, and the physical quantity of the measurement object does not change. Nevertheless, the movable portion is displaced with the temperature change, and the gap with the glass substrate is different between the upper and lower portions. As a result, the offset value fluctuates,
Accurate output characteristics cannot be obtained.
【００１０】本発明は、上記した背景に鑑みてなされた
もので、その目的とするところは、上記した問題を解決
し、半導体センサチップと基板の熱膨張係数の相違にと
もない発生する温度変化時の半導体センサチップ側へ応
力や撓みを低減させることで、高性能で小型の半導体セ
ンサ及びその製造方法を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above background, and has as its object to solve the above-described problems and to reduce the temperature change caused by the difference in the coefficient of thermal expansion between a semiconductor sensor chip and a substrate. Another object of the present invention is to provide a high-performance and small-sized semiconductor sensor and a method for manufacturing the same by reducing stress and bending toward the semiconductor sensor chip side.
【００１１】[0011]
【課題を解決するための手段】上記した目的を達成する
ために、本発明に係る半導体センサでは、回路基板上に
半導体センサチップを実装するとともに、前記半導体セ
ンサチップの電極と前記回路基板の配線の間に金属柱を
介在させてなる半導体センサであって、前記金属柱は、
複数の金属突起が積み重なって構成するようにした（請
求項１）。In order to achieve the above object, in a semiconductor sensor according to the present invention, a semiconductor sensor chip is mounted on a circuit board, and electrodes of the semiconductor sensor chip and wiring of the circuit board are provided. A semiconductor sensor having a metal pillar interposed therebetween, wherein the metal pillar comprises:
A plurality of metal projections are configured to be stacked (claim 1).
【００１２】このように構成すると、半導体センサチッ
プと回路基板の間の隙間は、金属柱の高さ、つまり積層
した複数個の金属突起の合計の高さとほとんど同じだけ
空くことになる。According to this structure, the gap between the semiconductor sensor chip and the circuit board becomes almost the same as the height of the metal pillar, that is, the total height of the plurality of stacked metal projections.
【００１３】なお、請求項１に記載されている複数の金
属突起は、すべて同一の材質で構成されていてもよい
し、別の材質で構成されていても構わない。また、請求
項１に記載されている複数の金属突起は、すべて同一形
状で構成されていてもよいし、別の形をしていても構わ
ないものとする。The plurality of metal projections described in claim 1 may be all made of the same material, or may be made of different materials. Further, the plurality of metal protrusions described in claim 1 may have the same shape or may have different shapes.
【００１４】要するに、請求項１に記載の突起は、例え
ば、半導体センサチップの電極上に金属突起を形成し、
その金属突起の上部に何らかの導電部材で厚みを付けた
とき、半導体センサチップと回路基板の間にできる隙間
の高さが、金属突起のみを半導体センサチップの電極上
に形成した後、この金属突起と回路基板を接続したとき
にできる隙間よりも大きな隙間を作れるような導電部材
であれば、そのような金属突起の上部に厚みを作る何ら
かの導電部材は、半導体センサチップの電極上に形成す
る金属突起と同様にして請求項１に記載される金属突起
に含まれるものとする。In short, according to the first aspect, for example, a metal projection is formed on an electrode of a semiconductor sensor chip,
When the thickness of the gap between the semiconductor sensor chip and the circuit board is increased when a thickness is applied to the upper portion of the metal projection with some conductive member, only the metal projection is formed on the electrode of the semiconductor sensor chip. Any conductive member that can create a gap larger than the gap that can be created when the circuit board is connected to the circuit board is made of a metal that is formed on the electrodes of the semiconductor sensor chip. It is included in the metal projection according to claim 1 in the same manner as the projection.
【００１５】上記したことと同様の理由で、突起を構成
する金属突起の外観は必ずしも明確な突起である必要は
ないものとする。そして、実施の形態には具体的に記載
していないが、例えば、半導体センサチップと回路基板
を突起を介して接続するとき、半導体センサチップ側に
金属突起があり、回路基板側にも別の金属突起があっ
て、この金属突起同士が接続されるようにして形成され
た構成も、本発明に当然含まれるものとする。For the same reason as described above, it is assumed that the appearance of the metal projections constituting the projections does not necessarily need to be clear projections. Although not specifically described in the embodiment, for example, when connecting the semiconductor sensor chip and the circuit board via the protrusion, there is a metal protrusion on the semiconductor sensor chip side, and another The present invention also includes a configuration in which there is a metal protrusion and the metal protrusion is formed so as to be connected to each other.
【００１６】また、金属突起を形成する材質として、
「金」が全ての実施の形態で用いられているが、基本的
に硬くてもろい金属でなければ金以外の導電材料を用い
ても構わない。また、半導体センサチップと回路基板の
間の隙間には、金属突起以外の部材があっても構わない
ものとする。Further, as a material for forming the metal projection,
Although “gold” is used in all embodiments, a conductive material other than gold may be used unless it is basically a hard and brittle metal. In addition, members other than metal protrusions may be provided in the gap between the semiconductor sensor chip and the circuit board.
【００１７】また好ましくは、前記金属柱を複数個隣接
して配置するとともに、それら複数の金属柱間に接合材
（実施の形態では、「はんだ」）が充填されるように構
成することである（請求項２）。このように構成する
と、例えば、ベアチップ実装装置によって半導体センサ
チップを回路基板に実装するときに、一つ一つの突起が
接続時の圧力で破損しにくくなる。なお、この構成の具
体的な一例を第２の実施の形態において示したが、金属
柱を構成する金属突起の本数及び金属柱の束ねられ方は
任意である。Preferably, a plurality of the metal columns are arranged adjacent to each other, and a bonding material (in the embodiment, “solder”) is filled between the plurality of metal columns. (Claim 2). With this configuration, for example, when the semiconductor sensor chip is mounted on the circuit board by the bare chip mounting device, each projection is less likely to be damaged by the pressure at the time of connection. Although a specific example of this configuration has been described in the second embodiment, the number of metal projections constituting the metal columns and the manner in which the metal columns are bundled are arbitrary.
【００１８】つまり、第２の実施の形態では、３つの金
属突起の中心を三角形の各頂点に配した後、接合材にて
これらの突起を束ねるようにして形成したが、例えば、
４つの突起の中心を正方形状になるように配した後、こ
れらの突起を束ねてもよく、種々変更実施が可能であ
る。That is, in the second embodiment, after the centers of the three metal projections are arranged at the respective vertices of the triangle, these projections are formed by bundling with a bonding material.
After arranging the centers of the four projections in a square shape, these projections may be bundled, and various modifications can be made.
【００１９】また、本発明に係る半導体センサの製造方
法では、半導体センサチップの電極と回路基板の配線の
接続方法であって、前記電極の上に複数の金属突起を順
次積層して金属柱を形成する形成工程と、前記金属柱を
前記配線に接続するようにして前記半導体センサチップ
を前記回路基板に実装する工程とを有する。そして、前
記形成工程は、少なくとも前記電極上に第１金属突起を
形成し、次いで前記第１金属突起部の上部を平坦化して
平坦部を形成し、前記平坦部上に第２金属突起を形成す
るような工程を含むようにした（請求項３）。The method of manufacturing a semiconductor sensor according to the present invention is a method of connecting an electrode of a semiconductor sensor chip and a wiring of a circuit board, wherein a plurality of metal projections are sequentially stacked on the electrode to form a metal column. And forming the semiconductor sensor chip on the circuit board such that the metal pillar is connected to the wiring. The forming step includes forming a first metal protrusion on at least the electrode, flattening an upper portion of the first metal protrusion to form a flat portion, and forming a second metal protrusion on the flat portion. (Claim 3).
【００２０】金属突起を形成後次の金属突起を形成する
に際し、前工程として、形成した金属突起（第１金属突
起）の上面を潰して平坦部とすることにより、その上に
積層する第２金属突起との接続強度が高まる。従って、
例え金属柱の高さが高くなっても一定の強度が得られ
る。When forming the next metal projection after forming the metal projection, as a pre-process, the upper surface of the formed metal projection (first metal projection) is crushed to be a flat portion, so that the second layer to be laminated thereon is formed. The connection strength with the metal projection is increased. Therefore,
Even if the height of the metal pillar is increased, a certain strength can be obtained.
【００２１】なお、請求項３に記載の第１金属突起部に
平坦部を形成するのは、あくまで、第１金属突起部上に
第２金属突起部を形成しやすくしたり、この２つの金属
突起部間の接続強度を上げるための製作工程であるの
で、必ずしも純粋な平面である必要はない。The flat portion is formed on the first metal projection according to the third aspect of the present invention, because the second metal projection is easily formed on the first metal projection or the two metal projections are formed on the first metal projection. Since it is a manufacturing process for increasing the connection strength between the projections, it is not necessarily required to be a pure plane.
【００２２】また、好ましくは、前記金属柱を隣接する
ように複数配置する。次いで、前記金属柱間に接合材を
充填するようにした（請求項４）。このようにすると、
複数の金属柱が接合材により一体化されるので、強度が
増す。Preferably, a plurality of the metal columns are arranged adjacent to each other. Next, a bonding material is filled between the metal columns (claim 4). This way,
Since the plurality of metal columns are integrated by the joining material, the strength is increased.
【００２３】なお、複数の金属柱は同時に形成していっ
てもよいし、１個ずつ形成してもよい。すなわち、前者
は実施の形態でも説明したように、複数の金属柱をそれ
ぞれ構成する金属突起を同時に形成し、次いで、それら
複数の金属突起の上端を平坦化し、次に平坦化された各
金属突起の上に次の金属突起を形成することである。ま
た、後者は例えばまず１本の金属柱を形成し、次にその
金属柱に隣接して別の金属柱を形成するという工程をと
ることである。The plurality of metal pillars may be formed simultaneously or one by one. That is, as described in the embodiment, the former simultaneously forms the metal projections respectively constituting the plurality of metal pillars, then flattens the upper ends of the plurality of metal projections, and then flattens the respective metal projections. To form the next metal projection on the substrate. In the latter case, for example, a step of forming one metal column and then forming another metal column adjacent to the metal column is performed.
【００２４】[0024]
【発明の実施の形態】図３は、本発明に係る半導体セン
サ１０の第１の実施の形態を示している。同図に示すよ
うに、半導体センサチップ１１と回路基板１２の間に、
複数の金属柱１３を介在させている。この金属柱１３の
上端は、半導体センサチップ１１の電極に接続され、金
属柱１３の下端は回路基板１２の表面に形成された配線
パターン上に接続されている。これにより、その金属柱
１３を介して半導体センサチップ１１の電極と回路基板
１２の配線パターンとが導通され、ベアチップ実装され
る。FIG. 3 shows a first embodiment of a semiconductor sensor 10 according to the present invention. As shown in the figure, between the semiconductor sensor chip 11 and the circuit board 12,
A plurality of metal columns 13 are interposed. The upper end of the metal column 13 is connected to an electrode of the semiconductor sensor chip 11, and the lower end of the metal column 13 is connected to a wiring pattern formed on the surface of the circuit board 12. As a result, the electrodes of the semiconductor sensor chip 11 and the wiring patterns of the circuit board 12 are conducted through the metal pillars 13 and mounted on a bare chip.
【００２５】ここで本発明では、金属柱１３を複数の金
属突起で形成している。つまり、この例では第１金属突
起１３ａと第２金属突起１３ｂの２つの金属突起を積み
重ねることにより形成される。Here, in the present invention, the metal column 13 is formed by a plurality of metal projections. That is, in this example, the first metal projection 13a and the second metal projection 13b are formed by stacking two metal projections.
【００２６】すなわち、図４に半導体センサチップ１１
を示すように、矩形状をした半導体センサチップ１１の
裏面１１ａには、回路基板の配線パターンに接続するた
めの高さ２００μｍ程度の金属柱１３が形成されてい
る。そして、この形成位置は、半導体センサチップ１１
の電極形成位置であり、まず裏面１１ａ側に第１金属突
起１３ａを形成し、その第１金属突起１３ａの上面に第
２金属突起１３ｂを積層形成している。That is, the semiconductor sensor chip 11 shown in FIG.
As shown in the figure, a metal pillar 13 having a height of about 200 μm for connecting to a wiring pattern of a circuit board is formed on the back surface 11a of the semiconductor sensor chip 11 having a rectangular shape. The formation position is determined by the semiconductor sensor chip 11.
The first metal protrusion 13a is formed on the back surface 11a side, and the second metal protrusion 13b is formed on the upper surface of the first metal protrusion 13a.
【００２７】さらに、センサチップ１１と基板１２には
金属柱１３の高さ分のギャップが生じることになるの
で、そこのギャップにアンダーフィル材としてシリコー
ン製の樹脂１４を充填している。Further, since a gap corresponding to the height of the metal pillar 13 is formed between the sensor chip 11 and the substrate 12, the gap is filled with a silicone resin 14 as an underfill material.
【００２８】係る構成をとると、金属柱１３の高さは、
金属突起の２倍の高さとなり、そのように高く（長く）
なることから、回路基板１２と半導体センサチップ１１
の熱膨張係数が大きく違っても、温度変化時に生じよう
とする応力は、当該金属柱１３の部分で吸収され、半導
体センサチップ１１に応力が伝わらない。よって、温度
変化によりオフセット値が変わることもなく、温度変化
に強く、小型で高性能なセンサを構成することができ
る。With this configuration, the height of the metal column 13 is
Twice as high as the metal projections, so high (long)
Therefore, the circuit board 12 and the semiconductor sensor chip 11
Even if the thermal expansion coefficients of the metal pillars 13 are significantly different, the stress that is likely to be generated when the temperature changes is absorbed by the metal pillar 13, and the stress is not transmitted to the semiconductor sensor chip 11. Therefore, the offset value does not change due to the temperature change, and a small-sized and high-performance sensor that is strong against the temperature change can be configured.
【００２９】次に、本発明に係る製造方法の第１の実施
の形態を説明する。まず、図４に示すように、半導体セ
ンサチップ１１の裏面に金属柱１３を製造し、次いで、
その金属柱１３を回路基板の金属パターン上に接続する
ようにする。Next, a first embodiment of the manufacturing method according to the present invention will be described. First, as shown in FIG. 4, a metal pillar 13 is manufactured on the back surface of the semiconductor sensor chip 11, and then,
The metal pillar 13 is connected to the metal pattern on the circuit board.
【００３０】そして、以後本発明の重要な工程となる金
属柱の製造工程の一例を説明する。まず、図５に示すよ
うに、太さ２５μｍ〜３０μｍ程の金ワイヤ２０の先端
を溶かしてその先端をボール状にしたボール部２２を、
ボンディング台２５の上に置いたセンサチップ１１の裏
面１１ａの電極面に超音波や熱を加えて融着によりボン
ディングする。An example of a manufacturing process of a metal pillar, which is an important process of the present invention, will now be described. First, as shown in FIG. 5, a ball portion 22 having a tip of a gold wire 20 having a thickness of about 25 μm to 30 μm melted to make the tip a ball shape,
Ultrasonic waves and heat are applied to the electrode surface of the back surface 11a of the sensor chip 11 placed on the bonding table 25 to perform bonding by fusion.
【００３１】なお、本形態のように太さを２５〜３０μ
ｍ程度のものを用いると、ボール部２２の径は１００μ
ｍ程度となる。なお、単純にさらに太い径の金ワイヤを
用いると、ボール部の径も大きくなり、高さが１００μ
ｍ以上にできるが、それに伴い幅も広くなるので、高密
度化・高配線化により、電極も１００μｍ程度の間隔で
配置されるセンサチップ上の複数の電極を短絡するの
で、本発明の金属柱には実用に供し得ない。The thickness is 25 to 30 μm as in the present embodiment.
m, the diameter of the ball portion 22 is 100 μm.
m. If a thicker gold wire is simply used, the diameter of the ball portion becomes larger and the height becomes 100 μm.
m or more, but the width is also widened, so that the high density and high wiring increase the short-circuiting of a plurality of electrodes on the sensor chip where the electrodes are arranged at intervals of about 100 μm. Cannot be put to practical use.
【００３２】その後、金ワイヤ２０を真上に引っ張り上
げると、図６に示すように、半導体センサチップ１１に
付いたボール部２２から金ワイヤ２０が引きちぎられ、
ボール部２２のみが半導体センサチップ１１上に残る。After that, when the gold wire 20 is pulled up right above, as shown in FIG. 6, the gold wire 20 is torn off from the ball portion 22 attached to the semiconductor sensor chip 11,
Only the ball portion 22 remains on the semiconductor sensor chip 11.
【００３３】その後は、図７に示すように、センサチッ
プ１１から引きちぎって分離した金ワイヤ２０の先端２
０ａに対してトーチ電極２７で電圧をかけることで、ボ
ール部を再び形成し、裏面１１ａの別の場所に付着させ
る。Thereafter, as shown in FIG. 7, the tip 2 of the gold wire 20 which has been torn off from the sensor chip 11 and separated therefrom.
By applying a voltage to 0a with the torch electrode 27, the ball portion is formed again and adhered to another place on the back surface 11a.
【００３４】ところで、もともとは金ワイヤ２０の先端
であったボール部２２を引きちぎって裏面１１ａに取り
つけると、ボール部２２は、図８に示すようにその先端
（上端）２２ａがささくれ立つとともに、高さがばらつ
いてしまう。When the ball portion 22, which was originally the tip of the gold wire 20, is torn off and attached to the back surface 11a, the ball portion 22 has its tip (upper end) 22a raised as shown in FIG. It will vary.
【００３５】そこで、半導体センサチップ１１の裏面１
１ａに、１段目の全てのボール部２２を付着させた後、
ボール部２２の上方から金属プレート等によって荷重を
かけて先端部２２ａを潰す。これにより、図９に示すよ
うに、上面が平らな平坦部３０となり、第１金属突起１
３ａが形成される。Therefore, the back surface 1 of the semiconductor sensor chip 11
After attaching all the ball portions 22 of the first stage to 1a,
The tip 22a is crushed by applying a load from above the ball portion 22 with a metal plate or the like. As a result, as shown in FIG.
3a is formed.
【００３６】上記の工程を行うことにより、半導体セン
サチップ１１の裏面１１ａ上には、図１０に示すよう
に、上端が平坦面となる第１金属突起１３ａが形成され
る。従って、各第１金属突起１３ａの平坦部３０上に、
金ワイヤ２０の先端を接触させて、新たなボール部２２
を融着させることが可能となる。その結果、図１１に示
すように、第１金属突起１３ａの平坦部３０の上に第２
金属突起１３ｂが安定状態で積み重ねられ、金属柱１３
が形成される。By performing the above steps, a first metal projection 13a having a flat upper end is formed on the back surface 11a of the semiconductor sensor chip 11, as shown in FIG. Therefore, on the flat portion 30 of each first metal protrusion 13a,
The tip of the gold wire 20 is brought into contact with a new ball portion 22.
Can be fused. As a result, as shown in FIG. 11, the second metal projection 13a
The metal projections 13b are stacked in a stable state,
Is formed.
【００３７】以後、通常のベアチップ実装と同様に、ベ
アチップ実装装置により、この金属柱１３が回路基板上
の配線パターンの上に位置するようにして基板１２上に
実装され、半導体センサチップ１１の電極と基板１２の
配線パターンは、金属柱１３を介して導通される。Thereafter, in the same manner as in the ordinary bare chip mounting, the metal pillar 13 is mounted on the substrate 12 by using the bare chip mounting apparatus so as to be positioned on the wiring pattern on the circuit board. The wiring pattern of the substrate 12 is conducted through the metal pillar 13.
【００３８】また、この実装に先立ち、前もって基板１
２側にシリコーン樹脂製の導電ペーストを転写しておい
たり、実装装置に内蔵されている転写装置によって金属
柱１３に導電ペーストを転写することが望ましい。そし
て、転写した樹脂が熱可塑性であれば、ホットプレート
又は硬化炉で加熱して硬化させることにより、導通を図
りつつ接着固定することができる。Prior to this mounting, the substrate 1
It is desirable to transfer a conductive paste made of silicone resin to the two sides, or to transfer the conductive paste to the metal pillar 13 by a transfer device built in the mounting device. If the transferred resin is thermoplastic, the resin can be heated and cured by a hot plate or a curing furnace, and can be bonded and fixed while achieving conduction.
【００３９】さらに、センサチップ１１と基板１２には
金属柱１３の高さ分だけギャップが形成されるので、そ
このギャップにアンダーフィル材としてシリコーン製の
樹脂３６を毛細血管現象を利用して充填するのが実施す
る上で望ましい。これにより、図３に示すような半導体
センサが製造される。Further, since a gap is formed between the sensor chip 11 and the substrate 12 by the height of the metal column 13, the gap is filled with a silicone resin 36 as an underfill material by utilizing the capillary phenomenon. It is desirable to implement. Thus, a semiconductor sensor as shown in FIG. 3 is manufactured.
【００４０】以下、本発明に係る半導体センサの第２実
施の形態を説明する。図１２は本実施の形態の要部を示
している。同図に示すように、本実施の形態では、半導
体センサチップ１１の裏面に、３本の金属柱１３を近接
配置している。具体的には、各金属柱１３の中心が３角
形の頂点に配置された形状をしている。これら３本の金
属柱１３は、いずれも第１の実施の形態のものと同一形
状及び同一材質からなる部材である。Hereinafter, a second embodiment of the semiconductor sensor according to the present invention will be described. FIG. 12 shows a main part of the present embodiment. As shown in the figure, in the present embodiment, three metal columns 13 are arranged close to the back surface of the semiconductor sensor chip 11. Specifically, each metal pillar 13 has a shape in which the center is located at the vertex of a triangle. Each of these three metal columns 13 is a member having the same shape and the same material as those of the first embodiment.
【００４１】そして、同図（ｂ）に示すように、その３
本の円柱状の金属柱１３間に形成される隙間３１には、
はんだ３３が充填されており、係る３本の金属柱１３を
電気機械的に一体化し、強度の向上を図っている。Then, as shown in FIG.
In the gap 31 formed between the cylindrical metal columns 13 of the book,
Solder 33 is filled, and the three metal pillars 13 are electromechanically integrated to improve the strength.
【００４２】そして、係る構造のものを製造するには、
例えば、上記隙間３１内にはんだペーストを充填後、リ
フロー炉によってはんだを溶融させると、３箇所に配置
された金属柱１３の隙間３１を埋めるようにはんだが流
し込まれ、その後冷却することにより固定することがで
きる。Then, in order to manufacture such a structure,
For example, after filling the gap 31 with the solder paste and melting the solder by a reflow furnace, the solder is poured so as to fill the gaps 31 of the metal pillars 13 arranged at three places, and then fixed by cooling. be able to.
【００４３】なお、上記した実施の形態では、いずれも
金属柱は２つの金属突起を積み重ねることにより形成し
たが、本発明はこれに限ることはなく、３つ以上であっ
てももちろんよい。そして、仮に１つの金属突起の高さ
が１００μｍ程度とすると、上記した実施の形態の金属
柱の高さは２００μｍ程度となり、また、３つ重ねると
３００μｍ程度となる。In each of the above embodiments, the metal pillar is formed by stacking two metal projections. However, the present invention is not limited to this, and may be three or more. If the height of one metal projection is about 100 μm, the height of the metal pillar in the above-described embodiment is about 200 μm, and if three are overlapped, it is about 300 μm.
【００４４】一方、基板上にセンサチップを実装したと
きに、基板とセンサチップの熱膨張係数の違いによって
発生する応力や撓みは、金属柱の高さを２００μｍ〜３
００μｍとることによって十分抑えられることが実験し
た結果確認された。よって、本形態のように２段重ねる
だけでも十分効果がある。On the other hand, when the sensor chip is mounted on the substrate, the stress or the bending generated due to the difference in the thermal expansion coefficient between the substrate and the sensor chip is caused by the height of the metal column of 200 μm to 3 μm.
As a result of experiments, it was confirmed that the thickness was set to be 00 μm. Therefore, it is sufficiently effective to form a two-stage stack as in this embodiment.
【００４５】[0045]
【発明の効果】以上のように、本発明に係る半導体セン
サ及びその製造方法では、請求項１のように半導体セン
サを構成すると、半導体センサチップと回路基板に隙間
を作るための接続線を兼ねた金属柱を、複数の金属突起
を積み上げることで、高くすることができ、その金属柱
の部分で温度変化時に生じようとする基板と半導体セン
サチップの熱膨張係数の相違に基づく応力等が、実用上
問題の無い程度に吸収できる。As described above, in the semiconductor sensor and the method of manufacturing the same according to the present invention, when the semiconductor sensor is configured as in claim 1, the connection line for forming a gap between the semiconductor sensor chip and the circuit board also functions. By stacking a plurality of metal projections, it is possible to increase the height of the metal pillar, and stress and the like based on the difference in the coefficient of thermal expansion between the substrate and the semiconductor sensor chip, which are likely to occur when the temperature changes in the metal pillar, It can be absorbed to the extent that there is no practical problem.
【００４６】従って、半導体センサチップの出力特性
が、温度変化に伴いオフセット値が変動することもな
く、安定した出力特性が得られる。よって、高性能で小
型の半導体センサを構成することができる。Therefore, the output characteristics of the semiconductor sensor chip can have stable output characteristics without the offset value fluctuating with the temperature change. Therefore, a high-performance and small semiconductor sensor can be configured.
【００４７】さらに、この金属柱の配置を請求項２のよ
うに構成することで、強度が増す。よって、半導体セン
サチップに金属柱を形成後、ベアチップ実装装置等によ
って、半導体センサチップと回路基板を接続する際に生
じる圧力によって金属柱が変形・破損等することが可及
的に抑制できる。すると、歩留まりが向上し、半導体セ
ンサの製造コストを下げることができる。Further, by arranging the metal columns as in claim 2, the strength is increased. Therefore, after the metal pillar is formed on the semiconductor sensor chip, deformation and breakage of the metal pillar due to pressure generated when the semiconductor sensor chip and the circuit board are connected by the bare chip mounting device or the like can be suppressed as much as possible. Then, the yield is improved, and the manufacturing cost of the semiconductor sensor can be reduced.
【００４８】また、請求項３のような製造方法を用いて
半導体センサを形成するようにすると、複数の金属突起
が積み重ねられた突起を持つ半導体センサの製造が容易
になる。さらに、請求項４のような製造方法を用いる
と、請求項３の製造方法に比べてさらに半導体センサの
製造時の破損率を低減することができる。Further, when the semiconductor sensor is formed by using the manufacturing method according to the third aspect, it becomes easy to manufacture a semiconductor sensor having a projection in which a plurality of metal projections are stacked. Further, by using the manufacturing method according to the fourth aspect, it is possible to further reduce the breakage rate during the manufacturing of the semiconductor sensor as compared with the manufacturing method according to the third aspect.
【図１】従来例を示す図（その１）である。FIG. 1 is a diagram (part 1) showing a conventional example.
【図２】従来例を示す図（その２）である。FIG. 2 is a diagram (part 2) showing a conventional example.
【図３】本発明に係る半導体センサの第１の実施の形態
を示す図である。FIG. 3 is a diagram showing a first embodiment of a semiconductor sensor according to the present invention.
【図４】第１の実施の形態に用いられる半導体センサチ
ップを示す斜視図である。FIG. 4 is a perspective view showing a semiconductor sensor chip used in the first embodiment.
【図５】本発明に係る半導体センサの製造方法の一実施
の形態を示す工程図（その１）である。FIG. 5 is a process chart (1) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図６】本発明に係る半導体センサの製造方法の一実施
の形態を示す工程図（その２）である。FIG. 6 is a process diagram (part 2) illustrating one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図７】本発明に係る半導体センサの製造方法の一実施
の形態を示す工程図（その３）である。FIG. 7 is a process diagram (part 3) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図８】本発明に係る半導体センサの製造方法の一実施
の形態を示す工程図（その４）である。FIG. 8 is a process view (part 4) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図９】本発明に係る半導体センサの製造方法の一実施
の形態を示す工程図（その５）である。FIG. 9 is a process view (5) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図１０】本発明に係る半導体センサの製造方法の一実
施の形態を示す工程図（その６）である。FIG. 10 is a process view (6) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図１１】本発明に係る半導体センサの製造方法の一実
施の形態を示す工程図（その７）である。FIG. 11 is a process view (7) showing one embodiment of a method for manufacturing a semiconductor sensor according to the present invention.
【図１２】（ａ）は、本発明に係る半導体センサの第２
の実施の形態の要部を示す斜視図である。（ｂ）は、本
発明に係る半導体センサの第２の実施の形態の要部を示
す平面図である。FIG. 12A shows a second example of the semiconductor sensor according to the present invention.
It is a perspective view which shows the principal part of embodiment. (B) is a plan view showing a main part of a second embodiment of the semiconductor sensor according to the present invention.
１０ 半導体センサ １１ 半導体センサチップ １２ 基板 １３ 金属柱 １３ａ 第１金属突起 １３ｂ 第２金属突起 ３０ 平坦部 ３３ はんだ（接合材） DESCRIPTION OF SYMBOLS 10 Semiconductor sensor 11 Semiconductor sensor chip 12 Substrate 13 Metal pillar 13a 1st metal projection 13b 2nd metal projection 30 Flat part 33 Solder (joining material)
Claims (4)
するとともに、前記半導体センサチップの電極と前記回
路基板の配線の間に金属柱を介在させてなる半導体セン
サであって、 前記金属柱は、複数の金属突起が積み重なって構成され
ていることを特徴とする半導体センサ。1. A semiconductor sensor comprising a semiconductor sensor chip mounted on a circuit board, and a metal pillar interposed between an electrode of the semiconductor sensor chip and a wiring of the circuit board, wherein the metal pillar comprises: A semiconductor sensor comprising a plurality of metal projections stacked on each other.
ともに、それら複数の金属柱間に接合材が充填されてい
ることを特徴とする請求項１に記載の半導体センサ。2. The semiconductor sensor according to claim 1, wherein a plurality of the metal columns are arranged adjacent to each other, and a bonding material is filled between the plurality of metal columns.
配線の接続方法であって、 前記電極の上に複数の金属突起を順次積層して金属柱を
形成する形成工程と、 前記金属柱を前記配線に接続するようにして前記半導体
センサチップを前記回路基板に実装する工程とを有し、 前記形成工程は、少なくとも前記電極上に第１金属突起
を形成し、 次いで前記第１金属突起部の上部を平坦化して平坦部を
形成し、 前記平坦部上に第２金属突起を形成するような工程を含
むものであることを特徴とする半導体センサの製造方
法。3. A method for connecting an electrode of a semiconductor sensor chip and a wiring of a circuit board, wherein a plurality of metal projections are sequentially stacked on the electrode to form a metal column; Mounting the semiconductor sensor chip on the circuit board so as to be connected to a wiring, wherein the forming step includes forming a first metal projection on at least the electrode, and then forming the first metal projection on the electrode. A method for manufacturing a semiconductor sensor, comprising: flattening an upper portion to form a flat portion; and forming a second metal projection on the flat portion.
し、 次いで、前記金属柱間に接合材を充填することを特徴と
する請求項３に記載の半導体センサの製造方法。4. The method according to claim 3, wherein a plurality of the metal columns are arranged adjacent to each other, and then a bonding material is filled between the metal columns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04274899A JP3570271B2 (en) | 1999-02-22 | 1999-02-22 | Semiconductor sensor and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04274899A JP3570271B2 (en) | 1999-02-22 | 1999-02-22 | Semiconductor sensor and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000243783A true JP2000243783A (en) | 2000-09-08 |
| JP3570271B2 JP3570271B2 (en) | 2004-09-29 |
Family
ID=12644645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP04274899A Expired - Fee Related JP3570271B2 (en) | 1999-02-22 | 1999-02-22 | Semiconductor sensor and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3570271B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007173637A (en) * | 2005-12-22 | 2007-07-05 | Matsushita Electric Works Ltd | Sensor module |
| JP2007184341A (en) * | 2006-01-05 | 2007-07-19 | Yamaha Corp | Semiconductor device and circuit board |
| KR100788076B1 (en) | 2003-05-16 | 2007-12-21 | 샤프 가부시키가이샤 | Semiconductor device and production method therefor |
| US7462942B2 (en) | 2003-10-09 | 2008-12-09 | Advanpack Solutions Pte Ltd | Die pillar structures and a method of their formation |
-
1999
- 1999-02-22 JP JP04274899A patent/JP3570271B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100788076B1 (en) | 2003-05-16 | 2007-12-21 | 샤프 가부시키가이샤 | Semiconductor device and production method therefor |
| US7462942B2 (en) | 2003-10-09 | 2008-12-09 | Advanpack Solutions Pte Ltd | Die pillar structures and a method of their formation |
| JP2007173637A (en) * | 2005-12-22 | 2007-07-05 | Matsushita Electric Works Ltd | Sensor module |
| JP2007184341A (en) * | 2006-01-05 | 2007-07-19 | Yamaha Corp | Semiconductor device and circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3570271B2 (en) | 2004-09-29 |
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