JP2000208608A - Semiconductor device and production thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the production method of a semiconductor device with which a phenomenon such as pressure resistance degradation, threshold voltage reduction and leakage at a concrete part caused by recessing an insulating film to be used for groove separation at a groove end can be suppressed. SOLUTION: After a pad oxide film 2, a silicon nitride film 3 and a resist film 4 are formed in order on a silicon substrate 1, the resist film 4 is patterned by photolithography, and a groove is formed by etching the silicon nitride film 3, the pad oxide film 2 and silicon substrate 1 with the resist film 4 as a mask. After this groove is formed, the silicon nitride film 3 of a stopper film is etched, and the opening part of the silicon nitride film 3 is widened rather than the groove. Afterwards, the resist film 4 is released and while using bias-plasma chemical vapor deposition(CVD), a silicon oxide film 5 is formed thereafter while being embedded in the groove.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a method of manufacturing a semiconductor device in which elements are separated on the surface of a semiconductor substrate by grooves formed on the surface of the semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, as a method for separating an element formed on a surface of a semiconductor substrate, a selective oxidation method (Local oxidation of the surface of the semiconductor substrate) has been used for a long time.
There has been used a method of separating elements by processing with the use of silicon (LOCOS).

However, due to the progress of miniaturization and high integration of semiconductor devices, the occurrence of bird's beaks deteriorates isolation characteristics, and it is difficult to flatten the surface. It's getting harder.

Therefore, in the production of fine semiconductor devices, instead of LOCOS, a trench (trench) is formed on the surface of a semiconductor substrate by etching, and the trench is filled with an insulator such as an oxide film to perform element isolation. Is being developed.

In filling a groove with a silicon oxide film, a biased plasma enhanced chemical vapor deposition (Chemica) method is used.
l vapor deposition (CVD) is used, and the buried material formed on the surface portion other than the groove is chemically mechanically polished (Chemical mechanical).
polishing (CMP).

FIGS. 3 and 4 are sectional views showing steps for explaining a conventional element isolation method by forming a groove. First, a pad oxide film 2, a silicon nitride film 3,
A resist film 4 is formed in order (see FIG. 3A).

Here, the silicon nitride film 3 is formed in a later step.
It becomes a stopper when polishing and removing portions other than the buried portion of the silicon oxide film in which the trench is buried by CMP. Since the silicon nitride film 3 is not easily removed by the CMP of the silicon oxide film, the silicon oxide film other than the buried portion can be completely removed without damaging the surface of the silicon substrate 1.

The pad oxide film 2 is inserted to relieve the stress of the silicon nitride film 3. When the silicon nitride film 3 is formed directly on the silicon substrate 1 without the pad oxide film 2, the silicon nitride film 3 is large near the surface of the silicon substrate 1 due to a difference in thermal expansion coefficient between the silicon nitride film 3 and the silicon substrate 1. Distortion occurs, and the characteristics of the semiconductor element formed on the surface of the silicon substrate 1 are deteriorated. However, the distortion applied to the silicon substrate 1 can be reduced by inserting the pad oxide film 2 between the silicon substrate 1 and the silicon nitride film 3.

After forming the structure shown in FIG. 3A, the resist film 4 is patterned by photolithography [see FIG. 3B], and the silicon nitride film 3 and the pad oxide film 2 are formed using the resist film 4 as a mask. Then, a groove is formed by etching the silicon substrate 1 [see FIG. 3 (c)].

After the resist film 4 is peeled [see FIG. 3D], a silicon oxide film 5 is formed in the trench by using, for example, bias-plasma CVD [FIG. 3E].
reference]. At this time, since the silicon oxide film 5 is formed on the entire surface, the silicon oxide film 5 other than the buried portion is removed by CMP (see FIG. 4A).

Further, the silicon nitride film 3 is etched by a phosphoric acid solution treatment or the like (see FIG. 4B), and the pad oxide film 2 is also removed by etching by a solution treatment or the like (see FIG. 4C).

Usually, in order to completely remove the object to be etched, etching (over-etching) longer than the etching time corresponding to the object to be removed is performed. When the pad oxide film 2 is etched, the thickness of the pad oxide film 2 is d1, and the thickness of the silicon oxide film removed by etching including over-etching is d1 + Δd1.
Then, the silicon oxide film near the upper end of the groove is shaved by Δd1 deeper than the surface of the silicon substrate 1. Therefore, as shown in FIG. 4C, the vicinity of the surface of the silicon substrate of the silicon oxide film 5 has a depressed shape, and the groove side surface of the silicon substrate 1 is exposed.

Further, when a semiconductor element is formed on the surface of the silicon substrate 1, sacrificial oxidation is performed near the surface of the silicon substrate 1 in order to remove a portion damaged by etching or the like [see FIG. 4 (d). And removing the sacrificial oxide film 6 by hydrofluoric acid solution treatment [see FIG. 4E]. In the removal of the sacrificial oxide film 6, as in the above-described step of removing the pad oxide film 2, over-etching must be performed.
The recessed portion becomes large, and the exposed portion on the side surface of the groove of the silicon substrate 1 is also enlarged.

[0014]

In the above-mentioned conventional method for manufacturing a semiconductor device, when a miniaturized semiconductor element is formed on the surface of the silicon substrate 1 and integrated, the groove side surface of the silicon substrate is exposed. The problems that arise are shown in FIGS.
This will be described with reference to FIG.

FIG. 5 is a schematic view of one semiconductor element region as viewed from above. The semiconductor element region surrounded by the isolation region 10 has a gate 7 sandwiched between a source 8 and a drain 9.

6 to 8 are structural views of a cross section taken along line AA in FIG. 5 and a cross section taken along line BB in FIG. 5, respectively. A general MOS type semiconductor transistor is
After the steps shown in FIGS. 3 and 4, the silicon substrate 1 is formed on the exposed surface of the silicon substrate 1 through the steps shown in FIGS. 6 to 8.

After the steps of FIGS. 3 and 4 [FIG.
6], a gate insulating film 11 is formed by thermally oxidizing the exposed surface of the silicon substrate 1 [see FIG. 6 (b)], and, for example, polysilicon is formed as a material for the gate electrode 12 thereon. [See FIG. 6 (c)]. Since the cross section in the direction of the arrow along the line AA in FIG. 5 is not cut in the subsequent steps, the one shown in FIG. 6 (c) has the final shape.

As shown in FIG. 6B, if the end of the element region of the silicon oxide film 5 has a hollow shape, the exposed portion on the groove side of the silicon substrate 1 is also oxidized. Since the oxidation speed is low at the corner contacting with the gate oxide film, the thickness of the oxide film becomes small, so that the breakdown voltage of the gate insulating film becomes small.

Further, as shown in FIG. 6 (c), since the gate electrode 12 is formed so as to extend to the side surface on the groove side, an electric field is also applied from the lateral direction of the device. Therefore, not only is the electric field concentrated at the corners, but also a parasitic channel of the threshold voltage is formed on the groove surface side. As the gate width becomes smaller due to miniaturization, the influence of the parasitic component increases, and the characteristics of the transistor deteriorate.

On the other hand, the cross section in the direction of the arrow along the line BB in FIG. 5 is processed by the steps shown in FIGS. After the process of FIG. 6 (see FIG. 7A), the gate electrode 12
Is patterned (see FIG. 7B), and impurity ions are implanted into the source and drain extension portions to form an impurity layer 13 (see FIG. 7C).

Thereafter, a sidewall 14 is formed by forming an insulating film and etching back (see FIG. 7D).
Impurity is implanted into the source and drain portions to bring the impurity introduction layer 13 into a state where good contact can be obtained [FIG.
(E)].

In order to wire the transistor thus formed, an interlayer insulating film 15 is formed [FIG.
(F)], a contact hole is formed by dry etching [see FIG. 7 (g)], and a wiring material 16 is buried and joined to the source and drain impurity layers 13.

The thickness of the source and drain impurity layers 13 is about 100 nm or less for transistors currently mass-produced or researched and prototyped, and a shallower junction is desired due to miniaturization of devices. At the same time, in order to miniaturize the device, it is necessary to reduce the area of the contact portion of the source or the drain as much as possible. At present, the alignment margin between the contact hole and the active layer of the source and the drain is already almost 0 nm.

Displacing the contact hole to the gate side is not desirable because the parasitic capacitance between the gate and the source and drain increases. Further, at this time, the possible shift width is up to the thickness of the sidewall 14, and if the shift is more than that, the gate electrode 12 and the contact 16 are short-circuited.

On the other hand, even if the contact hole slightly shifts toward the isolation region, no problem occurs in the case of LOCOS. However, when the contact position is shifted in the conventional separation method by forming a groove, as shown in FIG. 8C, if the buried oxide film 5 is larger than the source and drain impurity layers, the contact-channel Are directly connected, so that the transistor cannot operate. For this reason, the thicknesses of the source and drain impurity layers are limited, and miniaturization becomes difficult.

Accordingly, an object of the present invention is to solve the above-mentioned problems and to reduce the withstand voltage and the threshold voltage due to the insulating film used for the groove separation being formed at the end of the groove, and to reduce the contact voltage at the contact portion. An object of the present invention is to provide a semiconductor device capable of suppressing the phenomenon of leakage and a method for manufacturing the same.

[0027]

According to the present invention, there is provided a semiconductor device, wherein a groove formed on a surface of a semiconductor substrate is filled with an insulator, an upper portion of the insulator protrudes from the surface of the semiconductor substrate, and the insulator is An element isolation structure is provided in which a projected surface of the projected portion on the surface of the semiconductor substrate includes the groove opening and is larger than the groove opening.

The method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming a cover film on a surface of a semiconductor substrate so that the semiconductor substrate is not polished by polishing; and forming a mask film on the cover film. Forming a groove in the cover film and the semiconductor substrate using the mask film as a mask; and etching the cover film to make the opening of the cover film wider than the groove formed in the semiconductor substrate. Have.

That is, according to the method of manufacturing a semiconductor device of the present invention, after a groove is formed and before the groove is buried, the cover film is etched to widen the groove opening, thereby forming the buried film in a shape protruding above the semiconductor substrate. I do.

By making the width of widening the groove opening, that is, the width of the buried film overhanging the upper part of the semiconductor substrate larger than the thickness of the buried film cut in a later step, the shape of the buried film at the end of the groove is reduced. Deter from becoming

By making the buried film overhang the semiconductor substrate substrate, even if the buried film is shaved by a solution treatment or the like, the groove end of the semiconductor substrate is covered with the buried film. No problem occurs.

[0032]

Next, an embodiment of the present invention will be described with reference to the drawings. 1 and 2 are cross-sectional views showing the steps of manufacturing a semiconductor device according to one embodiment of the present invention.
The manufacturing process of the semiconductor device according to one embodiment of the present invention will be described with reference to FIGS.

In the process of manufacturing a semiconductor device according to one embodiment of the present invention, a pad oxide film 2 and a pad oxide film 2 are formed on a silicon substrate 1 in the same manner as in the steps of FIGS. 3A to 3C used in the conventional example. After the silicon nitride film 3 and the resist film 4 are formed in this order (see FIG. 1A), the resist film 4 is patterned by photolithography [see FIG. 1B], and the silicon nitride film 3 is formed using the resist film 4 as a mask. Then, a groove is formed by etching the pad oxide film 2 and the silicon substrate 1 (see FIG. 1C).

After forming the above-described groove, the silicon nitride film 3 serving as a stopper film is etched using, for example, a phosphoric acid solution to make the opening of the silicon nitride film 3 wider than the groove [FIG. reference].

After that, similarly to the steps from FIG. 3D to FIG. 4E used in the conventional example, after the resist film 4 is peeled [see FIG. 1E], for example, bias-plasma CVD
The silicon oxide film 5 is formed so as to be buried in the trench using [FIG. 1 (f)], and the silicon oxide film 5 other than the buried portion is removed by CMP [see FIG. 2 (a)]. Is removed by etching with a phosphoric acid solution treatment or the like (see FIG. 2B), and the pad oxide film 2 is also removed by etching with a solution treatment or the like [see FIG. 2C].

Further, when the sacrificial oxidation is used, similar to the steps of FIGS. 4D to 4E used in the conventional example,
The vicinity of the surface of the silicon substrate 1 is sacrificed and oxidized (see FIG. 2D), and the sacrifice oxide film 6 is removed by hydrofluoric acid solution treatment (see FIG. 2E).

In the steps of removing the pad oxide film 2 and the sacrificial oxide film 6, the buried silicon oxide film 5 is also removed. By increasing the amount by which the stopper film is shaved between c) and FIG. 1D, that is, by increasing the length of the opening portion that is wider than the groove, the buried silicon oxide film 5 is more silicon than the outer peripheral portion of the groove. The shape protruding toward the front surface of the substrate 1 is maintained. Stopper film 50nm
Etching, removal of pad oxide film 2 and sacrificial oxide film 6
Is removed, and finally, the upper portion of the buried silicon oxide film 5 is placed 10 nm closer to the surface of the silicon substrate 1 than the outer peripheral portion of the groove.
As a result, it has been confirmed that it is possible to suppress phenomena such as degradation in withstand voltage, decrease in threshold voltage, and leakage at the contact portion due to the scooped shape of the groove end as in the related art.

As described above, after the trench is formed and before the trench is filled with the buried silicon oxide film 5, the film above the trench is etched to widen the opening, so that the buried silicon oxide film 5 is removed from the trench. The buried silicon oxide film 5 is formed so as to protrude above the substrate, so that the buried silicon oxide film 5 at the end of the groove can be prevented from being scrambled, and the characteristic deterioration of the semiconductor element can be suppressed.

In this embodiment, the process including the sacrificial oxidation is used. However, even when the sacrificial oxidation is not required, the pad oxide film 2 is formed.
It is clear that scouring can be suppressed in steps such as removal of ash.

In this embodiment, the silicon nitride film 3 is used as the stopper film.
If the material is sufficiently low in polishing rate as compared with the buried silicon oxide film 5 and sufficiently high in etching rate to expand the opening of the stopper film in comparison with the semiconductor substrate, the silicon nitride film Materials other than 3 can be applied.

Further, in this embodiment, the resist film 4 is removed after the opening of the silicon nitride film 3 serving as a stopper film is widened. However, after the removal of the resist film 4, etching for widening the opening of the stopper film is performed. The same effect can be obtained. In this case, since the stopper film is also etched in a direction perpendicular to the surface of the semiconductor substrate, the thickness at the time of forming the stopper film is the sum of the thickness of the stopper film required for subsequent polishing and the thickness to be etched. It needs to be larger than the one.

Similarly, the present invention can be applied to a case where a resist film 4 is not directly used as a mask film, but another type of mask film is patterned by the resist film 4 and a groove is formed by using this as a mask film.

Further, in this embodiment, the case where the inside of the groove is filled with a single insulator buried film has been described. However, the buried film is, for example, a two-layer structure of an insulating film and a semiconductor, or an insulator and a metal, or Further, even in the case of a multilayer film formed of many types of films, the opening of the stopper film is widened by etching so that the shape in which the buried film protrudes above the semiconductor substrate is maintained, so that a groove end portion is formed. The scouring of the buried film can be suppressed.

[0044]

As described above, according to the present invention, the groove formed on the surface of the semiconductor substrate is filled with the insulator, the upper part of the insulator protrudes from the surface of the semiconductor substrate, and Has a device isolation structure that is larger than the groove opening while projecting the projected portion of the semiconductor substrate surface onto the surface of the semiconductor substrate, so that the insulating film used for groove separation has a hollow shape at the groove end. This has the effect of suppressing the deterioration of the breakdown voltage, the decrease of the threshold voltage, and the leakage at the contact portion due to the above.

[Brief description of the drawings]

FIGS. 1A to 1F are cross-sectional views illustrating a manufacturing process of a semiconductor device according to an embodiment of the present invention.

FIGS. 2A to 2E are cross-sectional views illustrating a process of manufacturing a semiconductor device according to an embodiment of the present invention.

FIGS. 3A to 3E are cross-sectional views illustrating a process for manufacturing a conventional semiconductor device.

FIGS. 4A to 4E are cross-sectional views illustrating a manufacturing process of a conventional semiconductor device.

FIG. 5 is a schematic view of a semiconductor device viewed from above for describing a problem in a conventional method of manufacturing a semiconductor device.

FIGS. 6A to 6C are cross-sectional views illustrating a configuration example of a semiconductor device manufactured by a manufacturing process of the semiconductor device illustrated in FIG. 2;

7A to 7D are cross-sectional views illustrating a configuration example of a semiconductor device manufactured by the method for manufacturing a semiconductor device illustrated in FIG. 2;

8A to 8D are cross-sectional views illustrating a configuration example of a semiconductor device manufactured by the method for manufacturing a semiconductor device illustrated in FIG.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate 2 pad oxide 3 silicon nitride film 4 resist film 5 buried silicon oxide film 6 sacrificial oxide film

Claims (8)

[Claims] 1. A groove formed on a surface of a semiconductor substrate is filled with an insulator, an upper portion of the insulator protrudes from the surface of the semiconductor substrate, and a projecting portion of the insulator is projected on the surface of the semiconductor substrate. A semiconductor device having a device isolation structure whose surface is larger than the groove opening while including the groove opening. 2. The semiconductor device according to claim 1, wherein said insulator is a silicon oxide film. Forming a cover film on the surface of the semiconductor substrate so that the semiconductor substrate is not shaved by polishing;
A step of forming a mask film on the cover film, a step of forming a groove in the cover film and the semiconductor substrate using the mask film as a mask, and a step of etching the cover film to form a groove in the semiconductor substrate. Widening the opening of the cover film. 4. A step of embedding a groove formed in the semiconductor substrate and an opening of the cover film with a material having physical properties different from those of the semiconductor substrate and the cover film, and polishing the embedding material on the cover film by polishing. 4. The method according to claim 3, further comprising the step of removing. 5. The method according to claim 3, wherein the semiconductor substrate is a silicon substrate. 6. The method according to claim 3, wherein the cover film is a silicon nitride film. 7. The method for manufacturing a semiconductor device according to claim 4, wherein said burying material is an insulating film. 8. The method according to claim 7, wherein said insulating film is a silicon oxide film.