JP2000188829A - Device and method for power source sequence detection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a power source sequence detecting device which can reduce the time until a cause is examined, when operation failure is generated which is caused by abnormality of power source sequence which cannot be detected by a power source supplying part. SOLUTION: A power source control part 2 controls the startup drive for power source outputs of, e.g. three power source units 3, 4, 5. In the timing of the startup drive, output power source voltages of the power source units 3, 4, 5 are compared with pore-determine specified values. The compared logic signals are outputted from comparators 8, 9, 10, 11 and a NOR circuit 12. With the output of the logic signal, normal/abnormal recognition of power source output of the three power source units is enabled. When abnormality exists in power source sequence, a doubtful power source unit can be specified, and the cause for operation failure which was generated by the abnormality in power source sequence can be examined quickly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a power supply sequence detection device and a power supply sequence detection method, and more particularly to a power supply sequence detection device and a power supply sequence detection method for detecting an abnormality in a power supply sequence in a power-supplied portion.

[0002]

2. Description of the Related Art Conventionally, a power supply sequence detection device and a power supply sequence detection method are generally applied to a power supply control system. This type of power supply control system minimizes the state in which the power supply sequence reverses when the power supply unit of the power supply unit has a low voltage or over voltage power failure, and degrades or destroys the load logic elements. It is used for the purpose of prevention.

For example, Japanese Patent Application Laid-Open No. 5-204496 discloses a power supply unit that has generated a power supply abnormality in response to detection of a power supply abnormality signal from a power supply unit, regardless of a predetermined disconnection sequence. A power supply unit that outputs a potential equal to the power supply unit that has generated the power supply unit, and a power supply unit that outputs a higher voltage than the power supply unit that has generated the power supply abnormality. A power supply disconnection signal is transmitted to a power supply unit that outputs a lower potential than the power supply unit in which the power supply abnormality has occurred, according to a predetermined disconnection sequence.

[0004]

However, in the above-mentioned prior art, no means for detecting an abnormality in the power supply sequence is provided on the power-supplied portion side. For this reason, there is a problem that an abnormality in the power supply sequence generated between the power supply unit and the power supply unit cannot be detected.

The present invention provides a power supply sequence detection apparatus and a power supply sequence detection method that can reduce the time required to investigate the cause when an operation failure occurs due to an abnormality in the power supply sequence that cannot be completely detected by the power supply unit. The purpose is to provide.

[0006]

In order to achieve the above object, a power supply sequence detecting device according to the first aspect of the present invention is a power supply sequence detecting device for detecting a power supply output operation of a power supply unit. A unit and a power supply control unit for controlling the start-up drive of the power supply output of the N power supply units, and comparing the output power supply voltage of each of the N power supply units with a predetermined value at the start-up drive timing; And a comparator for outputting a logic signal, wherein the output of the logic signal makes it possible to determine whether the power output of the N power units is normal or abnormal.

[0007] The above-mentioned power supply control section may control the power supply output of the N power supply units to start up in series driving at predetermined time intervals.

Further, the power supply sequence detecting device has a logic circuit, and the logic circuit converts N logic signals of the N power supply units into output signals from one logic circuit, and outputs one output signal. It is preferable to determine whether the power output of the N power units is normal or abnormal based on the logic and the timing.

The above-described power supply sequence detecting apparatus further has N registers, and holds N logic signals of the N power supply units by the registers. It is preferable to determine whether the power output is normal or abnormal.

A power supply sequence detecting method according to a fifth aspect of the present invention is a power supply sequence detecting method for detecting a power supply output operation of a power supply unit, and a power supply control for controlling start-up driving of power supply outputs of N power supply units. A step, an output power supply voltage comparing step of comparing output power supply voltages of the N power supply units with a predetermined value at a start-up drive timing, and a logic signal output step of outputting a logic signal based on the comparison. And the logic signal enables normal / abnormal discrimination of the power output of the N power units.

It is preferable that the power supply output of the N power supply units is controlled to start up in series with a predetermined time interval.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a power supply sequence detecting device and a power supply sequence detecting method according to the present invention; 1 to 4, there is shown an embodiment of a power supply sequence detection device and a power supply sequence detection method according to the present invention.

In order to clarify the above and other objects, features and advantages of the present invention, embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

Referring to FIG. 1, a power supply unit 1 includes a power supply control unit 2, a first power supply unit 3 having different control units for receiving a turn-on signal from the power supply control unit 2 and outputting a prescribed potential, and a second power supply unit. A unit 4 and a third power supply unit 5 are provided.

Each of the power supply units 3, 4, and 5 supplies each output power to the logic operation unit 6. The power supply control unit 2 receives the output of each of the power supply units 3, 4, and 5, verifies whether the power-on sequence is as expected, and if an abnormality is detected, supplies power to each of the power supply units 3, 4, and 5. Send a disconnect instruction signal.

The logic operation section 6 has a sequence detection circuit 7. This sequence detection circuit 7 has four comparators 8, 9, 10, 11 and a NOR gate 12.

The first comparator 8 includes a first power supply unit 3
If the potential supplied from the second power supply unit 4 and the third power supply unit 5 is equal to or lower than the predetermined value when the potential supplied from the power supply reaches the specified value, the logic signal “1” is output.

The second comparator 9 includes a second power supply unit 4
When the potential supplied from the first power supply unit 3 reaches the predetermined value at the time when the potential supplied from the third power supply unit reaches the predetermined value, and the potential supplied from the third power supply unit 5 is equal to or lower than the predetermined value. Outputs a logic signal "1".

When the potential supplied from the third power supply unit 5 reaches a predetermined value, the third comparator 10 changes the potential supplied from the first power supply unit 3 and the potential supplied from the second power supply unit 4. When the default value is reached, the logic signal "1"
Is output.

When the potentials supplied from the first power supply unit 3, the second power supply unit 4, and the third power supply unit 5 are all equal to or lower than a predetermined value, the fourth comparator 11 outputs a logic signal "1". Is output.

The NOR gate 12 receives the logic signals output from the comparators 8 to 11, and outputs a logic H signal when any of the logic signals is "1".

Hereinafter, an operation example of the present embodiment will be described. Here, it is assumed that the power is turned on in the order of the first power supply unit 3, the second power supply unit 4, and the third power supply unit 5. Further, it is assumed that the operation time (delay time) of each of the comparators 8 to 11 satisfies the power-on interval or less.

The power control unit 2 sends a power-on instruction signal to each of the power units 3, 4, and 5 so that the above-described power-on sequence is achieved. First, a power-on instruction signal is sent to the first power supply unit 3, and the first power supply unit 3 outputs a specified potential. Immediately after the logic operation section 6, the potential from each of the power supply units 3 to 5 has not reached the predetermined value. Therefore, the output of the fourth comparator 11 becomes “1”. After a while, when the potential of the first power supply unit 3 reaches a predetermined value, the first comparator 8 operates and the second power supply unit 4
Since both the potential from the third power supply unit 5 and the potential from the third power supply unit 5 are equal to or lower than the predetermined value, the signal "1" is output.

At the same time, the fourth comparator 11 outputs "0" when the potential from the first power supply unit 3 reaches a specified value. Next, a power-on instruction signal is sent to the second power supply unit 4, and the second power supply unit 4 outputs a specified potential. After a while, when the potential from the second power supply unit 4 reaches the predetermined value, the second comparator 9 operates, and the potential of the first power supply unit 3 has reached the predetermined value. Since the potential of No. 5 is lower than the predetermined value, "1" is output. At the same time, the first comparator 8 outputs “0” because the potential from the second power supply unit 4 has reached a predetermined value.

Finally, a power-on instruction signal is sent to the third power supply unit 5, and the third power supply unit 5 outputs a specified potential. After a while, when the potential from the third power supply unit 5 reaches the predetermined value, the third comparator 10 operates, and the potential of the first power supply unit 3 and the potential of the second power supply unit 4 become the default values. Since it has reached “1”, “1” is output. At the same time, the second comparator 9 outputs “0” because the potential from the third power supply unit 5 has reached a predetermined value.

According to the above sequence, each of the comparators 8 to
Any one of 11 outputs "1". For this reason,
By the NOR gate 12 continuously outputting “0”,
It turns out that the sequence is normal. On the other hand, if the above sequence cannot be observed, all of the comparators 8 to 11 output "0", and the NOR gate 12 outputs "1", indicating that the sequence is abnormal.

Next, a case where the sequence is normal and a case where the sequence is abnormal will be described with reference to FIGS. FIG.
Indicates that the sequence is normal. FIG.
Indicates that the sequence is abnormal. In FIG.
Any one of the comparators 8 to 11 outputs "1",
The NOR gate 12 always outputs "0". In FIG.
The case where the potential from the second power supply unit 4 reaches the predetermined value is delayed, and the potential from the second power supply unit 4 finally reaches the predetermined value. Therefore, the second comparator 9 sets “0”. Is still output. In this state, the NOR gate 12
Output "1", it is possible to detect a sequence abnormality.

In another embodiment of the present invention, the basic configuration is as described above, but in particular, it is devised to identify the cause of the sequence abnormality. The configuration is shown in FIG.

FIG. 4 is different from the first embodiment in that
In place of the absence of the NOR gate 12, registers 13 to 16 for holding the outputs of the comparators 8 to 11 are provided. An operation example in the configuration of FIG. 4 will be described with reference to FIGS.

When the first power supply unit 3, the second power supply unit 4, and the third power supply unit 5 sequentially output the specified voltage, each of the comparators 8 to 11 has "1" as shown in FIG. Is output. Each of the registers 13 to 16 holds "1" when each of the comparators 8 to 11 outputs "1". That is, when the potentials from all the power supplies reach the specified voltage in the correct sequence, all the registers 13 to
16 holds “1”.

On the other hand, when the sequence shown in FIG. 3 is abnormal, the second comparator 9 keeps outputting "0". For this reason, the second register 14 keeps holding "0". After the potential from all power supplies reaches the specified voltage,
It is possible to detect that there is an abnormality in the power supply sequence corresponding to the register holding “0”.

The second embodiment of the present invention has an effect that, in addition to the effects of the first embodiment, which power supply sequence has become abnormal can be separated, which leads to a reduction in the time required for replacing a suspected fault component. .

The above embodiment is an example of a preferred embodiment of the present invention. However, it is not limited to this.
Various modifications can be made without departing from the spirit of the present invention. For example, in the above embodiment, the case where three power supply units are used has been described, but the number of power supply units is not limited. Although the output voltage of each power supply unit is not specified, this requirement is not particularly limited.

[0034]

As is apparent from the above description, the power supply sequence detecting apparatus and the power supply sequence detecting method of the present invention provide a sequence in which the potential supplied from a power supply unit having different power supply control on the power receiving side is defined by a predetermined value. To detect that it is being supplied. More specifically, when each potential reaches a predetermined value, it is compared with another potential to detect whether or not the sequence is a predetermined sequence. Therefore, the power receiving side detects an abnormality in the power supply sequence. For this reason, when an abnormality is not detected in the power supply control unit and an operation failure due to an abnormality that occurs between the power supply unit and the power supply unit occurs,
The cause can be quickly and easily identified.

Therefore, when there is an abnormality in the power supply sequence, a suspicious power supply unit can be specified, and the cause of an operation failure caused by the abnormality in the power supply sequence can be investigated at an early stage.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a first embodiment of a power supply sequence detection device and a power supply sequence detection method of the present invention.

FIG. 2 is a timing chart when a sequence is normal.

FIG. 3 is a timing chart when a sequence is abnormal.

FIG. 4 is a block diagram showing a configuration example of another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power supply part 2 Power supply control part 3 1st power supply unit 4 2nd power supply unit 5 3rd power supply unit 6 Logical operation part 7 Sequence detection circuit 8 1st comparator 9 2nd comparator 10 3rd comparison Unit 11 Fourth comparator 12 NOR gate 13 First register 14 Second register 15 Third register 16 Fourth register

Claims (6)

[Claims] 1. A power supply sequence detection device for detecting a power supply output operation of a power supply unit, comprising: N power supply units; a power supply control unit configured to control start-up driving of power supply outputs of the N power supply units; A comparator for comparing the output power supply voltage of each of the N power supply units with a predetermined value at the timing of the start-up drive, and outputting a logic signal; A power supply sequence detecting device, wherein normal / abnormal discrimination of the power output of the power supply unit is enabled. 2. The power supply sequence detection according to claim 1, wherein the power supply control of the N power supply units by the power supply control unit is controlled to be a series drive with a predetermined time interval. apparatus. 3. The power supply sequence detection device further includes a logic circuit, and the logic circuit converts N logic signals of the N power supply units into output signals from one logic circuit. 3. The power supply sequence detection device according to claim 1, wherein the power supply output of the N power supply units is identified as normal / abnormal based on the logic of an output signal and the timing. 4. The power-supply-sequence detecting device further has N registers, holds N logic signals of the N power units by the registers, and uses the held signals to output the N logic signals. 2. A power supply unit according to claim 1, wherein the power supply unit determines whether the power supply output is normal or abnormal.
Or the power supply sequence detection device according to 2. 5. A power supply sequence detecting method for detecting a power supply output operation of a power supply unit, comprising: a power supply control step of controlling start-up driving of power supply outputs of N power supply units; An output power supply voltage comparing step of comparing each output power supply voltage of the plurality of power supply units with a predetermined specified value, and a logic signal output step of outputting a logic signal based on the comparison. A power supply sequence detection method characterized in that normal / abnormality of power supply output of N power supply units can be identified. 6. The power supply sequence detecting method according to claim 5, wherein the control for raising the power supply output of the N power supply units is a series drive with a predetermined time interval.