JP2000156491A - Infrared solid state image sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the quantity of charges being handled by an element while sustaining the bias voltage at an infrared detecting section at a low level by arranging a charge storing section having high capacitance above the infrared detecting section thereby increasing aperture rate of the element. SOLUTION: Signal charges converted at an infrared detecting section 3 is transferred to a charge storing section 23 under control of a bias control section 20. The signal charges stored at the charge storing section 23 is transferred at a specified timing to a read-out circuit section 10 under control of a transfer gate 12. Since the charge storing section 23 is disposed above the infrared detecting section 3, the ratio of the area of the infrared detecting section 3 to the pixel area is not lowered in an infrared solid state image sensor 40. Consequently, infrared ray detecting effect of the element is prevented from lowering by forming the charge storing section 23. Furthermore, the fabrication process does not require an intricate step because the charge storing section 23 has a structure of parallel plate capacitor and the capacitance can be regulated easily.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a monolithic infrared solid-state imaging device having an infrared detector composed of a Schottky junction or a hetero junction.

[0002]

2. Description of the Related Art Along with recent advances in silicon (Si) LSI technology, a large number of photodetectors arranged in an array for converting light into a charge signal, a readout circuit for reading the converted charge signal, and a charge signal Many solid-state imaging devices have been developed in which an output amplifier for outputting a signal is formed on the same substrate. Among these, an infrared solid-state imaging device using an infrared detector as a light detector has been put into practical use as an infrared camera in combination with an infrared lens, a drive circuit, a signal processing circuit, an element cooler, etc. It is used in various fields such as measurement and remote sensing. In infrared solid-state imaging, the 3-5 μm band where infrared absorption
Two wavelength bands of the 0 μm band are often used, and element development is also being promoted centering on these two wavelength bands.

As infrared detectors having sensitivity in these wavelength bands, there are a junction between Si and a metal (Schottky junction),
Alternatively, there are a Si-based detector using a junction (heterojunction) of Si and another semiconductor, and a compound semiconductor-based detector using interband transition. Among them, an infrared solid-state imaging device using a Si-based infrared detector has excellent sensitivity uniformity and is suitable for high integration because an infrared detector and a readout circuit can be monolithically formed on the same substrate. There are advantages. As a Si-based infrared detector, a PtSi (platinum silicide) / Si Schottky type detector having a sensitivity in the 3 to 5 μm band and a GeSi having a sensitivity in the 10 μm band are used.
A (germanium silicon) / Si heterojunction detector or the like is used. In addition, as a circuit for reading signal charges,
An XY address system using a CCD (charge coupled device), a plurality of selecting MOS transistors, and the like can be given.

Next, a conventional infrared solid-state imaging device will be described. FIG. 10 shows PtSi / S as an infrared detector.
FIG. 9 is a pixel cross-sectional view of a unit pixel of a conventional infrared solid-state imaging device 70 using an i-Schottky junction detector 53 and a vertical CCD 60 as a readout circuit. Each pixel constituting the infrared solid-state imaging device 70 is separated from an adjacent pixel (not shown) by the field oxide film 55. The Schottky junction detector 53 includes a P-type Si semiconductor substrate 51,
And PtS forming a Schottky junction with the semiconductor substrate 51
It is composed of a Schottky electrode 52 made of i. Further, an infrared reflection film 65 made of, for example, an Al metal film is disposed immediately above the detector 53.
Is provided around the periphery of the semiconductor device to reduce leakage current.
A guard ring 54 made of a mold impurity region is formed.

The vertical CCD 60 comprises a CCD channel 56 made of an N-type impurity region, a gate oxide film 57, a CCD electrode 58 made of polysilicon, and a CCD electrode wiring 59 made of a metal film such as A1. Is done.
A transfer gate 62 disposed between the infrared detector 53 and the CCD 60 is connected to the infrared detector 53 by a CCD.
Reference numeral 60 denotes a MOS transistor that controls the transfer of signal charges, and includes a polysilicon gate electrode 61 formed on a semiconductor substrate 51 via a gate oxide film 57. Further, the above-described electrodes, metal films, and the like are insulated and separated by interlayer insulating films 63 and 64 of oxide films, and a protective film 66 made of a nitride film or the like is formed on the surface of the element 70.
An anti-reflection film 17 is formed on the back surface of 1.

Next, the operation of the conventional infrared solid-state imaging device 70 shown in FIG. 10 will be described. First, when a positive potential is applied to the transfer gate electrode 61 to turn on the transfer gate 62, the Schottky electrode 52 is reset and biased in the opposite direction (positive potential in this case) with respect to the semiconductor substrate 51. Next, when the transfer gate 62 is turned off, the Schottky electrode 52 becomes electrically floating, and accumulation of signal charges is started. Infrared light radiated from a subject enters from the back side of the element 70 (semiconductor substrate 51 side) and reaches the Schottky electrode 52, where electron-hole pairs are generated in the Schottky electrode 52 according to the amount of incident light. . The generated holes move in the Schottky electrode 52 in response to the energy of the incident infrared rays, and reach the bonding interface with the semiconductor substrate 51. When the holes reach the junction interface with the semiconductor substrate 51, the holes having the energy higher than the barrier height of the Schottky junction are removed. It flows into the semiconductor substrate 51 over the barrier. At this time, the electrons left on the Schottky electrode 52 become signal charges.

The signal charge generated in the Schottky electrode 52 is accumulated in the Schottky electrode 52 and the guard ring 54 having the same potential as the Schottky electrode 52. When the transfer gate 62 is turned on after a certain storage time, the stored signal charges are transferred to the CCD channel 56, and at the same time, the Schottky electrode 52 is reset. CCD channel 56
The signal charge transferred to the vertical CCD 60 is transferred in the vertical direction of the array by the transfer operation of the vertical CCD
A horizontal CCD (not shown) connected to the end transfers the data in the horizontal direction of the array, and finally an FDA (floating diffusion amplifier) connected to the horizontal CCD end.
Is output to the outside of the pixel.

[0008] Infrared imaging is for detecting a difference in radiation light intensity due to a temperature difference of an object. When actually taking an image,
Since the background ray component is extremely large as compared with the signal from the target object, it is required to increase the amount of charge that can be handled by the element in order to improve the performance of the infrared imaging element and the infrared camera. The amount of charge handled by the storage-type infrared solid-state imaging device depends on the smaller of the maximum value of the signal charge that can be stored in the detector (hereinafter referred to as the saturated charge amount) and the maximum value that can be handled by a readout circuit such as a CCD. I do. Normally, since the infrared solid-state imaging device is designed so that the amount of charge handled on the readout circuit side is larger than the amount of saturation charge on the detector side, it is required to increase the amount of saturation charge of the detector. Was.

The saturation charge Q _sat [C] of the infrared detector 53 used in the infrared imaging device 70 shown in FIG.
Is shown in the following equation (1).

[0010]

(Equation 1)

In the above equation (1), Cd represents a detector capacitance [F], and Vr represents a detector reset voltage [V].
The detector capacitance Cd is the Schottky junction capacitance between the Schottky electrode 52 and the semiconductor substrate 51, the PN junction capacitance between the guard ring 54 and the semiconductor substrate 51, the Schottky electrode 52 and the infrared reflection film. It is given by the sum of the capacitances of the parallel plates between 55 and 55. With the increase in the number of pixels in the element, it is becoming difficult to increase the detector capacitance Cd as the size of the unit pixel is reduced. For this reason, a method of increasing the saturation charge amount by increasing the detector reset voltage Vr has been studied.

[0012]

However, in the conventional infrared solid-state imaging device, the detector reset voltage Vr
In order to increase the saturation charge amount by increasing the value, there is a problem as described below.

In general, in an infrared detector using a Schottky junction or a hetero junction, the upper limit of the infrared wavelength that can be detected (cutoff wavelength input c [μm]) is determined by the optical barrier height φ _bp [eV] of the junction. And the following equation (2)
Is determined. Input c = 1.24 / φ _bp Equation (2) Further, the quantum efficiency η of the infrared detector is determined by the following equation (3). η = C ₁ · (hν−φ _bp ) ² / hν Equation (3) In Equation (3) above, C ₁ is a quantum efficiency coefficient [/ e
V] and hν indicate the energy [eV] of the incident infrared ray.

The quantum efficiency η, especially in the infrared near the cutoff wavelength, increases as the optical barrier height φ _bp increases, that is, as the cutoff wavelength input c decreases,
It decreases sharply. The optical barrier height φ _bp depends on the combination of the metal material or semiconductor material that determines the junction, and the reverse bias applied to the junction.φ _bp when the reverse bias is applied is as follows: Equation (4) is shown. φ _bp = φ _b0 −Δφ Equation (4) The above equation (4) shows the relationship called the Schottky effect, where φ _b0 is the barrier height [eV] when there is no interface electric field.
And Δφ indicates a reduction [eV] of the barrier when a reverse bias is applied. This Δφ increases approximately in proportion to the 乗 power of the bias voltage.

The Schottky electrode 52 of the infrared imaging device shown in FIG. 10 is electrically floating during the accumulation period after being reset by the detector reset voltage Vr. , Gradually decreases from the initial value Vr in accordance with the accumulation of signal charges, and as a result,
During the accumulation operation, the optical barrier height gradually increases and the cutoff wavelength decreases, so that the detection sensitivity decreases. Such a shift in the optical characteristics of the detector is not preferable for an image sensor, but since the detector reset voltage Vr of the conventional infrared image sensor is relatively small, it is considered that there is no optical characteristic shift approximately. However, the detection reset voltage V
When r is increased, there is a problem that the influence cannot be ignored.

Further, when a reverse bias is applied to an infrared detector using a Schottky junction or a hetero junction, a reverse dark current J _d [A / c given by the following equation (5) is obtained.
m ² ]. J _d = A ^** exp (−qφ _be / kT) Expression (5) In the above expression (5), A ^** is a Richardson constant [A
/ Cm ² K ² ], k is Boltzmann's constant, and T is the detector temperature
[K], q is the elementary charge, phi _BE denotes an electrical barrier height [eV].

Since the dark current is a noise factor, it is necessary to use the infrared solid-state imaging device by cooling the device to a low temperature to a level where the dark current is sufficiently smaller than the photocurrent of the charge signal.

The dark current also depends on the electrical barrier height, and increases exponentially as the electrical barrier height decreases. The electrical barrier height depends on the applied reverse bias as well as the optical barrier height. The relationship between the reverse bias and the electrical barrier height is given by the above equation (4). When a reverse bias having the same value is applied, the barrier reduction Δφ of the electrical barrier height is generally larger than the barrier reduction Δφ of the optical barrier height. Therefore, when the detector reset voltage Vr is increased in the conventional infrared solid-state imaging device, the dark current sharply increases, causing an increase in noise.
In order to prevent this, it is necessary to cool the element to a lower temperature, and accordingly, it is necessary to improve the cooling capacity of the element cooler, resulting in an increase in the size of the device and an increase in power consumption. I was

Furthermore, in order to completely transfer the signal charges accumulated in the infrared detector to the vertical CCD, the channel potential of the vertical CCD when reading out the signal charges must be
It must be sufficiently deeper than the detector reset voltage Vr. Accordingly, it is necessary to increase the channel potential of the horizontal CCD and the reset potential of the floating diffusion portion of the FDA. That is, if the detector reset voltage Vr is increased, the setting of the channel potential of the CCD or the like is significantly affected.

Particularly, in the case of an infrared solid-state imaging device required to operate at a low temperature, if the channel potential is deepened, the following problem occurs.

When the channel potential is increased by increasing the impurity concentration of the CCD channel region,
Since the impurities introduced into the channel region act as charge traps, the carrier freeze-out phenomenon at a low temperature deteriorates the signal charge transfer efficiency. Also, C
If the channel potential is increased by increasing the clock voltage applied to the electrode portion of the CD, the power consumption of the element increases, which causes a problem in cooling the element.

If the saturation charge amount is increased by increasing the detection reset voltage Vr, the above-described problem occurs, and the performance of the entire infrared solid-state imaging device is deteriorated. Therefore, it is impossible to increase the saturation charge amount of the element and increase the infrared detection efficiency of the element by increasing the detector reset voltage Vr.

The present invention has been made in view of the above problems, and has a detector reset voltage lower than that of the prior art, an increased amount of handled electric charges, and a decrease in the detector electric potential due to the accumulation operation of signal charges. Provided is an infrared solid-state imaging device which is reduced and does not change optical characteristics of a detector such as a cutoff wavelength during an accumulation operation.

[0024]

In order to solve the above-mentioned problems, an infrared solid-state imaging device according to the present invention is provided with a method in which an infrared detecting section for converting infrared rays into signal charges and a reading circuit section for reading out signal charges are temporarily connected. And a signal storage unit capable of storing a large amount of signal charge. Specifically, the infrared solid-state imaging device according to the present invention has an infrared detector having a Schottky junction or a heterojunction for converting infrared rays into signal charges and a readout circuit section for reading out the signal charges are formed on the same semiconductor substrate. In the infrared imaging device, a bias control unit formed in the same semiconductor substrate in a bias control region adjacent to the infrared detection unit to control a potential of the infrared detection unit; and a bias control unit disposed on the infrared detection unit. A first metal electrode that reflects infrared light transmitted through the infrared detection unit to the infrared detection unit, an insulating film layer disposed on the first metal substrate, and a second metal disposed on the insulating film layer A charge accumulating section comprising electrodes and electrically connected to the bias control section; and a transfer section adjacent to the readout circuit section on the same semiconductor substrate. And a transfer gate electrically controlling the potential of the gate region and electrically connected to the readout circuit unit. The signal charge converted by the infrared detection unit is transferred to the charge storage unit by the bias control unit. The transfer gate is controlled and stored in the charge storage unit, and the signal charge stored in the charge storage unit is transfer-controlled to the readout circuit unit at a predetermined timing by the transfer gate.

The infrared solid-state imaging device according to the present invention can cope with an extremely large signal charge amount stored in the charge storage portion by using at least a part of the readout circuit portion as a charge sweeping element.

In the infrared solid-state imaging device according to the present invention, the number of wirings in the device can be reduced by providing a gate electrode in the bias control section and electrically connecting the first electrode to the gate electrode.

In the infrared solid-state imaging device according to the present invention, the bias control section is provided with a DC power supply for keeping the potential of the infrared detection section constant, so that the signal charges generated by the infrared detection section can be quickly stored in the signal charge storage section. The detection sensitivity can be prevented from lowering by reducing the cutoff wavelength during the accumulation operation.

In the infrared solid-state imaging device according to the present invention, the bias control unit transfers the signal charge converted by the infrared detection unit to the charge storage unit at every first cycle time, and Preferably, the transfer gate transfers the signal charge stored in the charge storage unit to the readout circuit unit every second longer cycle time.

The infrared solid-state imaging device of the present invention can control the optical characteristics of the infrared detection unit according to the imaging environment by applying a voltage to the bias control unit from an external power supply.

[0030]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 First, an infrared solid-state imaging device according to the first embodiment of the present invention will be described.
FIG. 1 shows unit pixels constituting the infrared solid-state imaging device 40. The unit pixels of the element 40 are arranged on the semiconductor substrate 1 in an array. The element 40 includes the same P-type Si as the infrared detector 3, which detects infrared rays and converts them into signal charges, the charge storage section 23, which stores the converted signal charges, and the vertical CCD section 10, which is a circuit for reading out signal charges. It has a monolithic structure provided on the semiconductor substrate 1. Each unit pixel is separated by a field oxide film 5.

The infrared detecting section 3 and the charge accumulating section 23 are electrically connected via a bias control section 20, and the charge accumulating section 23 and the vertical CCD section 10 are electrically connected via the transfer gate section 12. ing. Bias control section 20 and transfer gate section 12
Are formed on the same semiconductor substrate 1.

The infrared detector 3 is a P-type Si semiconductor substrate 1
A Schottky electrode 2 made of PtSi is formed at a predetermined position by Schottky junction. Around the Schottky electrode 2, a guard ring 4 formed by injecting an N-type impurity into the semiconductor substrate 1 is provided. It is formed to reduce leakage current.

In the above embodiment, the Schottky detector formed by Schottky bonding metal electrodes on the P-type Si semiconductor substrate 1 is used for the infrared detector 3.
The present invention is not limited to this, and a heterojunction detector formed by forming another semiconductor layer, for example, GeSi (germanium silicon) on a Si semiconductor substrate may be used for the infrared detector 3.

The vertical CCD section 10 is arranged at a predetermined distance from the infrared detecting section 3 and is formed by implanting an N-type impurity region at a predetermined position of the semiconductor substrate 1.
It comprises a channel region 6, a gate oxide film 7 covering the CCD channel region, a CCD electrode 8 made of polysilicon covering the gate oxide film, and a CCD wiring 9 connecting the CCD electrode 8 and an external element. The CCD wiring 9 is formed of a metal such as Al, and is disposed on an interlayer insulating film 13 made of an oxide film laminated on the CCD electrode 8. Is in contact with

The charge accumulating section 23 is made of Al which reflects infrared rays.
This is a parallel plate capacitor composed of a first electrode 21 and an Al second electrode 22 opposed to the first electrode 21 via the interlayer insulating film 14 of an oxide film. The first electrode 21
It is formed on the interlayer insulating film 13 laminated on the Schottky electrode 2, is located immediately above the Schottky electrode 2, and is wired so that a predetermined potential can be given. Further, an N-type impurity region 18 is formed in a portion sandwiched between the infrared detection unit 3 and the vertical CCD unit 10, and one end of the second electrode 22 penetrates the interlayer insulating films 13 and 14 and has an N-type impurity region. It is in electrical contact with region 18.

The bias control section 20 is a gate section of a MOS transistor formed on the semiconductor substrate 1 having the infrared detection section 3 as a source region and the N-type impurity region 18 as a drain region. A gate electrode 19 made of polysilicon is formed in a region sandwiched between the region 18 and the gate oxide film 7.

The transfer gate section 12 is a gate section of a MOS transistor formed on the semiconductor substrate 1 having the N-type impurity region 18 as a source region and the vertical CCD channel 6 as a drain region.
A gate electrode 11 made of polysilicon is formed in a region sandwiched between the portion 10 and the N-type impurity region 18 via the gate oxide film 7.

Further, a protective film 16 made of a nitride film or the like is formed on the surface of the element 40, and an antireflection film 17 is formed on the back surface of the substrate 1.

Next, the operation of the element 40 will be described. Infrared light emitted from the subject enters from the back side of the element 40 (semiconductor substrate 1 side) via the anti-reflection film 17. When the infrared rays reach the Schottky electrode 2, they are converted into signal charges in the Schottky electrode 2 in the same manner as in the prior art. The antireflection film 17 improves the incident efficiency of infrared rays, and increases the photoelectric conversion efficiency.

At this time, the infrared light incident from the semiconductor substrate 1 is absorbed by the Schottky electrode 2, while a part of the infrared light is transmitted through the Schottky electrode 2,
3 is also transmitted. The first electrode 21 reflects the transmitted infrared ray and causes the reflected infrared ray to re-enter the Schottky electrode 2.
By optimizing the film thickness in accordance with the refractive index of the interlayer insulating film 13 and forming an optical resonance structure, the photoelectric conversion efficiency increases. In addition, since it is arranged on the interlayer insulating film 13, the optical resonance structure of the optimized interlayer insulating film 13 is not affected as described above.

The signal charge converted by the Schottky electrode 2 is transferred to the charge storage unit 23 via the bias control unit 20. At this time, the bias control gate 12 controls the transfer of the signal charge. Charge storage unit 2
3 is transferred to the transfer gate 12
Is transferred to the vertical CCD 10 at a predetermined timing via the. This transfer timing is determined by the transfer gate 1
2 is controlled. Furthermore, the signal charge is
The data is transferred in the vertical direction of the array by the transfer operation of D10, and then the horizontal CC connected to the end of the vertical CCD unit 10 is transferred.
D part (not shown) is transferred in the horizontal direction of the array,
Finally, the signal is output to the outside through an FDA (floating diffusion amplifier) connected to the end of the horizontal CCD section. From each unit element arranged in an array,
The infrared solid-state imaging device obtains image information by reading out the signal charges output in this manner in a time-series manner.

Next, the potential of the element 40 during the imaging operation will be described. In the following potential diagram,
The area indicated by the arrow 3 corresponds to the infrared detecting unit 3, the area indicated by the arrow 23 corresponds to the charge storage unit 23, and the area indicated by the arrow 6 corresponds to the vertical CC.
In the transfer channel 6 of the D section, the area indicated by the arrow 20 corresponds to the bias control gate section 20, and the area indicated by the arrow 12 corresponds to the transfer gate section 12.

First, with reference to FIG. 2A, the potential during the charge accumulation period in which the signal charges 29 are accumulated in the charge accumulation section 23 will be described. During the charge accumulation period, the transfer gate unit 12 is off. That is, the clock φT applied to the gate electrode 11 of the transfer gate unit 12 is at the “L” level, and the channel potential 28 of the transfer gate unit 12 is at the potential 0. When the infrared detection unit 3 is reset and the potential Vb is applied to the gate electrode 19 of the bias control unit, the potential of the potential well 24 of the infrared detection unit 3 is maintained at Vb.

The infrared radiation emitted from the subject is photoelectrically converted by the infrared detector 3, and a signal charge 29 is generated in accordance with the amount of light. The generated signal charges 29 move in the potential well 24 of the infrared detection unit 3, pass through the bias control channel 27, move to the potential well 25 of the charge storage unit 23, are accumulated therein, and are accumulated in the signal charge 30. To form Since the potential Vt of the potential well 25 of the charge storage unit 23 is higher than the potential Vd of the potential well 24 of the infrared detection unit 3, the signal charge 29 moves immediately after the charge is generated. Therefore, since no signal charge 29 remains in the potential well 24 of the infrared detecting unit 3, the potential of the potential well 24 is always V, which is the same as the channel potential of the bias control gate.
d is kept.

Next, when the charge accumulation period ends, the transfer gate section 12 is turned on. At this time, FIG.
As shown in (b), the clock φT applied to the transfer gate electrode 11 becomes “H”, and the channel potential of the transfer gate unit 12 is changed from 28 to 2
Switch to 8 '. As a result, the charge storage unit 23
Signal charges 29 ′ accumulated in the potential well 25
Are transferred to the potential well 26 of the vertical CCD section 6 through the transfer gate channel 28 'and are accumulated there to form a collection 30' of signal charges. At this time, the charge storage unit 23 is reset and the charge storage unit 2 is reset.
The potential of 3 becomes the channel potential Vt when the transfer gate unit 12 is turned on. The transfer gate unit 12 is turned on at a predetermined cycle, and the signal charges stored in the charge storage unit 23 are transferred to the potential well 26 of the vertical CCD unit 6. In this specification, this predetermined cycle is referred to as a unit accumulation period.

After the completion of such a charge transfer operation, as described above, the collection of signal charges 30 'is transferred by the vertical CCD and the horizontal CCD, and is output to the outside of the device through the FDA.

Further, the infrared solid-state imaging device of the present invention comprises:
Since the signal charges converted by the infrared detection unit are stored during the unit storage period, when the capacitance Cs of the charge storage unit 23 is smaller than the signal charges converted during the unit storage period, FIG. As shown in FIG. 3), the signal charges 30 generated in the infrared detection unit 3 not only have the potential well 25 of the charge storage unit 23 but also have the potential well 2 of the infrared detection unit 3.
3 is also accumulated. In such a case, the potential of the infrared detection unit 3 may be affected. Therefore, as shown in FIG. 3B, the capacitance Cs of the charge storage unit 23 is compared with the signal charge converted into the unit storage period. It is preferable to set such that the signal charges can be entirely stored in the potential well 25 of the charge storage unit 23. Quantitatively, it is preferable to set Cs so as to satisfy the following expression (6).

[0049]

(Equation 2)

In the above equation (6), Q represents the signal charge [C] converted by the infrared detector 3 into the unit accumulation time. Cs is determined by the area of the two electrodes 21 and 22, the thickness of the interlayer insulating film 14, and the dielectric constant of the interlayer insulating film 14. Therefore, in order to set Cs to be large, it is preferable to reduce the thickness of the interlayer insulating film 14 and to form the interlayer insulating film from a nitride film having a large dielectric constant.

In the infrared solid-state imaging device 40 shown in FIG. 1, since the charge storage unit 23 is provided above the infrared detection unit 3, the gateway ratio (the ratio of the area of the infrared detection unit to the pixel area) may not decrease. Absent. Therefore, by forming the charge storage portion, the detection efficiency of infrared rays of the element does not decrease. Further, since the structure of the charge storage section 23 is a parallel plate capacitor, the manufacturing process thereof does not require a complicated step such as changing a mask.
The capacitance Cs can be easily adjusted by adjusting the film thickness of No. 4.

Further, by increasing the capacitance Cs, the potential Vd of the infrared detector 3 can be kept low without being affected by the signal charge. By doing so, as shown in the above equation (4), the barrier reduction Δφ of the electrical barrier height due to the Schottky junction is reduced, and accordingly, the darkness generated in the infrared detector 3 shown in the above equation (5) is reduced. The current decreases. That is, by increasing the capacitance Cs, dark current noise can be reduced,
By suppressing the dark current noise, it is possible to use the infrared solid-state imaging device at a higher temperature than before, and it is possible to reduce the size of a cooling device for cooling the device and reduce power consumption.

Embodiment 2 Next, an infrared solid-state imaging device 41 according to a second embodiment of the present invention will be described with reference to FIG. The element 41 of the present embodiment is characterized by using a vertical CSD 33, which is a charge sweeping element having a much better charge transfer capability than a CCD, in a signal charge readout circuit, 3. The charge storage unit 23, the bias control unit 20, and the vertical CSD unit 33 have a monolithic structure formed on the same P-type Si semiconductor substrate 1. The structures of the bias control unit 20, the charge storage unit 23, and the N-type impurity region 18 are the same as those of the element 40.

The vertical CSD section 33 has CSD channels 31 and C formed of an N-type impurity region formed in the semiconductor substrate 1.
A gate oxide film 7 covering the SD channel 31 and a CSD electrode 3 made of polysilicon laminated on the gate oxide film 7
2 and the metal wiring 9 electrically connected to the CSD electrode 32. Also, the transfer gate unit 12 '
Is a gate portion of a MOS transistor having the N-type impurity region 18 as a source region and the CSD channel 31 as a drain region.
A gate electrode 11 made of polysilicon is formed thereon with a gate oxide film 7 interposed therebetween. Transfer gate part 1
Since the gate electrode 11 and the CSD electrode 32 of 2 ′ are continuous, the potentials of the gate electrode 11 and the CSD electrode 32 are equal.

Further, the gate electrode 11 and the CSD electrode 32
, The clock voltages to be applied are “L”, “H”, “HH”.
Since the transfer gate section 12 ′ uses the high-concentration P-type impurity region 34 as a channel, only when the applied clock voltage is “HH”,
The transfer gate unit 12 'is turned on.

Next, the infrared solid-state imaging operation of the element 41 will be described. The operation of the element 41 from the conversion of the infrared light incident on the infrared detection section 3 into signal charges to the transfer of the signal charges to the charge storage section 23 is the same as that of the element 40 described above. After the signal charge is stored in the charge storage unit 23, the gate electrode 11
When the clock voltage “HH” is applied to the transfer gate section 12, the transfer gate section 12 ′ is turned on, and the signal charges stored in the charge storage section 23 and the N-type impurity region 18 are transferred to the high-concentration P-type After passing through impurity region 34, it is transferred to CSD channel 31.

After the completion of such charge transfer, CSD
The signal charge is transferred in the vertical direction of the array by the transfer operation of (1). During the transfer period of the CSD, the clock voltage applied to the CSD electrode 32 and the gate electrode 11 is “H”.
Or "L", the transfer gate 12 'does not turn on during the transfer of the CSD. The read operation until the signal charge is output to the outside of the element is the same as that of the element 40 described above.

The vertical CSD section 33 has one potential well formed by the entire channel extending in the transfer direction, and has a much higher charge transfer capability than the CCD. A large amount of signal charge can be dealt with. That is, by using the CSD as the charge readout circuit, the aperture ratio of the element 41 is improved, and the amount of handled charges and the dynamic range are improved.

Embodiment 3 FIG. 5 shows an infrared solid-state imaging device 42 according to the third embodiment of the present invention. The element 42 of the present embodiment is the same as the element 4 except that the first electrode 21 forming the charge storage section 23 is electrically connected to the gate electrode 19 of the bias control section 20.
Same as 0.

The element 42 uses the end of the first electrode 21 as a wiring to the gate electrode 19 and reduces the number of wirings arranged in the element 42. Therefore, element 4
2, the infrared detecting section 3 having a large area can be formed, and the infrared detecting sensitivity of the element is improved.

First electrode 21 constituting charge storage unit 23
Is electrically connected to the gate electrode 19 of the bias control unit 20 according to the second embodiment shown in FIG.
May be used for the infrared solid-state imaging device 41 according to the first embodiment.

Embodiment 4 Next, an infrared solid-state imaging device according to a fourth embodiment of the present invention will be described. As shown in FIG. 6, the device according to the present embodiment performs
Bias control gate unit 1 by DC power supply 35
9 is characterized in that the bias voltage applied to the element 9 is kept constant, and other configurations are the same as those of the element 40 according to the first embodiment. In the device according to the fourth embodiment, the potential well 24 and the bias control unit 20 of the infrared detection unit 3 are
Since the channel potential 27 is maintained at Vd, the signal charges 29 generated by the infrared detection unit 3 move to the potential well 25 of the charge storage unit 23 immediately after generation. Therefore, it is possible to prevent a decrease in the cutoff wavelength and a decrease in the detection sensitivity during operation of the device, and to obtain an infrared solid-state imaging device having excellent optical characteristics.

In the infrared solid-state imaging device according to the second or third embodiment, a configuration may be used in which the bias voltage applied to the bias control gate by the DC power supply is constant.

Embodiment 5 Hereinafter, the infrared solid-state imaging device according to the fifth embodiment of the present invention will be described. FIG.
As shown in the figure, the device of the present embodiment is
The bias voltage applied to the bias control gate 19 is changed to a pulse voltage. The infrared solid-state imaging device according to the fifth embodiment is the same as the infrared solid-state imaging device according to the first embodiment, except that the bias voltage is a pulse voltage.

More specifically, in the device of this embodiment, the voltage applied to the bias control unit is set to the "H" voltage a plurality of times during the unit transfer period. One pulse cycle time of the pulse voltage 36 is shorter than a clock cycle time applied to the transfer gate 11.

Next, a fifth embodiment will be described with reference to FIGS.
The operation of the element will be described. FIG. 7A shows a case where the bias voltage VB applied to the bias control gate 19 is "L". At this time, the potential of the channel potential 27 'of the bias control unit 20 is 0.
Therefore, the generated signal charges are pre-stored in the potential well 24 of the detector 3 and the signal charges are stored in a preliminary set 30a.
Is formed. On the other hand, in the potential well 25 of the charge storage unit 23, a set 30b of signal charges is stored in advance.

Next, as shown in FIG. 7B, the bias voltage applied to the bias control gate 19 is set to "H".
Then, the potential 27 of the channel potential becomes Vd
The preliminary set 30a of signal charges stored in the potential well 24 of the infrared detection unit 3
3 is transferred to the potential well 25 and stored.
When the pulse voltage is applied to the control gate section 20 and the potential of the channel potential is set to “L” a plurality of times during the unit accumulation period, the pulse voltage is controlled as shown in FIGS. 7A and 7B.
Are repeated, and the signal charges generated by the infrared detecting section 3 are transferred to the charge accumulating section 23 a plurality of times, where a set 30 of signal charges is formed. After this,
As shown in FIG. 8, when the transfer gate 11 is turned on for each unit accumulation period, the potential of the channel potential 28 ′ of the transfer gate unit 12 becomes Vt. 30 is transferred to the potential well 26 of the vertical CCD section 6.

In the above-described signal charge transfer, if the timing for turning on the bias control gate 19 is set while the CCD is stopped (for example, during a horizontal flanking period), the reset voltage of the infrared detection unit becomes vertical CC
There is no influence of clock noise caused by the clock applied to the D section 6.

Further, by making the number of times of division transfer from the infrared detection section to the charge accumulation section sufficiently large for the number of divisions per unit accumulation period, a decrease in bias of the infrared detection section during the unit preliminary accumulation period can be ignored. It can be suppressed up to.

A configuration in which a bias voltage applied to a bias control gate by a pulse power supply is pulsed is as follows.
The infrared solid-state imaging device according to the second or third embodiment may be employed.

Embodiment 6 FIG. Next, an infrared solid-state imaging device according to a sixth embodiment of the present invention will be described with reference to FIG.
The element according to the present embodiment is a variable DC provided outside the element.
The voltage applied to the bias control gate unit 19 is controlled by the voltage 37.
The voltage applied by the variable DC voltage 37 varies depending on the background temperature at the time of imaging or the temperature of the subject. The applied voltage of the device of the present embodiment is the same as that of the device of the first embodiment except that a bias power supply is provided outside.

The potential of the infrared detector 3 during the signal charge accumulation period is given by the channel potential 27 of the bias control gate 20. That is, the potential of the infrared detecting unit 3 is set to the bias control gate electrode 19.
Is controlled by the voltage VB applied to. When the potential of the infrared detector 3 changes, the optical barrier φ _bp changes due to the Schottky effect, and accordingly, the cutoff wavelength and the infrared detection sensitivity change. That is, by adjusting the voltage VB applied to the bias control electrode 19, the potential of the infrared detection unit 3 can be adjusted, and the optical characteristics of the infrared detection unit 3 can be controlled.

The device of the present embodiment has a variable DC power supply 37
Of the bias control electrode 1 independently of another drive voltage or drive clock provided to the element.
9 can be controlled. As described above, since the variable DC voltage 37 changes the applied voltage in accordance with the background temperature or the temperature of the subject at the time of imaging, the element of the present embodiment feeds back the imaging environment to the By adjusting the voltage applied to the control electrode, the optical characteristics of the element can be adjusted according to the imaging environment.

[0074]

According to the infrared solid-state imaging device of the present invention, the aperture ratio of the device is increased by arranging a charge storage portion having a large capacitance above the infrared detection portion. It is possible to increase the amount of electric charges handled by the element while keeping the voltage low.

In the infrared solid-state imaging device of the present invention, the signal charge readout circuit is CSD, and an extremely large amount of signal charge transferred from the charge storage section is read out by CSD, thereby improving the dynamic range of the device. it can.

In the infrared solid-state imaging device of the present invention, the electrode constituting the charge storage section is connected to the gate electrode of the bias control gate, the number of wirings of the device is reduced, and the aperture ratio of the device is increased. Infrared ray detection efficiency can be improved.

The infrared solid-state imaging device of the present invention prevents a potential drop in the infrared detection unit by holding a bias voltage constant by a DC power supply, thereby preventing a cut-off wavelength from lowering and a reduction in infrared detection efficiency.

In the infrared solid-state imaging device of the present invention, the voltage applied to the bias control unit is set to a pulse voltage to prevent a potential drop in the infrared detection unit, thereby preventing a cut-off wavelength from decreasing and a reduction in infrared detection efficiency. I do.

The infrared solid-state imaging device of the present invention can change the optical characteristics of the device according to the imaging environment by applying a voltage to the bias control unit by an external power supply.

[Brief description of the drawings]

FIG. 1 is a sectional view of a unit pixel of an infrared solid-state imaging device according to a first embodiment of the present invention;

FIG. 2 is a potential diagram showing an operation of the infrared solid-state imaging device according to the first embodiment of the present invention;
(B) shows a state in which signal charges are transferred from the infrared detection section to the charge storage section, and (b) shows a state in which signal charges are transferred from the charge storage section to the CCD section.

FIGS. 3A and 3B are potential diagrams illustrating the operation of the infrared solid-state imaging device according to the first embodiment of the present invention, wherein FIG. 3A illustrates a case where the capacitance Cs of the charge storage unit is small, and FIG. Shows a case where the capacitance Cs is large.

FIG. 4 is a sectional view of a unit pixel of the infrared solid-state imaging device according to the second embodiment of the present invention;

FIG. 5 is a sectional view of a unit pixel of the infrared solid-state imaging device according to the third embodiment of the present invention;

FIG. 6 is a potential diagram illustrating an operation of the infrared solid-state imaging device according to the fourth embodiment of the present invention;

FIGS. 7A and 7B are potential diagrams showing the operation of the infrared solid-state imaging device according to the fifth embodiment of the present invention, in which FIG. 7A shows a state in which signal charges are accumulated in an infrared detection unit, and FIG. 5 shows a state in which signal charges are transferred from the device to the charge storage unit.

FIG. 8 is a potential diagram showing an operation of the infrared solid-state imaging device according to the fifth embodiment of the present invention, showing a state where signal charges are transferred from a charge storage unit to a CCD unit.

FIG. 9 is a potential diagram illustrating an operation of the infrared solid-state imaging device according to the sixth embodiment of the present invention;

FIG. 10 is a sectional view of a unit pixel of a conventional infrared solid-state imaging device.

[Explanation of symbols]

Reference Signs List 1 semiconductor substrate, 2 Schottky electrode, 3 infrared detector, 6 CCD channel, 7 gate oxide film, 8 CCD electrode, 9 CCD electrode wiring, 1
0 vertical CCD section, 11 transfer gate electrode, 12 transfer gate section, 14 interlayer insulating film, 19 bias control electrode, 21 first electrode, 22 second electrode, 31 CSD channel,
32 CSD electrode, 33 vertical CSD section, 35 D
C power supply, 36 pulse power supply, 37 external variable DC power supply.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA01 AA02 AA05 AB01 BA10 BA14 CA06 DA03 DB04 FA06 FA33 FA39 GA02 GA10 GD15 5C024 AA06 CA00 CA12 CA15 FA01 GA06 GA13 GA22 GA27 GA53 JA28 5F049 MA03 MA05 MB03 NB05 QA11 RA06 SS03 WA01

Claims (6)

[Claims] 1. An infrared imaging device in which an infrared detector having a Schottky junction or a heterojunction for converting infrared to signal charge and a readout circuit for reading out the signal charge are formed on the same semiconductor substrate. A bias control section formed in the same semiconductor substrate in a bias control region adjacent to the infrared detection section, for controlling a potential of the infrared detection section, and an infrared ray disposed on the infrared detection section and transmitted through the infrared detection section; A first metal electrode reflecting on the infrared detection unit, an insulating film layer disposed on the first metal electrode, and a second metal electrode disposed on the insulating film layer; Controlling the potentials of the electrically connected charge storage portion and a transfer gate region adjacent to the readout circuit portion of the same semiconductor substrate; Serial to readout circuit comprise electrically connected transfer gates, converted signal charges in the infrared detector is transferred to the charge storage portion by the biasing control unit,
An infrared solid-state imaging device, wherein the signal charge stored in the charge storage unit is transferred to the readout circuit unit at a predetermined timing by the transfer gate. 2. The method according to claim 1, wherein at least a part of the readout circuit section includes:
2. The infrared solid-state imaging device according to claim 1, wherein the device is a charge sweeping device. 3. The infrared solid-state imaging device according to claim 1, wherein the bias control unit includes a gate electrode, and the first electrode is electrically connected to the gate electrode. . 4. The infrared solid-state imaging device according to claim 1, wherein the bias control unit includes a DC power supply for making the potential of the infrared detection unit constant. 5. The method according to claim 1, wherein the bias control unit transfers the signal charges converted by the infrared detection unit to the charge storage unit every first cycle time, and a second cycle longer than the first cycle time. The infrared solid-state imaging device according to any one of claims 1 to 3, wherein the transfer gate transfers the signal charge stored in the charge storage unit to the readout circuit unit every time. 6. The infrared light according to claim 1, wherein a voltage is applied to the bias control unit by an external power supply to control an optical characteristic of the infrared light detection unit. Solid-state imaging device.