JP2000124794A - Superconductive logic circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the area and also to shorten the operation time of a superconductive logic circuit by connecting magnetically an input inductor of a magnetic flux quantization parametron gate to an output inductor of the parametron gate of the preceding gate via an insulating layer with no direct connection of them and setting an odd number of >=3 pieces for the output signals of the parametron gate of the preceding gate. SOLUTION: An output inductor 5 of a magnetic flux quantization parametron gate 3 of the preceding gate is magnetically coupled to an input inductor 6 of the gate 3 of the next stage. Then the input signal that is obtained via the magnetic connection of both inductors 5 and 6 is inputted to the gate 3 of the next stage via a Josephson junction 7, a shunt resistance 10 connected in parallel to the junction 7 and an inductor 9 of an input line. The input and output signal lines are set at 20 and 10 picohenries respectively together and the loop inductance of a magnetic flux quantization parametron is set at 3 picohenry.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention exhibits a unique performance due to the superconductivity of the circuit, such as a detecting device for a minute magnetic field, a voltage standard, a microwave or millimeter wave detecting circuit, a high-speed digital circuit, and an analog data processing circuit. In particular, the present invention relates to a flux quantum logic gate which is an element of a digital circuit exhibiting ultra-high speed performance, and a logic configuration and operation of a superconducting logic circuit constituted by the gate.

[0002]

2. Description of the Related Art A superconducting digital circuit, for example, shown in FIG.
In a logic circuit or the like constituted by the flux quantum parametron gate 3 such as the equivalent circuit shown in (1), it is necessary to obtain a means for executing transmission and reception of signals between the flux quantum parametron gates connected in cascade as a logical operation and a circuit configuration thereof. is there. In FIG. 11, 4 is a Josephson junction, 1 is a flux quantum parametron loop inductor, 12
Is a shunt resistor connected in parallel to the Josephson junction 4, 2 is an excitation line inductor, 5 is an output inductor, and 8 is a ground terminal. As it is well known, when the excitation line inductor 1 is urged, by the polarity of the input current I _A applied through the input inductor 6, the polarity of the output current I _B flowing to the output inductor 5 Decided. Transmitting the output current I _B from the output inductor 5 as magnetic flux signal to the next stage gate.

When a superconducting digital circuit, for example, a three-input multiple connection logic as shown in FIG. 12 is formed by such a flux quantum parametron gate, a conventional superconducting logic circuit using a flux quantum parametron gate performs a logical operation. The input / output signal is transmitted and received by directly connecting the superconducting force signal line and the output signal line, which are connected as above, via the output inductor 5. The carrier of the input / output signal is the current. Flux quantum parametron gate 3 ₀ of the output stage via the output inductor 5 the respective output signals of the input signal I _A1, I _A2 and I _A3 flux quantum was located before parametron gates 3 _1, 3 ₂ and 3 ₃ , Are directly received by the input line and used as input signals. Of the flux quantum parametron gates arranged in the preceding stage, an input signal in which two or more coincide with each other is selected as an input signal to the flux quantum parametron gate in the output stage. That is, a three-input multiple connection logic is configured. 1 out of 3 inputs
If the input is a dummy signal, a two-input AND and OR operation can be performed. Functional circuits such as adders and multipliers are constituted by such majority logic.

[0004]

As described above with reference to FIG. 12, in a conventional superconducting logic circuit composed of a flux quantum parametron gate, a current that directly couples transmission and reception of input / output signals by a current as a carrier is used. A signal was input to the gate by the injection method. By constructing a circuit by combining three-input multiple-connection logics in this manner, it is possible to configure a functional circuit such as an adder, a multiplier, a multiplexer, a diplexer, and the like. However, the conventional superconducting logic circuit configuration method can execute only a three-input majority decision or a two-input AND, OR logic or the like. Negation logic is an independent gate and must be processed separately. Therefore, an increase in the number of gates and an increase in the number of logic stages required to configure these functional circuits cannot be avoided.

For example, with a three-input majority logic gate, 4: 1
When assembling a multiplexor circuit, it is necessary to configure 11 logic logic gates, including buffer gates, excluding the NOT logic gates, with 34 magnetic flux quantum parametron gates and five logic stages. An increase in the number of gates required requires a high level for an increase in circuit area and uniformity of inductors and Josephson junction characteristics that constitute the circuit. An increase in the number of logic stages involves an increase in operation time.

Accordingly, an object of the present invention is to provide, in a logic circuit constituted by magnetic flux quantum parametron gates, a circuit system capable of reducing the number of gates and the number of logic stages required to constitute a functional circuit, and an input signal line and output of the gate. An object of the present invention is to provide a connection method of a signal line and a structure of an input signal line and an output signal line. As a result, the circuit area is reduced,
And to reduce the operation time.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a magnetic flux quantum parametron, wherein the input inductor of the flux quantum parametron gate and the output inductor of the preceding gate are not directly connected but are magnetically coupled via an insulating layer. Inserting a Josephson junction in one or both of the input and output lines of the gate prevents the formation of a superconducting closed loop including a superconducting magnetic shielding film, and also reduces the output signal line of the preceding gate by three. The problem in the prior art is intended to be solved by setting the odd number to be greater than or equal to the number.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments described below.

Embodiment 1 FIG. 1 shows an equivalent circuit diagram of a basic configuration of an embodiment of coupling between flux quantum parametron gates which is the basis of the present invention. FIG.
, 3 is a flux quantum parametron gate, 4 is a Josephson junction, 1 is a flux quantum parametron loop inductor, 2 is an excitation line inductor, 6 is an input inductor, 5 is an output inductor, 8
Is the ground end. In this embodiment, the Josephson junction 4
The reference numerals of the shunt resistors connected in parallel to are omitted. Here, the output inductor 5 of the first stage flux quantum parametron gate 3 is magnetically coupled to the input inductor 6 of the second stage flux quantum parametron gate 3. The output inductor 5 and the input inductor 6
An input signal obtained by magnetic coupling with the magnetic flux quantum parametron gate 3 at the subsequent stage is introduced through a Josephson junction 7, a shunt resistor 10 connected in parallel thereto, and an inductor 9 of an input line.

The flux quantum parametron gate in this embodiment can be realized by an arbitrary structure. For example, a circuit described in Japanese Patent Application No. 10-200163 "Superconducting Logic Circuit" previously proposed by the inventors of the present application is described in detail. Can be used. Further, the structure of the Josephson junction employed here can be used.

2 (a), 2 (b) and 3 (a),
(B) shows an example of a cross-sectional view and a plan view of the structure of the input signal line and output signal line portion of the gate that can be employed in the present invention. In these figures, (a) is a cross section at the position of AA in (b). The structural portions of the input signal lines and the output signal lines of the flux quantum parametron gate are formed by a superconducting magnetic shielding film 50, an interlayer insulating film 51, a superconducting force signal line 52, an interlayer insulating film 53, and a superconducting output signal line 54, which are ground layers. One end of the input signal line 52 and one end of the output signal line 54 are connected to the superconducting magnetic shielding film 50 by the ground terminal 55.

As is apparent from the drawing, the output signal line 54 of the previous gate is placed on the input signal line 52 via the insulating layer 53.
Distribute. Regarding the dimensions of the input signal line 52 and the output signal line 54, the width and length of the magnetically coupled input signal line 52 are longer than the width and length of the output signal line 54. Further, both the input signal line and the output signal line of the flux quantum parametron gate are connected to the superconducting magnetic shielding film 50,
That is, it is grounded 55. The grounding direction of the pre-stage gate output signal line is set to the same direction as the grounding direction of the flux quantum parametron gate input signal line, or to the opposite direction, in accordance with the type of logical operation in which the flux quantum parametron gate functions. Both FIG. 2 and FIG. 3 show an example in which there are five output lines in the preceding stage and one input line in the next stage. FIG. 2 shows an example in which all output signal lines 55 are arranged to act on input signal lines 52 with the same polarity. In order to make all of them work in reverse polarity, the grounding end and the introduction position of the input line may be arranged as shown by a broken line. FIG. 3 shows an example in which, of the output signal lines 55, only the upper three lines of the output signal lines 55 are arranged to operate with the same polarity with respect to the input signal lines 52, and the other two lines of the lower stage are arranged with the opposite polarity. is there. In order to invert these relationships, the ground end and the position of the input line may be arranged as indicated by broken lines. In the example of the solid line in FIG. 2, the direction of the input and output currents is the same because the ground 55 is taken at the opposite position. If the ground 55 is the same for the input and output as in the example of the broken line, the directions of the input and output currents are reversed. In FIG. 3, three output lines 54
And the two output lines 54 have their ground ends reversed with respect to the input line 52 contact, so that the direction of each output current is opposite to the input current.

The grounding direction of the pre-stage gate output signal line is set to the same direction as the grounding direction of the flux quantum parametron gate input signal line, or to the opposite direction, in accordance with the type of logical operation in which the flux quantum parametron gate functions.

Regarding the relationship between the structure of the input signal line and the output signal line and the logical operation, the direction of the current flowing through the output signal line of the flux quantum parametron gate or the output signal line of the preceding gate, and the logical "0" or "1"". More specifically, the logic “0” or “1” of the output signal of the flux quantum parametron gate corresponds to the direction of the current flowing through the output signal line with respect to the ground line.

According to the structure of the input signal line and the output signal line, the connection method, and the correspondence between the input / output signal and the logic, the majority logic circuit, the multiplexer, the diplexer, and the adder are formed by the flux quantum parametron gate. A functional circuit including a multiplier, a multiplier and the like is configured.

Based on the basic circuit configuration shown in the equivalent circuit diagram of FIG. 1, a five-input / one-output majority logic circuit shown in FIG. 4 was produced by a flux quantum parametron gate.

[0017] I _A5 from the input signal I _A1 is input via the 3 ₅ from the magnetic flux quantum parametron gate 3 _1. Output signal line inductor 5 for each buffer gate was flux quantum parametron gate 3 ₀ of the input signal line inductor 6 and magnetically coupled to structure for performing a majority logic. Since this connection is all in the addition direction, it is the same as the example shown by the solid line in FIG. As specific inductance values, the input signal line was 20 picohenries and the output signal line was 10 picohenries. The loop inductance of the flux quantum parametron was set to 3 picohenries. The magnetic field coupling coefficient between the input signal line inductor and the buffer gate output signal line inductor was 0.5. In order to read the operation result of the majority logic, the magnetic flux quantum interference device SQ was connected to the output signal line of the gate executing the majority logic. A Josephson junction 7 was inserted into the input signal line of this gate.

The excitation lines of the flux quantum parametron gate at the input stage are connected in series to give an excitation current at the same timing.

The output waveform of such a superconducting logic circuit is as shown in FIG. 5, and it has been found that the 5-input majority logic is executed.

The reason why the multi-input majority logic circuit described in the present embodiment can be realized is that the input signal levels of the preceding gates can be made uniform. This is because the input / output signal between the gates is transmitted and received by magnetic coupling instead of directly injecting the current signal into the next stage gate. Specifically, the input signal levels can be made uniform by making the widths and lengthwise overlaps of the output signal lines of each buffer gate equal to the input signal lines of the gates that execute majority logic.

Example 2 A superconducting logic circuit for performing a three-input AND operation was manufactured.
As shown in FIG. 6, the same configuration as the majority logic circuit 5 inputs of the five buffer gate 3 ₁ to 3 _5, the ground direction of the two buffer gate 3 _4, 3 ₅ of the output signal line 5 In the opposite direction. The structure is the same as that shown in FIG.
The buffer gates whose ground directions are reversed are used as dummy gates, and the output signals corresponding to the input signals _IA4 and _IA5 are input signals such that a logical signal "1" is output.
To determine the polarity of I _A4, I _A5. From the point of view of the gate executing the majority logic, this is the input of the logic signal "0".

[0022] As shown in FIG. 7, when the logic signal I _A1 inputted from three buffer gate 3 ₁ to 3 ₃ I _A3 are all "1", the output signal by majority logic circuit I _B0 ""1" is output, and in all other cases, a logical operation of "0" was executed. This is a three-input AND operation. With the exception of the buffer gate, such a multi-input logic operation was performed by a single-stage gate.

In the case where a three-input AND circuit is formed by three-input majority logic gates, it is necessary to configure three majority logic gates in two stages. As a result, in the superconducting logic circuit according to the present invention, the circuit area can be reduced by reducing the number of constituent gates, and the operation can be speeded up by reducing the number of logic stages.

Embodiment 3 A superconducting logic circuit performing a three-input OR operation was manufactured. As shown in FIG. 8, a majority logic circuit having 7 inputs and 1 output was manufactured. From each input signal I _A1 I _A7 is given input from the flux quantum parametron gate 3 ₁ through 3 _7. Output signal line inductor 5 for each buffer gate was flux quantum parametron gate 3 ₀ of the input signal line inductor 6 and magnetically coupled to structure for performing a majority logic. The output signal lines of the buffer gates were grounded to the superconducting magnetic shielding film, and all of them coincided with the ground direction of the gates executing the majority logic. In order to read the operation result of the majority logic, the magnetic flux quantum interference device SQ was connected to the output signal line of the gate executing the majority logic. A Josephson junction 7 was inserted into the input signal line of this gate.

The input signal line for executing majority logic is made larger in width and length than the output line so that it can be magnetically coupled to and stacked with a plurality of output signal lines of the buffer gate. The seven output signal lines were arranged in two lines on the input signal lines. Although a specific illustration of this embodiment is omitted, it will be apparent that the same configuration can be made with reference to the examples of FIGS.

[0026] In the majority logic circuit 7 inputs, three buffer gate 3 ₅ 3 ₇ as a dummy gate, were always to be output is a logic signal "1". As shown in FIG. 9, at least one of the logic signals to be 3 ₄ input from the four buffer gate 3 to ₁ when "1" is output "1" by majority logic circuit. This is a four-input OR operation. Except for the buffer gate, such a multi-input logical operation was performed by a single-stage gate.

When a three-input majority logic gate constitutes a four-input OR circuit, it is necessary to form three majority logic gates in two stages. As a result, in the superconducting logic circuit according to the present invention, the circuit area can be reduced by reducing the number of constituent gates, and the operation can be speeded up by reducing the number of logic stages.

Example 4 A superconducting logic circuit performing a 4: 1 multiplexer operation was manufactured. As shown in the logic circuit diagram in FIG.
It has four input AND gates 31 and one four-input OR gate 32. In a 3-input AND gate,
An AND operation is performed on one of the four input signals X ₀ , Y ₀ , Z ₀ , and V ₀ and two timing signals S ₁ and S ₂ . The four types of combinations obtained by affirming and negating the timing signals S ₁ and S ₂ are respectively used as input signals X ₀ ,
Y ₀ , Z ₀ , and V ₀ are applied to AND gates. The input of the negation signal was realized by making the direction in which the output signal line is grounded to the superconducting magnetic shielding film in the opposite direction.

By performing an OR operation on the input signals X ₁ , Y ₁ , Z ₁ , and V ₁ that have been ANDed with the timing signal, an output F of a 4: 1 multiplexer operation is obtained.

The superconducting logic circuit shown in the second embodiment was used for the three-input AND gate. Input signals X ₀ , Y ₀ , Z ₀ , V ₀
The timing signals S ₁ and S ₂ were input to the AND gate via the buffer gate. For the negative signals of the timing signals S ₁ and S ₂ , the connection direction of the output signal line to the superconducting magnetic shielding film was reversed from that of the other output signal lines. The connection direction of the dummy signal line with the superconducting magnetic shielding film was opposite to the connection direction of the inputs X ₀ , Y ₀ , Z ₀ , and V _{0 with} the superconducting magnetic shielding film.

The superconducting logic circuit shown in the third embodiment was used for the 4-input OR gate. Each output signal line X ₁ , Y ₁ ,
The connection directions of the Z ₁ and V _{1 with} the superconducting magnetic shielding film and the connection directions of the dummy signal lines with the superconducting magnetic shielding film were aligned.

The superconducting logic circuit produced by such a configuration has shown operation as a 4: 1 multiplexer. The present 4: 1 multiplexer circuit was composed of five majority logic gates, and could be composed of three logic stages including a buffer gate. No extra gate is needed to get the negation signal. This is a remarkable reduction in the number of gates and the number of logic stages as compared with the case where a conventional three-input majority logic gate constitutes a 4: 1 multiplexer circuit.

By using the configuration of gates and the method of connecting input / output signal lines in the superconducting logic circuit, not only a multiplexer circuit but also other functional circuits such as an adder and a multiplier could be constructed.

[0034]

According to the present invention, a majority logic gate having more than three input signals can be realized with a smaller number of logic stages. Therefore, the size of the circuit can be reduced and the operation time can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing an equivalent circuit of a basic configuration of an embodiment of coupling between flux quantum parametron gates, which is a basis of the present invention.

FIGS. 2A and 2B are a cross-sectional view and an example of a plan view of a structure of an input signal line and an output signal line portion of a gate which can be employed in the present invention. FIGS.

FIG. 3 is a cross-sectional view and another example of a plan view of a structure of an input signal line and an output signal line portion of a gate that can be employed in the present invention.

FIG. 4 is an equivalent circuit diagram of a five-input majority superconducting logic circuit according to an embodiment of the present invention.

FIG. 5 is a diagram showing operation waveforms of the 5-input majority superconducting logic circuit shown in FIG. 4;

FIG. 6 is a diagram showing an equivalent circuit of a three-input AND circuit according to the embodiment of the present invention.

FIG. 7 is a view showing operation waveforms of the three-input AND circuit shown in FIG. 6;

FIG. 8 is a diagram showing an equivalent circuit of a four-input OR circuit according to the embodiment of the present invention.

FIG. 9 is a diagram showing operation waveforms of the 4-input OR circuit shown in FIG. 8;

FIG. 10 is a logic circuit diagram of a 4: 1 multiplexer circuit according to the present invention.

FIG. 11 is an equivalent circuit diagram of a conventional flux quantum parametron gate.

FIG. 12 is a diagram showing an equivalent circuit of a superconducting logic circuit in which a three-input multiple connection logic is formed by a conventional flux quantum parametron gate.

[Explanation of symbols]

1 ‥‥ flux quantum parametron gate, 2 ‥‥ excitation line, 3
{Flux quantum parametron gate, 4} Josephson junction, 5} output inductor, 6} input inductor,
7 ‥‥ Josephson junction, 8 ‥‥ ground, I _A1, ~I _A7 ‥
{Input signal, I _B0 } Output signal, 31 ‥‥ AND gate, 32 ‥‥ OR gate, 33 ‥‥ Negative, 50 ‥‥ Superconducting magnetic shielding film, 51 ‥‥ Interlayer insulating film, 52 ‥‥ Superconducting force signal line , 53 ‥‥ interlayer insulation film, 54 ‥‥ superconducting output signal line, 55 ‥‥ ground.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor ▲ Taka ▼ Kazuma Ki 2250, Akanuma-cho, Hatoyama-cho, Hiki-gun, Saitama Prefecture Inside Hitachi, Ltd. 2520 Address, Hitachi, Ltd.Basic Research Laboratories (72) Inventor Akira Tsukamoto2520, Akanuma-cho, Hatoyama-cho, Hiki-gun, Saitama Prefecture F-term in Hitachi, Ltd. Basic Research Laboratories (Reference) 4M113 AC08 AD04 AD23 AD25 AD26 AD42 AD45 AD51 AD56 5J042 AA04 BA16 CA00 CA19 CA22 CA23 CA27 DA01 DA03 DA06

Claims (4)

[Claims] 1. A flux quantum parametron loop inductor,
A flux quantum parametron gate including a Josephson junction, a shunt resistor, an excitation line inductor, an output inductor, and a ground terminal connected in parallel to the Josephson junction, and an input signal line and an output signal line of each coupled gate. Are magnetically coupled and the output signal line of the previous gate is 3
The input current direction of the flux quantum parametron gate is determined by the more current direction of the output signal lines having the same current direction among the two directions of current flowing through the plurality of output signal lines of the preceding gate, which is an odd number equal to or more than the number of output signal lines. A superconducting logic circuit characterized by being determined. 2. The superconducting logic circuit according to claim 1, wherein the direction of the current flowing in the output signal line of the flux quantum parametron gate or the output signal line of the preceding gate is associated with logic "0" or "1". . 3. The superconducting logic circuit according to claim 1, wherein the logic "0" or "1" is determined by a relative ground position of the output signal line and the input signal line. 4. The superconducting logic circuit according to claim 1, wherein the width and length of the input signal line of the flux quantum parametron gate are longer than the width and length of the output signal line.