JP2000114530A - Photoelectric conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion device which operates at high speed without degrading a picture quality and sensitivity. SOLUTION: A plurality of pixels which comprises a photoelectric transducer S and a thin-film transistor T connected to it as a switching element are arrayed two dimensionally, with a signal read-out wiring (SIG) 115 connected to the pixel extending through the interval between adjoining pixel. When a gap between lower electrodes 102 of two pixels sandwiching the wiring 115 is assumed as W1 while that between upper electrodes 110 as W2, a wiring width W is W1<=W<=W2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-dimensional photoelectric conversion device used for a facsimile, a scanner, a radiation image reading device and the like.

[0002]

2. Description of the Related Art Conventionally, a two-dimensional photoelectric conversion device has been used as an image reading device such as a scanner. In recent years, as a new application, it is expected to be applied to an X-ray detection device for medical use, for example, for chest imaging, and a large-area two-dimensional photoelectric conversion device and a device for converting X-rays into visible light. A large-area digital X-ray detector has been proposed by combining phosphors.

As such a large-area two-dimensional photoelectric conversion device, a pixel having a combination of an MIS sensor or a photodiode sensor made of amorphous silicon and a thin film transistor (TFT) is two-dimensionally placed on a substrate. The arrangement is used.

FIG. 8A is a plan view of one pixel of a conventional two-dimensional photoelectric conversion device. FIG. 8 (b) is the same as FIG.
2 shows a cross-sectional view taken along line AB. In the figure, S is a photodiode S as a sensor, and T is a thin film transistor T as a driving unit s. SIG indicates a signal wiring. gn
Denotes a gate wiring of the driving thin film transistor, and E denotes a common electrode between the sensors S.

In the figure, reference numeral 601 denotes a glass of the photoelectric conversion device.
Substrate, 602 is a gate electrode, 603 is a gate electrode 60
2, a gate insulating film 604 for protecting the gate insulating film 60;
2, a semiconductor layer 605 is formed on the semiconductor layer 60.
N formed on top of⁺Mold layer, 606 and 609
610 is an N-layer formed on the lower electrode layer 609. ⁺
Mold layer, 611 is N⁺Semiconductor formed on top of mold layer 610
The body layer 612 is formed of a P layer formed on the semiconductor layer 611.⁺
Mold layer, 613 is P⁺IT formed on top of mold layer 612
O and 614 are interlayer insulating layers, and 615 is a signal line SIG.
You.

Next, a manufacturing process of the photoelectric conversion device will be described with reference to FIG.

(1). A chromium film is formed over the substrate 601 by a sputtering method. A photoresist pattern having a desired shape is formed on the chromium film, the chromium film is etched using the photoresist pattern as a mask, and then the photoresist is peeled off to form a gate electrode 602 of the thin film transistor.

(2). Next, a plasma CV is formed thereon using SiH ₄ gas, NH ₃ gas, H ₂ gas or the like.
D forms a hydrogenated amorphous silicon nitride layer 603. Subsequently, a hydrogenated amorphous silicon layer 604 is formed by plasma CVD using SiH ₄ gas, H ₂ gas or the like. Further, an N ⁺ -type hydrogenated microcrystalline silicon layer 605 is formed by plasma CVD using SiH ₄ gas, PH ₃ gas, H ₂ gas or the like.

(3). Next, a photoresist pattern of contact holes and isolation is formed by a photolithography process, and using this as a mask, a hydrogenated amorphous silicon nitride layer, a hydrogenated amorphous silicon layer, and an N ⁺ type hydrogenated microcrystal are formed by dry etching. By partially removing the silicon layer, removing the photoresist, and performing cleaning, contact hole formation and isolation are performed. Then, an aluminum film is formed thereon by a sputtering method.

(4). Thereafter, a photoresist pattern is formed in a desired shape on the aluminum film, and etching is performed using the photoresist pattern as a mask, and the photoresist is removed and washed to form a drain electrode 6 of the thin film transistor.
07, source electrode 608, lower electrode 60 of the photoelectric conversion element
6,609.

(5). Then, the exposed portion of the N ⁺ -type hydrogenated microcrystalline silicon layer is dry-etched to form a channel portion of the thin film transistor.

Next, a photoelectric conversion element (PIN photodiode) is manufactured on the substrate on which the TFT is formed as follows.

(6). SiH ₄ gas, PH ₃ gas, H ₂
An N ⁺ -type hydrogenated microcrystalline silicon layer 610 is formed by plasma CVD using a gas or the like. Then, SiH ₄
A hydrogenated amorphous silicon layer 611 is formed by plasma CVD using a gas, H ₂ gas, or the like. Furthermore, SiH ₄
Plasma C using gas, B ₂ H ₆ gas, H ₂ gas, etc.
A P ⁺ -type hydrogenated microcrystalline silicon layer 612 was formed by VD. Then, ITO (Indium Tin O 2) is used as a transparent conductive film.
xide) A film is formed by a vapor deposition method.

Next, a photoresist pattern having a desired shape is formed, and ITO is etched using the photoresist pattern as a mask. Thereafter, etching is performed using the photoresist as a mask, and the photoresist is removed and washed. Then, the upper electrode 613 of the photoelectric conversion element is formed.

(7). A photoresist pattern for isolation is formed by a photolithography process, and a P ⁺ -type hydrogenated microcrystalline silicon layer, a hydrogenated amorphous silicon layer, and an N ⁺ -type hydrogenated microcrystalline silicon layer are partially removed by dry etching. The photoelectric conversion element is isolated by removing the resist and washing.

(8). Subsequently, SiH ₄ gas, NH ₃
A hydrogenated amorphous silicon nitride layer 614 is formed as an interlayer insulating film by plasma CVD using a gas, H ₂ gas, or the like. Then, a contact hole reaching the drain electrode 607 is formed in the hydrogenated amorphous silicon nitride layer 614, and then an aluminum film is formed and patterned to form a signal line 615. Finally, a protective layer (not shown) is provided.

[0017]

However, in the large-area two-dimensional photoelectric conversion device as shown in FIG. 8, the length of signal wiring, gate wiring and the like cannot be ignored during photoelectric conversion. That is, the responsiveness of a signal is limited by the wiring resistance and the wiring capacitance, and high-speed operation of the photoelectric conversion device becomes difficult.

Light is incident on the substrate from the gap between the wirings and between the pixels, and the light reflected on the back surface of the substrate is incident on the photoelectric conversion element again to cause optical crosstalk or to cause the TFT to have a crosstalk. The incident light causes an increase in the leak current of the TFT, resulting in deterioration of image quality. Conventionally, light shielding of a TFT has been performed by providing a light shielding member (a metal film or a resin containing a pigment) on a protective layer of the TFT. However, the process of forming the light shielding member is added, and the yield and cost are reduced. And other problems.

(Purpose) An object of the present invention is to provide a photoelectric conversion device which operates at high speed without lowering the image quality and sensitivity.

[0020]

According to the present invention, there is provided a photoelectric conversion apparatus comprising: a plurality of pixels each having a photoelectric conversion element and a switching element connected to the photoelectric conversion element; and a wiring connected to the pixel. The wiring is formed so as to block light incident on a region other than the region of the photoelectric conversion unit of the photoelectric conversion element.

Further, in a photoelectric conversion device including a plurality of pixels each having a photoelectric conversion element and a switching element connected to the photoelectric conversion element, and a wiring connected to the pixel, the wiring is a photoelectric conversion element of the switching element. It is characterized in that it is formed so as to block light incidence on an area other than the area of the conversion section.

Further, in a photoelectric conversion device comprising a plurality of pixels each having a photoelectric conversion element and a plurality of switching elements each composed of a thin film transistor connected to the photoelectric conversion element, and a wiring connected to the pixel,
The thin film transistor is formed so as to block light incident on at least a channel portion of the thin film transistor.

Further, the first electrode, an insulating layer for preventing passage of electrons and holes, a photoelectric conversion semiconductor, an injection element layer for preventing injection of holes into the photoelectric conversion semiconductor, and a second electrode. Photoelectric conversion elements laminated in order, and
During a refresh operation, an electric field is generated in the photoelectric conversion element so as to guide holes from the photoelectric conversion semiconductor to the second electrode. During a photoelectric conversion operation, holes generated by light incident on the photoelectric conversion semiconductor layer are generated by the photoelectric conversion element. A plurality of pixels each including a switch element connected to the photoelectric conversion element so as to remain in the conversion reaction body and to detect electrons as the photoelectric conversion element signal so as to guide electrons to the second electrode are arranged two-dimensionally. , A wiring connected to these pixels,
In the photoelectric conversion device which is to perform the detection of the photoelectric conversion signal from each pixel by controlling the switching element, the width of the wiring and is W, the interval between the first electrode and W _1, and wherein When the interval between the photoelectric conversion units is W ₂ , when the first electrode includes the region of the photoelectric conversion unit inside, the first electrode is formed so as to satisfy W ₁ ≦ W ≦ W ₂ , and the photoelectric conversion unit is formed. Is formed such that W ₂ ≦ W ≦ W ₁ holds when the first electrode region includes the first electrode region inside.

(Operation) The wiring width is widened without lowering the aperture ratio of the pixel, and the wiring resistance is reduced.

[0025]

(Embodiment 1) MI of this embodiment
A two-dimensional photoelectric conversion device in which an S-type sensor and a thin film transistor are combined will be described with reference to FIGS.
FIG. 1A is a plan view of one pixel of the photoelectric conversion device. FIG. 1B is a cross-sectional view taken along a line AB in FIG. FIG. 2 is a diagram showing an equivalent circuit of one pixel of the photoelectric conversion device. In the figure, S is a MIS type sensor,
T is a thin film transistor.

In FIG. 1, 101 is the glass substrate of the photoelectric conversion device, 103 is the gate electrode, and 105 is the gate electrode 1.
A gate insulating film for protecting the gate insulating film,
The semiconductor layer 107 formed on the top of the semiconductor layer 05 is the semiconductor layer 1.
N ⁺ -type layer formed on top of 06, 102 is a lower electrode of MIS sensor, 108 is an insulating layer formed on lower electrode 102, 109 is a semiconductor layer formed on insulating layer 108, 110 Is N formed on the semiconductor layer 109.
⁺ Type layer, 111 is a drain electrode, 112 is a source electrode,
Reference numeral 113 denotes a common wiring disposed between the sensors, 114 denotes an interlayer insulating layer, and 115 denotes a signal line.

In the figure, 1 which constitutes the MIS type photoelectric conversion element
Reference numeral 10 denotes an N ⁺ -type hydrogenated microcrystalline silicon layer, which functions as a window layer. As described later, this N ⁺ -type hydrogenated microcrystalline silicon layer 110 also functions as an injection blocking layer (blocking layer) and an upper electrode. The thin film transistor and the photoelectric conversion element are both formed by the same process, and both have a MIS structure. As described above, in the present embodiment, since the MIS sensor is used, there is an advantage that the film configurations of the sensor unit S and the thin film transistor unit T can be made identical and can be manufactured simultaneously.

The pixel of the photoelectric conversion device shown in FIG.
MIS type optical sensor S11 applied by voltage source Vs
And a driving thin-film transistor T11 as a photoelectric conversion element driving unit. SIG is a signal wiring, g1
Denotes a gate line of the driving thin film transistor, and D and G denote an upper electrode and a lower electrode of the MIS sensor, respectively. Cgs, Cgd
Is the gate and source electrodes of the driving thin film transistor,
This is the capacitance due to the overlap with the drain electrode.

The electric charge generated by the light incident on the sensor S11 of the pixel of the photoelectric conversion device is stored in the thin film transistor T11.
Through Cgs and Cgd. Then, the charge is read by a read circuit (not shown). FIG. 2 illustrates one pixel, but in actuality, Cgs and Cgd are the sums of those of the other thin film transistors connected to the gate line g1.

Next, the operation of the MIS sensor according to this embodiment will be described with reference to FIG.

FIGS. 3A and 3B are energy band diagrams of the photoelectric conversion element showing the operation of the sensor in the refresh mode and the photoelectric conversion mode, respectively. In the figure, reference numeral 1 denotes a D electrode, 2 denotes an N ⁺ -type hydrogenated microcrystalline silicon layer which is an injection blocking layer which blocks holes from being injected into the D electrode 1, and 3 denotes an intrinsic hydrogenated amorphous which is a photoelectric conversion semiconductor layer. The silicon layer 4 is a hydrogenated amorphous silicon nitride layer that is an insulating layer that blocks passage of electrons and holes, and the reference numeral 5 is a G electrode. Further, black circles indicate holes, and white circles indicate electrons.

In the refresh mode (a), since the D electrode 1 has a negative potential applied to the G electrode 5, the hole indicated by a black circle in the intrinsic hydrogenated amorphous silicon layer 3 is formed. Is guided to the D electrode 1 by an electric field. At the same time, electrons indicated by open circles are injected into the intrinsic hydrogenated amorphous silicon layer 3.

At this time, a part of the hole and a part of the electron recombine and disappear in the N ⁺ -type hydrogenated microcrystalline silicon layer 2 and the intrinsic hydrogenated amorphous silicon layer 3. Therefore, if this state continues for a long time, the number of holes in the intrinsic hydrogenated amorphous silicon layer 3 decreases.

Then, in the photoelectric conversion mode (b),
Since a positive potential is applied to the D electrode 1 with respect to the G electrode 5, electrons in the intrinsic hydrogenated amorphous silicon layer 3 are guided to the D electrode 1. However, holes are not introduced into the intrinsic hydrogenated amorphous silicon layer 3 because the N ⁺ -type hydrogenated microcrystalline silicon layer 2 functions as an injection blocking layer.

When light enters the intrinsic hydrogenated amorphous silicon layer 3 in this state, electron-hole pairs are generated in the intrinsic hydrogenated amorphous silicon layer 3. Among them, the electrons are guided to the D electrode 1 by the electric field, while the holes move in the intrinsic hydrogenated amorphous silicon layer 3 and reach the interface with the hydrogenated amorphous silicon nitride layer 4. However, since this hole is blocked at the interface with the hydrogenated amorphous silicon nitride layer 4, the hole stays in the intrinsic hydrogenated amorphous silicon layer 3.

Then, a current flows from the G electrode 5 to a detector (not shown) in order to maintain electrical neutrality in the element. Since this current corresponds to the number of electron-hole pairs generated by light, it is proportional to the intensity of incident light. Since this sensor actually acts as a capacitor, this current is stored here and read out by this and the TFT.

Next, the configuration of a photoelectric conversion device using the above-described photoelectric conversion element will be described with reference to FIG. In FIG. 4, a pixel is composed of one photoelectric conversion element S and a capacitor C
And a transistor T. In this photoelectric conversion device, a total of 9 pixels of 3 × 3 are divided into three blocks for each column. That is, one block is composed of three pixels.

In the figure, S11 to S33 indicate photoelectric conversion elements S. T11 to T33 indicate transistors for driving signal transfer. Vs is a power supply for reading out an electric signal obtained by photoelectric conversion, and Vg is a power supply for refreshing. These are the switches SW
s, all the photoelectric conversion elements S11 to S through the switch SWg
It is connected to 33 G electrodes. The switch SWs is connected via an inverter, and the switch SWg is directly connected to the refresh control circuit RF. The switch SWg is controlled to be turned on during the refresh period. Further, a portion surrounded by a broken line in the figure is formed on the same insulated substrate having a large area.

Next, the operation of the photoelectric conversion device will be described. The signal output of each photoelectric conversion element S is stored in the photoelectric conversion element S itself. Then, the shift register (SR
The transistor T is turned on by the output signal of 1),
A current corresponding to the accumulated charge flows through the signal wiring SIG. The signal read out in this manner is used as a detection integrated circuit IC.
And the switch S controlled by the control signal output from the shift register (SR2) is turned on,
Detection is performed.

More specifically, the electric signals output from each pixel of one block are simultaneously read out to the signal wiring SIG, and are collectively transferred to the detection integrated circuit IC by the shift register (SR2). And the detection integrated circuit I
The electric signal transferred to C is amplified by Amp and output (Vout).

Next, a manufacturing process of the above-described photoelectric conversion device will be described with reference to FIG.

(1). Insulating substrate 101 such as cleaning glass
On top, chromium, for example, 500 °
Form a film. A pattern of a photoresist having a desired shape is formed on the chromium film, the chromium film is etched using the photoresist as a mask, and then the photoresist is peeled off and washed, and then the gate electrode of the thin film transistor of each pixel is formed. 103, the lower electrode 102 of the MIS type optical sensor is formed (FIG. 5A).

(2). Next, the gate electrode 103, MI
On the lower electrode 102 of the S-type optical sensor, SiH ₄ gas, N
The hydrogenated amorphous silicon nitride layers 105 and 108 are formed by plasma CVD using H ₃ gas, H ₂ gas, or the like. Then, hydrogenated amorphous silicon layers 106 and 10 are formed by plasma CVD using SiH ₄ gas, H ₂ gas, or the like.
9 was formed. Furthermore, SiH ₄ gas, PH ₃ gas, H
_The N ⁺ -type hydrogenated microcrystalline silicon layers 107 and 110 are formed by plasma CVD using _two gases or the like.
(B)).

(3). Next, a photoresist pattern of contact holes and isolation is formed by a photolithography process, and using this as a mask, a hydrogenated amorphous silicon nitride layer, a hydrogenated amorphous silicon layer, and an N ⁺ type hydrogenated microcrystal are formed by dry etching. By partially removing the silicon layer, removing the photoresist, and performing cleaning, contact hole formation and isolation are performed. Then, an aluminum film is formed thereon by sputtering, for example, 5000
Å Film formation.

(4). Thereafter, a photoresist pattern having a desired shape is formed on the aluminum film, etching is performed using the photoresist pattern as a mask, and the photoresist is removed and washed, so that the drain electrode 111 of the thin film transistor, the source electrode 112, and the sensor The wiring 113 is formed. At this time, the aluminum film on the MIS sensor is removed, and most of the upper electrode 110 is exposed by the N ⁺ -type hydrogenated microcrystalline silicon layer (FIG. 5C).

(5). Then, the exposed portion of the N ⁺ -type hydrogenated microcrystalline silicon layer is etched to form a channel.

(6). Subsequently, SiH ₄ gas, NH ₃
A hydrogenated amorphous silicon nitride layer 114 is formed as an interlayer insulating layer by plasma CVD using a gas, H ₂ gas or the like, for example, at 3000 °. After that, a photoresist pattern is formed in a desired shape on the hydrogenated amorphous silicon nitride layer, and using this as a mask, the hydrogenated amorphous silicon nitride layer on the drain electrode portion of the thin film transistor is etched, and the photoresist is etched. Peeling and cleaning are performed to form a contact hole (FIG. 5D).

(7). After forming the contact hole, aluminum is formed to a thickness of 1 μm by a sputtering method, and a contact is made with the drain electrode 111 of the thin film transistor.

(8). Then, a photoresist pattern is formed in a desired shape on the aluminum film,
Using this as a mask, etching is performed, and photoresist stripping and cleaning are performed to form signal lines 115. Finally, a protective layer (not shown) is provided (FIG. 5E).

This embodiment is characterized by the structure of the signal wiring 115 made of the third metal layer. That is, FIG.
, The width of a part of the signal wiring SIG is W,
In the corresponding portion, 2 adjacent to the AB direction
The gap between the lower electrodes of one pixel is W ₁ , and the gap between the photoelectric conversion units is, in this embodiment, the upper electrode of the sensor is smaller than the lower electrode. When _2, is performed alignment signal line SIG so as to satisfy the relationship of W ₁ ≦ W ≦ W _2. Further, the aperture ratio of the pixel can be set to approximately 45%, and alignment of the signal lines can be performed without reducing the aperture ratio.

In the present embodiment, as shown in FIG. 1A, the relationship of W ₁ ≦ W ≦ W ₂ is satisfied also in the TFT portion, and the TFT portion, particularly the channel portion, Since the light is shielded by the wiring SIG, there is no increase in the leak current of the TFT due to the incidence of light. Also, the gap between adjacent sensors is well shielded by the signal wiring SIG, and optical crosstalk is reduced. Further, the wiring resistance can be reduced to about half without reducing the aperture ratio.

In this embodiment, the width of the signal wiring is
Although the portion excluding the portion above the gate line is widened, the signal line having this width can be extended on the gate line in consideration of the allowable capacity of the cross portion with the gate line.

In this embodiment, the photoelectric conversion portion of the sensor S exists in a region sandwiched between the upper electrode 110 and the corresponding upper electrode 102 from above and below. As described above, since the area of the lower electrode 102 of the sensor S is made wider than the upper electrode 110 so as to include the area of the photoelectric conversion unit of the sensor S inside, the width W of the signal wiring is equal to the gap W _1. When,
It is manufactured under the conditions that satisfy the relationship of the gap W ₂ and W ₁ ≦ W ≦ W ₂ . However, the lower electrode of the sensor may be manufactured so that its area is included in the area of the photoelectric conversion portion of the sensor, that is, narrower than the upper electrode. In that case, W ₂ ≦ W ≦ W _The signal line is manufactured under the condition of ₁ . That is, in FIG. 1A, a lower electrode is formed in a region shown as the upper electrode 110, and an upper electrode is formed in a region shown as the lower electrode 102.

As described above, in this embodiment, in order to reduce the wiring resistance of the signal wiring, the wiring width is increased without reducing the aperture ratio. This is a solution in the case where the wiring resistance becomes a problem. A similar effect can be obtained by adopting a similar configuration not only for the signal line as in the present embodiment but also for the gate wiring.

With the structure described in this embodiment,
Since the light shielding of the TFT and the gap between the sensors can be shielded and the wiring width in the pixel can be increased as much as possible, the wiring resistance can be reduced without increasing the film thickness of the wiring.

(Embodiment 2) Next, a two-dimensional photoelectric conversion device constituted by using a combination of a PIN photodiode type sensor and a TFT will be described. FIG. 6A is a plan view of one pixel of the photoelectric conversion device. FIG. 6B is a cross-sectional view taken along a line AB in FIG. 6A. In FIG. 6A, parts having the same functions as those in FIG. 1A are denoted by the same reference numerals. Each pixel is configured using a photodiode type optical sensor S and a driving thin film transistor T as a photoelectric conversion element driving unit.

In the figure, reference numeral 501 denotes a glass substrate of a photoelectric conversion device, 502 denotes a gate electrode, 503 denotes a gate insulating film for protecting the gate electrode 502, 504 denotes a semiconductor layer formed on the gate insulating film 502, and 505 denotes a semiconductor. An N ⁺ -type layer formed on the layer 504, 506 and 509 are lower electrode layers, 510 is an N ⁺ -type layer formed on the lower electrode layer 509, and 511 is formed on the N ⁺ -type layer 510. The semiconductor layer 512 is a P ⁺ -type layer formed on the semiconductor layer 511, and 513 is an ITO layer formed on the P ⁺ -type layer 512.
A film 514 is an interlayer insulating layer, and 515 is a signal line.

In this embodiment, a PIN photodiode made of hydrogenated amorphous silicon is used as a sensor. Although the thin film transistor T is also formed using hydrogenated amorphous silicon, a thin film transistor that can operate at high speed using a material such as polycrystalline silicon may be used. Non-single-crystal silicon in the present invention means amorphous silicon, polycrystalline silicon, and microcrystalline silicon.

As in the present embodiment, a PIN is used as a sensor.
When a photodiode of the type is used, the photodiode and T
FT means that a separate film formation process is required and the number of processes increases, which increases costs. However, it is possible to optimize the design such as the film thickness of the photodiode, thereby improving the characteristics of the photoelectric conversion device. There is an advantage that can be.

Next, a manufacturing process of the photoelectric conversion device of the present embodiment will be described with reference to FIG.

(1). Chromium, for example, is deposited to a thickness of 500 ° on a substrate 501 such as a cleaning glass by a sputtering method. A photoresist pattern having a desired shape is formed on the chromium film, the chromium film is etched using the photoresist pattern as a mask, and then the photoresist is peeled off to form a gate electrode 502 of the thin film transistor.

(2). Next, on this, SiH_FourMoth
S, NH_ThreeGas, H_TwoPlasma CV using gas
D to form a hydrogenated amorphous silicon nitride layer 503
For example, it forms 2,000 mm. Then, SiH_FourGas, H
_TwoHydrogenated amorphous silicon by plasma CVD using gas etc.
A recon layer 504 is formed at 1000 °. Furthermore, SiH
_FourGas, PH_ThreeGas, H_TwoPlasma C using gas
N by VD⁺Type hydrogenated microcrystalline silicon layer 505
For example, it is formed at 500 [deg.] (FIG. 7A).

(3). Next, a photoresist pattern of contact holes and isolation is formed by a photolithography process, and using this as a mask, a hydrogenated amorphous silicon nitride layer, a hydrogenated amorphous silicon layer, and an N ⁺ type hydrogenated microcrystal are formed by dry etching. By partially removing the silicon layer, removing the photoresist, and performing cleaning, contact hole formation and isolation are performed. Then, an aluminum film is formed thereon by 2,000 .ANG. By a sputtering method (FIG. 7B).

(4). Thereafter, a photoresist pattern is formed into a desired shape on the aluminum film, and etching is performed using the photoresist pattern as a mask, and the photoresist is removed and washed to form a drain electrode 5 of the thin film transistor.
07, source electrode 508, lower electrode 50 of the photoelectric conversion element
6,509 (FIG. 7C).

(5). Then, the exposed portion of the N ⁺ -type hydrogenated microcrystalline silicon layer is dry-etched to form a channel portion of the thin film transistor.

Next, on the substrate on which the TFT is formed, a photoelectric conversion element (PIN photodiode) is manufactured as follows.

(6). SiH ₄ gas, PH ₃ gas, H ₂
An N ⁺ -type hydrogenated microcrystalline silicon layer 510 is formed at, for example, 500 ° by plasma CVD using a gas or the like. Subsequently, a hydrogenated amorphous silicon layer 511 is formed at, for example, 5000 ° by plasma CVD using SiH ₄ gas, H ₂ gas or the like. Further, SiH ₄ gas,
A P ⁺ -type hydrogenated microcrystalline silicon layer 512 is formed at, for example, 500 ° by plasma CVD using B ₂ H ₆ gas, H ₂ gas, or the like. And, as a transparent conductive film, IT
An O (Indium Tin Oxide) film is formed, for example, by 2000 mm by an evaporation method.

Next, a photoresist pattern having a desired shape is formed, and the ITO film is etched using the photoresist pattern as a mask. Thereafter, etching is performed using the photoresist as a mask, and the photoresist is stripped and washed. The upper electrode 513 of the photoelectric conversion element (FIG. 7)
(D)).

(7). A photoresist pattern for isolation is formed by a photolithography process, and a P ⁺ -type hydrogenated microcrystalline silicon layer, a hydrogenated amorphous silicon layer, and an N ⁺ -type hydrogenated microcrystalline silicon layer are partially removed by dry etching. By performing resist peeling and cleaning, isolation of the photoelectric conversion element is performed.

(8). Subsequently, SiH ₄ gas, NH ₃
A hydrogenated amorphous silicon nitride layer 514 is formed as an interlayer insulating layer by, for example, 5000 ° by plasma CVD using a gas, H ₂ gas, or the like.

(9). A photoresist pattern for a contact hole is formed by a photolithography process, a part of the hydrogenated amorphous silicon nitride layer of the interlayer insulating layer is partially removed by dry etching, and the photoresist is removed and washed, thereby forming a photoresist pattern on the photoelectric conversion element. A contact hole is formed in the electrode portion and the drain electrode portion of the TFT. Then, aluminum is formed to a thickness of 1 μm by sputtering, and the drain electrode 507 of the thin film transistor and the upper electrode 51 of the photoelectric conversion element are formed.
Contact with No.3.

(10). Thereafter, the aluminum film is subjected to photoresist patterning into a desired shape, etching is performed, and the photoresist is removed and washed, so that the uppermost signal wiring (third layer) 515 and the common electrode of the photoelectric conversion element are formed. Wiring (not shown). Finally, a protective layer (not shown) is provided (FIG. 7).
(E)).

Also in this embodiment, the same as in the first embodiment
Then, as shown in FIG.
And the gap W between the lower electrodes₁, Between photoelectric conversion units
Gap W _TwoThen, these are W₁≤W≤W_Two Of the signal wiring SIG to satisfy the relationship
Is going. In this embodiment, the aperture ratio of the pixel is
Can be reduced to almost 50%.
In addition, alignment of signal wiring can be performed.

The TFT portion of the pixel is also shielded from light by the structure of the third-layer metal wiring.
Increases the leakage current. Also, the gap between the sensors is well shielded from light, and optical crosstalk is reduced. Further, the wiring resistance can be reduced to about half without reducing the aperture ratio.

In this embodiment, the width of the signal wiring except for the portion above the gate wiring is widened. However, the width of the signal wiring having a larger width is formed on the gate wiring in consideration of the capacity of the gate wiring and the cross portion. It can also be extended. Further, in the present embodiment, the signal wiring is arranged in the uppermost layer and the positional relationship with the sensor is defined. However, even in a configuration in which the gate wiring whose wiring resistance contributes to the characteristics is arranged in the uppermost layer, this gate wiring By defining the width similarly, the same effect as in the present embodiment can be obtained.

As described above, by adopting the structure of this embodiment, the light shielding of the TFT and the gap between the sensors can be shielded from light,
At the same time, the wiring width in the pixel can be increased as much as possible, so that the wiring resistance can be reduced without increasing the thickness of the wiring. In addition, since it can be manufactured by the conventional manufacturing process, while suppressing the increase in manufacturing costs,
A higher quality photoelectric conversion device can be manufactured.

[0077]

According to the photoelectric conversion device of the present invention, the width of the signal wiring can be increased without lowering the aperture ratio of the photoelectric conversion portion of the pixel. Therefore, the wiring resistance of the signal wiring can be reduced, so that the photoelectric conversion device can be operated at high speed without lowering image quality or sensitivity.

Further, since the space between the wirings and the space between the pixels can be reduced, it is possible to prevent light from being incident on the substrate. Therefore, it is possible to prevent the sensor from receiving the reflected light from the substrate, and it is possible to suppress optical crosstalk. Therefore, high quality image quality can be realized by the photoelectric conversion device of the present invention.

Further, the photoelectric conversion device of the present invention can be manufactured by the same process as the conventional process by using both the wiring and the light shielding material. Therefore, the photoelectric conversion device of the present invention can be manufactured at low cost by using the existing manufacturing process.

[Brief description of the drawings]

FIG. 1 is a plan view and a cross-sectional view of one pixel according to a first embodiment of the present invention.

FIG. 2 is an equivalent circuit of one pixel of the photoelectric conversion device according to the first embodiment of the present invention.

FIG. 3 is an energy band diagram of the MIS sensor according to the first embodiment.

FIG. 4 is an overall circuit diagram of a two-dimensional photoelectric conversion device according to an embodiment of the present invention.

FIG. 5 is a diagram illustrating a manufacturing process of the two-dimensional photoelectric conversion device according to the first embodiment.

FIG. 6 is a plan view and a cross-sectional view of one pixel according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating a manufacturing process of the two-dimensional photoelectric conversion device according to the second embodiment.

FIG. 8 is a plan view and a cross-sectional view of one pixel according to the related art.

[Explanation of symbols]

101, 501, 601 Glass substrate 102 Lower electrode 103, 502, 602 Gate electrode 105, 503, 603 Gate insulating film 106, 109, 504, 511, 604, 611 Semiconductor layer 107, 110, 505, 510, 605, 610 N
Type layer 111, 507, 607 Drain electrode 112, 508, 608 Source electrode 114, 514 Interlayer insulating layer 512, 612 P type layer 513, 613 ITO film S Photoelectric conversion element T Thin film transistor SIG Signal line gn Gate line RF power supply SR1, SR2 Shift register

Claims (12)

[Claims] 1. A photoelectric conversion device comprising: a plurality of pixels each having a photoelectric conversion element and a switching element connected to the photoelectric conversion element; and a wiring connected to the pixel, wherein the wiring is the photoelectric conversion element A photoelectric conversion device formed so as to block light incidence on a region other than the region of the photoelectric conversion unit. 2. The photoelectric conversion element includes a first electrode and a second electrode disposed so as to face each other so as to sandwich the photoelectric conversion unit, the width of the wiring is W, and the distance between the first electrodes is W _1.
And then, and the interval between the photoelectric conversion portion is taken as W _2, wherein when the first electrode includes a region of the photoelectric conversion unit on the inside is formed to W ₁ ≦ W ≦ W ₂ is satisfied, _{2. The} photoelectric conversion device according to claim 1, wherein when the photoelectric conversion unit includes the region of the first electrode inside, the photoelectric conversion unit is formed to satisfy W ₂ ≦ W ≦ W ₁ . 3. A plurality of pixels each having a photoelectric conversion element and a switching element connected to the photoelectric conversion element,
In the photoelectric conversion device provided with a wiring connected to the pixel, the wiring is formed so as to block light from entering a region other than a region of a photoelectric conversion portion of the switching element. 4. A photoelectric conversion device comprising: a plurality of pixels each including a photoelectric conversion element and a plurality of switching elements each including a thin film transistor connected to the photoelectric conversion element; and a wiring connected to the pixel. A photoelectric conversion device formed so as to block light incidence on at least a channel portion of the thin film transistor. 5. The photoelectric conversion device according to claim 3, wherein the wiring is formed so as to block light incident on a region other than the region of the photoelectric conversion unit of the photoelectric conversion element. 6. The wiring according to claim 1, wherein the wiring is a signal line for a read signal read from the photoelectric conversion element via the switching element. Photoelectric conversion device. 7. The photoelectric conversion device according to claim 1, wherein the wiring is made of a metal layer. 8. The photoelectric conversion unit of the photoelectric conversion element is made of non-single-crystal silicon, and the switching element is a thin-film transistor made of non-single-crystal silicon. Any one of to 7
Item 6. The photoelectric conversion device according to Item 1. 9. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion unit of the photoelectric conversion element includes a P-type layer, an I-type layer, and an N-type layer of non-single-crystal silicon. Photoelectric conversion device. 10. The photoelectric conversion device according to claim 1, wherein the pixels are arranged two-dimensionally. 11. A first electrode, an insulating layer for preventing passage of electrons and holes, a photoelectric conversion semiconductor, an injection element layer for preventing injection of holes into the photoelectric conversion semiconductor, and a second electrode. An electric field is generated in the photoelectric conversion element so that holes are led from the photoelectric conversion semiconductor to the second electrode during the refresh operation, and the photoelectric conversion element is incident on the photoelectric conversion semiconductor layer during the photoelectric conversion operation. A switch element connected to the photoelectric conversion element so that holes generated by light stay in the photoelectric conversion reaction body and electrons are detected as the photoelectric conversion element signal so as to guide electrons to the second electrode. A plurality of pixels arranged two-dimensionally, and a wiring connected to these pixels is provided, and the switch element is controlled to detect a photoelectric conversion signal from each of the pixels. In the photoelectric conversion device, the width of the wiring and W, the interval between the first electrode W which are
₁ , and when the interval between the photoelectric conversion units is W ₂ , when the first electrode includes the region of the photoelectric conversion unit inside, the first electrode is formed so as to satisfy W ₁ ≦ W ≦ W _2. When the photoelectric conversion unit includes the region of the first electrode inside, the photoelectric conversion unit is formed to satisfy W ₂ ≦ W ≦ W ₁ . 12. The photoelectric conversion device according to claim 11, wherein the switch element is formed of a thin film transistor, and the wiring is formed in the thin film transistor so as to block light from entering at least a channel portion.