JP2000113024A - Method and device for generating list - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate the design work by collectively changing parameters included in the circuit design data of respective modules while referring to provided identifiers(IDs) and generating a net list based on these changed parameters. SOLUTION: Plural modules including circuit design data necessary for designing a circuit are hierarchically linked and stored in a storage device 40. Respective IDs are applied to the module names of respective modules in a certain hierarchy as module suffixes, respective modules are read out from the storage device 40 to a RAM 16, parameters to be power supply names in the circuit design data of the modules to which the IDs are applied in the hierarchy concerned and that of modules in its lower hierarchies are collectively changed while referring to the IDs and a net list is generated based on these changed parameters.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for changing parameters in circuit design data required for circuit design, and more particularly to simplifying a design operation.
The present invention relates to a netlist generation method and a netlist generation device capable of improving design reliability and easily managing a cell library.

[0002]

2. Description of the Related Art Generally, when designing a semiconductor LSI,
Due to its large size, the circuit to be designed is divided into a plurality of functional blocks, and the functional blocks are divided into smaller cells. Is designed. For this reason, the circuit design data of each cell is recorded in each individual module, but the circuit design data of the functional block designed using these cells is recorded in the module with reference to the module of each cell. Further, circuit design data of a circuit to be designed using these functional blocks is recorded in the module with reference to the module of each functional block. Therefore, finally, the circuit design data of the circuit to be designed is stored in a storage device or the like in a state where a plurality of modules recording the circuit design data are hierarchically linked. When shifting from the circuit design stage to the layout stage, a netlist is generated by associating the circuit design data of each of these modules together, and the layout design is performed using this netlist.

On the other hand, in a semiconductor LSI, a plurality of power supplies may be used in a circuit in order to minimize the influence of power supply noise, and the connection state of these power supplies is changed in a layout design stage after a circuit design stage. May need to be done. In such a case, the power supply connection setting is performed again by returning to the circuit design stage.However, conventionally, when the power supply name, which is one of the parameters in the circuit design data, is changed after the design, for example, the name is changed. It reads out each module of all circuits using the power supply to be changed, displays it on the screen of a computer, etc., and changes the power supply name to a new power supply name while inputting with the keyboard etc. on the screen The change work was performed for all the use points.

[0004]

As described above, in the conventional parameter changing method, when the scale of the circuit to be designed is small and the number of circuits using the power supply whose name is to be changed is small, Although the change work does not require much effort, the scale of the circuit to be designed is large, and when the number of circuits using the power supply whose name is to be changed is large, the change work becomes not only enormous, but also However, mistakes and oversights are likely to occur during the change process. In particular, the power supply
Since they vary depending on the circuit design specifications, it has been difficult to manage them centrally by providing a common library or the like.

Accordingly, the present invention has been made in view of such unresolved problems of the conventional technology, and aims at facilitating design work and improving design reliability. Moreover, it is an object of the present invention to provide a netlist generation method and a netlist generation device that can easily manage a cell library.

[0006]

According to a first aspect of the present invention, there is provided a netlist generating method according to the present invention, wherein a plurality of modules including circuit design data necessary for designing a circuit are hierarchized. A method of generating a netlist in which the circuit design data of each module are linked and stored in a storage means and associated with the circuit design data of each module, and a predetermined identifier is added to a module name of the module in any hierarchy. Is given, the modules are read out from the storage means, and the parameters in the circuit design data of the module in the hierarchy of the module to which the identifier is given and in the lower hierarchy are collectively referred to by referring to the given identifier. And the netlist is generated based on the changed parameters.

According to a second aspect of the present invention, there is provided a netlist generating method according to the first aspect, wherein a plurality of modules including circuit design data necessary for designing a circuit are hierarchically arranged. A method of generating a netlist in which the circuit design data of each module is linked to each other and collectively associated with the circuit design data, wherein a predetermined name is assigned to each of the module names of the plurality of modules in different hierarchies When an identifier is provided, each module is read from the storage means, and when changing parameters in the circuit design data of the module in the highest hierarchical level and the lower hierarchical levels among the modules to which the identifier has been given, When looking at a higher layer from the own layer, the model of the closest layer among the plurality of identifiers is displayed. A process performed collectively with reference to the module given to the module name of the module, and parameters in the circuit design data of the module in the hierarchy of the highest module among the modules to which the identifier has been given and the hierarchy lower than this. And performing a batch change with reference to the identifier given to the highest one of the modules to which the identifier has been given, and generates the netlist based on the changed parameters.

Further, according to a third aspect of the present invention, in the netlist generating method according to any one of the first and second aspects, the storage means further comprises: A table in which the change rules are associated with each other is stored, and when the parameter is changed, the change rule is determined by the table based on the given identifier, and the circuit of the read module is determined based on the determined change rule. Change parameters in design data.

Further, according to a fourth aspect of the present invention, in the netlist generating method according to any one of the first to third aspects, the module name includes a module name and a module suffix. And provides the identifier as the module suffix.

Further, according to a fifth aspect of the present invention, in the netlist generating method according to any one of the first to fourth aspects, the parameter is a power supply name.

[0011] On the other hand, in order to achieve the above object, a netlist generating apparatus according to claim 6 of the present invention links a plurality of modules including circuit design data necessary for designing a circuit in a hierarchical manner. An apparatus for generating a netlist by associating circuit design data of each module with a predetermined identifier given to the module name of the module, An identifier acquiring unit that acquires the identifier from the module; a module reading unit that reads the module from the storage unit; and a parameter in the circuit design data of the module in a hierarchy of the module in which the identifier is acquired and a hierarchy lower than the hierarchy. Parameter changing means for collectively changing by referring to the acquired identifier, I was painting.

With this configuration, when an identifier is given to a module name of any of the modules in the storage means, the identifier is obtained from the module to which the identifier is given by the identifier obtaining means, and the module is read out. By means, each module is read from the storage means. When each module is read, the parameters in the circuit design data of all the modules in the hierarchy of the module to which the identifier is given and the hierarchy lower than the read module are acquired by the parameter changing means. The collective changes are made with reference to the changed identifiers, and a netlist is generated based on the changed parameters.

Here, when an identifier is given to each of the module names of a plurality of modules in different hierarchies,
When the parameters in the circuit design data of each module are changed, the identifier given to the module name of the module of the closest hierarchy when the higher hierarchy is viewed from its own hierarchy is referred to. I have.

According to a seventh aspect of the present invention, in the net list generating apparatus according to the sixth aspect, the storage means further associates the type of the identifier with a change rule. Remember the table,
The parameter change means determines a change rule by the table based on the acquired identifier, and changes a parameter in the circuit design data of the module based on the determined change rule.

With such a configuration, the change rule is determined by the parameter changing means in accordance with the table based on the acquired identifier, and the circuit design data of the module read out is read out based on the determined change rule. Is changed.

Further, according to an eighth aspect of the present invention, in the netlist generating apparatus according to any one of the sixth and seventh aspects, the module name includes a module name and a module suffix. And the identifier is given as the module suffix, and the identifier acquiring means acquires the module suffix of the module.

With such a configuration, the module suffix of the module is obtained by the identifier obtaining means.

According to a ninth aspect of the present invention, in the netlist generating apparatus according to any one of the sixth to eighth aspects, the parameter is a power supply name.

With such a configuration, the power supply name in the circuit design data of the read module is collectively changed with reference to the acquired identifier by the parameter changing means.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 to FIG. 5 are diagrams showing an embodiment of a netlist generation device according to the present invention.

In this embodiment, a net list generating apparatus according to the present invention is applied to realize a global net assign function for generating a net list necessary for all CAD tools including a layout. Specifically, in a state in which a plurality of modules including circuit design data necessary for designing a circuit are hierarchically linked, a net assignment is specified for the module, so that the circuit design data of each module is included. This is applied to a case where the power supply names of the power supply are changed collectively.

First, the configuration of the netlist generation device according to the present invention will be described. FIG. 1 is a block diagram showing the configuration of the netlist generation device according to the present invention.

The computer 10, as shown in FIG.
A CPU 12 for controlling calculations and the entire system based on a predetermined program;
And a ROM 14 storing the programs 2 and the like.
A RAM 16 for storing data read from the CPU 14 or the like and a calculation result required in a calculation process of the CPU 12;
A CRTC 18 converts data stored in the 16 specific areas into an image signal and outputs the image signal, and an I / F 20 that mediates input / output of data with an external device, and these transfer data. Bus 29 which is a signal line for
And are connected so as to be able to exchange data.

As an external device, an input device 30 such as a keyboard or a mouse capable of inputting data as a human interface, and a storage device 40 for storing modules and the like are connected to the I / F 20.

The RAM 16 is a VRAM that stores display data to be displayed on the display device 50 as a specific area.
The VRAM 17 includes the CPU 12 and the CR.
Access is possible independently with the TC 18.

A display device 50 for displaying the output image signal on the screen is connected to the CRTC 18.
Reference numeral 18 reads the display data stored in the VRAM 17 sequentially from the head address at a predetermined cycle, converts the read display data into an image signal, and outputs the image signal to the display device 50.

Next, data stored in the storage device 40 will be described with reference to FIG. FIG. 2 is a diagram showing a configuration of the net assignment definition table.

A plurality of modules are stored in the storage device 40 in a hierarchically linked manner. In some cases, the circuit design data of a module includes a circuit element (instance) using another module. In this case, the module name is used to identify the module that is the instance to be used. Is recorded. That is, a state in which modules are hierarchically linked refers to a state in which an instance is included in circuit design data of a certain module, and an instance is further included in circuit design data of the module as the instance.

Further, as shown in FIG. 2, in the storage device 40, a net assignment definition table defining how the power supply name in the circuit design data of the module is changed by the net assignment designation performed on the module. T
B is stored. The designation of the net assignment to be performed on the module means that an assignment suffix for instructing to change the power supply name in the circuit design data of the module according to a predetermined change rule is given as the suffix name of the module. That is, the net assignment definition table TB is a table in which a plurality of associations of such assignment suffixes and change rules are registered. For example, in FIG.
A changes the power supply name “V _DD ” to the power supply name “DRV _DD ”, changes the power supply name “V _SS ” to the power supply name “DRV _SS ”, and changes the power supply name “BV _DD ” to the power supply name “DRV _DD ”. "To change.

Next, the configuration of the CPU 12 and the processing executed here will be described with reference to FIG. FIG. 3 is a flowchart showing a process for designing and laying out a circuit.

The CPU 12 comprises a microprocessing unit MPU and the like. When designing and laying out a circuit, the CPU 12 activates a predetermined program stored in a predetermined area of the ROM 14 and executes the processing shown in the flowchart of FIG. It has become.

First, a process for designing and laying out a circuit will be described with reference to an example. CPU 12
When this processing is executed in, as shown in FIG.
The process proceeds to step S100 to perform circuit design and design verification using a general power supply name. The process proceeds to step S102, where a net assignment definition table TB is created. , The process proceeds to step S106, performs the net list generation processing according to the present invention, changes the power supply name in the circuit design data of the module in each layer, and proceeds to step S108. It is supposed to.

In step S108, a layout and layout verification are performed, and the process proceeds to step S110.
It is determined whether or not there is a correction related to the power supply name. If it is determined that there is a correction (Yes), the process proceeds to step S112, where the net assignment is specified only for the module at the highest level. The process returns to S106. On the other hand, when it is determined in step S110 that there is no correction related to the power supply name (No), a series of processing is terminated.

Next, steps S102, S104,
Details of each processing of S106 and S112 will be described with reference to FIG.

The net assignment definition table creation step S102 is described in detail in steps S200 and S20 in FIG.
2, the processing represented by S204, S206, and S208 is performed. That is, in step S102, as shown in FIG. 4, the process proceeds to step S200 to read the net assignment definition table TB from the storage device 40 to the RAM 16, and proceeds to step S202 to update the contents of the net assignment definition table TB. Whether to do so is displayed to the designer. If the content of the net assignment definition table TB is to be updated (Yes), the process proceeds to step S204, where the net assignment definition information defining the change rule for the assignment suffix is input from the input device 30, and the process proceeds to step S204.
The process moves to 206.

In step S206, the net assignment definition table TB is updated based on the input net assignment definition information, the process proceeds to step S208, and the updated net assignment definition table TB is stored in the storage device 40, and the process proceeds to step S202. I'm going back.

Next, a net assignment designation step S10
4 corresponds to steps S210, S212, S2 in FIG.
14. The processing represented by S218 is performed. That is,
If the contents of the net assignment definition table TB are not updated in step S202 (No), the process proceeds to step S210, and the respective modules are transferred from the storage device 40 to the RAM 16
Then, the process proceeds to step S212 to display to the designer whether or not the assignment suffix of the module is to be updated. If the assignment suffix is to be updated (Yes), the process proceeds to step S214 to input the assignment suffix. The parameters are input from the input device 30, and the process proceeds to step S218. In step S218, the updated module is stored in the storage device 40, and in step S212
To return to.

Further, a net list generation processing step S
In step 106, the processing represented by steps S220 and S221 in FIG. 4 is performed. That is, step S212
If the designer decides not to update the assignment suffix of the module in step (No), the process moves to step S220, and the power supply name change processing for generating a netlist while changing the power supply name in the circuit design data of the module Is executed, and the process proceeds to step S221 to store the netlist generated in the power supply name change process in the storage device 40,
In step S222, various verifications and automatic tool execution are performed, and the process returns to the original processing (step S108).

Next, the power supply name changing process in step S220 will be described with reference to FIG. FIG. 5 is a flowchart showing the power supply name changing process.

In the power supply name change processing, the power supply name in the circuit design data of each module is recursively changed from a higher hierarchy to a lower hierarchy, and the processing of the step S220 is executed. At this time, the module name of the module at the highest level and the assignment suffix name when the net assignment is specified for the module are given as arguments, and the process is called.

When the process is called in this manner, as shown in FIG. 5, the module name given as an argument is stored in a character variable module, and the assignment suffix given as an argument is stored in a character variable ass. -suff
ix, and the process proceeds to step S300, where the character variable
The module corresponding to the module name of the module is read from the storage device 40 to the RAM 16, and the process proceeds to step S302, where it is determined whether any assign suffix is stored in the character variable ass-suffix, and the character variable ass-suffix is determined.
If it is determined that an assign suffix is stored in the suffix (Yes), the process proceeds to step S304.

In step S304, the character variable ass-suff
ix, the change rule is determined based on the net assignment definition table TB based on the assign suffix, and all the power supply names in the circuit design data of the module read in step S300 are changed according to the determined change rule, and the process proceeds to step S306. Then, an instance in the circuit design data of the module read in step S300 is searched, and the process proceeds to step S308 to determine whether or not there is an instance.
(Yes) moves to step S310.

In step S310, the character variable cur-suff
ix stores the contents of the character variable ass-suffix in step S3.
The process proceeds to step 12, where it is determined whether the net assignment is specified for the module as the target instance, and it is determined that the net assignment is specified.
(Yes) moves on to step S314, where the character variable ass-
Determines whether any assign suffix is stored in the suffix, or whether the lower-level net assignment designation priority setting is valid.
Alternatively, when it is determined that the lower-level net assignment designation priority setting is valid (Yes), the process proceeds to step S316.

In this step S314, the lower-level net assignment designation priority setting means that when a higher-level module has already been assigned a net assignment, a different net assignment designation is set for a lower-level module. Is performed, when changing the power supply name in the circuit design data of the module in the lower hierarchy and the lower hierarchy, the net assignment specification performed for the upper one is changed. This is a setting as to whether or not to give priority to the net assignment designation performed for the lower order items. In other words, when this setting is valid, the net assignment specification made for the lower order has priority, but when this setting is invalid, the net assignment designation is made for the lower order. Also, ignoring this, priority is given to the net assignment specification made for the higher order one. This validity / invalidity setting is performed, for example, by switching the flag variable between “0” and “1”.

In step S316, the character variable cur-suff
ix, the assignment suffix of the target instance module is stored, the process proceeds to step S318, the module name of the target instance module is stored in the character variable cur-module, and the process proceeds to step S320.
This power supply change process is recursively called using the character variable cur-module and the character variable cur-suffix as arguments, and when the process returns, the process proceeds to step S322, and the next instance in the circuit design data of the module read out in step S300 And returns to step S308.

On the other hand, in step S314, the character variable ass-
If it is determined that an assign suffix is stored in the suffix, or if it is determined that the lower-level net assignment designation priority setting is invalid (No), the process proceeds to step S31.
8.

On the other hand, if it is determined in step S312 that the module that is the target instance has not been assigned a net assignment (No), the process proceeds to step S318.

On the other hand, when it is determined in step S308 that there is no instance in the circuit design data of the module read in step S300 (No), the process returns to the original processing (step S220 or step S322). Has become.

On the other hand, in step S302, the character variable
When it is determined that the assign suffix is not stored in the ass-suffix (No), the process proceeds to step S306.

Next, the operation of the above embodiment will be described with reference to the drawings. 6 to 8 are diagrams for explaining the operation of the embodiment of the netlist generation method according to the present invention.

Now, in step S100, the circuit was designed and verified using the power supply names "V _DD ", "V _SS ", "BV _DD ", and "BV _SS ". As a result, as shown in FIG. Assume that the circuit has been designed. That is, as shown in FIG. 6A, the uppermost layer includes, as instances, a module BLK-A, a module BLK-B, and a module BLK-C. As shown in FIG. 6B, BLK-A includes, as instances, a module A1 in which “V _DD ” is set as a power supply name to be used and a module A2 in which “V _SS ” is set as a power supply name to be used. ,It is included. In addition, the module
As shown in FIG. 6C, A1 includes a module DF1 as an instance and a module INV1 as an inverter circuit.
As shown in FIG. 6D, INV1 has a p-type MOS in which “V _DD ” and “BV _DD ” are set as power supply names to be used, and “V _SS ” and “BV _SS ” as power supply names to be used. Set n
And a type MOS.

Next, in step S104, FIG.
As shown in (a), a net assignment is specified for each of the modules BLK-A, BLK-B, and BLK-C in the highest hierarchy. Here, it is assumed that an assign suffix “.A” is given to the module BLK-A, an assign suffix “.T” is given to the module BLK-B, and an assign suffix “.R” is given to the module BLK-C.

Next, steps S104 and S10
6. Assuming that the updating of the net assignment definition table TB and the updating of the parameters in the circuit design data of the module have been appropriately performed through steps S200 to S218, the net assignment definition table TB is referred to in step S220. The power supply names in the circuit design data of the modules in the upper hierarchy and the lower hierarchy are changed. The lower-level net assignment designation priority setting is invalidated.

The process of changing the power supply name will be specifically described. First, in step S304, the power supply name is not changed because there is no power supply name to be changed. Since there is an instance, the module BLK-A is detected first in step S308. Next, in step S312, it is determined that the net assignment has been specified for the module BLK-A. Therefore, in steps S316 and S318, the assignment suffix ".A" of the module BLK-A is determined.
Is stored in the character variable cur-suffix, and the module name “BLK-A” of the module BLK-A is changed to the character variable cur-modu.
stored in le. Then, the power supply name change processing is recursively called using the character variable cur-module and the character variable cur-suffix as arguments.

When the recursive processing is executed, step S30
7, as shown in FIG. 7B, according to the change rule corresponding to the assignment suffix “.A” of the net assignment definition table TB, the power supply name “used by the module A1 in the circuit design data of the module BLK-A” “V _DD ” is changed to a new power supply name “DRV _DD ”, and the power supply name “V _SS ” used by the module A2 is changed to a new power supply name “DRV _SS ”. Next, since there are two instances in the module BLK-A, the module A1 is detected first, and the contents of the character variable ass-suffix, that is, the assignment suffix ".A" is stored in the character variable cur-suffix.
Since it is determined that the net assignment is not specified for A1, the module name “A1” of the module A1 is stored in the character variable cur-module. And this character variable cu
The power supply name change process is recursively called with the r-module and the character variable cur-suffix as arguments.

When the recursive processing is executed, the power supply name is not changed because there is no power supply name to be changed.
As shown in FIG. 7C, since there are two instances in module A1, module INV1 is detected first,
The contents of the character variable ass-suffix are stored in the character variable cur-suffix. Next, since it is determined that the net assignment is not specified for the module INV1, the module
The module name “INV1” of INV1 is stored in the character variable cur-module. Then, the power supply name change processing is recursively called using the character variable cur-module and the character variable cur-suffix as arguments.

When the recursive processing is executed, as shown in FIG. 7D, according to the change rule corresponding to the assignment suffix “.A” of the net assignment definition table TB, the p-type The power supply names “V _DD ” and “BV _DD ” used by the MOS are replaced with new power supply names “DRV”.
_DD ”and“ DRV _DD ”, and the power supply names“ V _SS ”and“ BV _SS ”used by the n-type MOS are replaced with new power supply names“ DR
V _SS "," but is changed to DRV _SS ", module INV1
Since there is no instance in, the processing is returned to the original processing.

When the process returns, the process returns to FIG.
The power supply name change processing is executed for the module DF1 of the module A1. When the power supply name change processing for the module DF1 ends, there is no unprocessed instance in the module A1, so that the processing is returned to the original processing. When the process returns, the process returns to FIG. 7B, and the module BLK-A
Of the module A2 is executed. When the power supply name change processing for the module A2 ends, there is no unprocessed instance in the module BLK-A, so that the processing is returned to the original processing.

When the process is further restored, the process returns to FIG. 7A, and the power supply name change process for the module BLK-B is executed in the highest hierarchy, but the net assignment is specified for the module BLK-B. Is performed, the power supply name in the circuit design data of the module in the lower hierarchy is changed based on the assignment suffix “.T” of the module BLK-B. Next, the power supply name change processing for the module BLK-C is executed in the highest hierarchy. However, since the net assignment is also specified for the module BLK-C, the module name in the lower hierarchy is determined. The power supply name in the circuit design data is changed based on the assignment suffix ".R" of the module BLK-C. When the power supply name change processing for the module BLK-C is completed, there is no unprocessed instance in the uppermost hierarchy, and thus a series of processing is completed.

As described above, the net list is generated while changing the power supply name with reference to the assigned suffix. After a series of processing is completed, in step S221, the generated net list is generated. The list is stored in the storage device 40.

Next, a case will be described in which the net assignment is specified not only for the module in the highest hierarchy but also for the module A1 in the lower hierarchy. In this case, the lower-level net assignment designation priority setting is enabled.

The operation up to the change of the power supply name of the module BLK-A is the same as that described above, and the description is omitted.
The subsequent operation will be described. When the module A1 is detected in step S308, as shown in FIG. 8B, it is determined in step S312 that the net assignment has been specified for the module A1, so the assignment suffix “ .D ”is stored in the character variable cur-suffix and the module A1
Is stored in the character variable cur-module. And this character variable cur-module and character variable cu
Power supply name change processing is called recursively with r-suffix as an argument.

When the recursive processing is executed, the power supply name is not changed because there is no power supply name to be changed.
As shown in FIG. 8C, since there are two instances in module A1, module INV1 is detected first,
The contents of the character variable ass-suffix are stored in the character variable cur-suffix. Next, since it is determined that the net assignment is not specified for the module INV1, the module
The module name “INV1” of INV1 is stored in the character variable cur-module. Then, the power supply name change processing is recursively called using the character variable cur-module and the character variable cur-suffix as arguments.

When the recursive processing is executed, as shown in FIG. 8D, according to the change rule corresponding to the assignment suffix “.D” of the net assignment definition table TB, the p-type The power supply names “V _DD ” and “BV _DD ” used by the MOS are replaced with the new power supply name “D
V _DD ",""is changed to, the power supply name n-type MOS is to _{use" DV DD V SS ","} BV SS " a new power name" D
V _SS "," but is changed to DV _SS "omitted, since there is no instance of this module INV1, which is caused to return to the original process. Even after the processing has returned, and a description is therefore the same.

In the above description, if an assignment suffix is given to a suffix name in a state where nothing is set to the suffix name of the module, the power supply name is changed with reference to the assigned suffix, and the change is made. A netlist is generated based on the contents, but if the suffix name of the module has already been assigned an assignment suffix and the assignment suffix is set to a new assignment suffix, the new assignment suffix will be referenced Then, the power supply name is changed, and a netlist is generated based on the change.

When an assignment suffix is already given to a module suffix name and the assignment suffix is deleted, a netlist is generated with the power supply name set in the circuit design data of the module. Is done.

As described above, the storage device 40 in which a plurality of modules are hierarchically linked and stored is provided, and when a net assignment is designated for a module, an assign suffix is obtained from the module, and the obtained assign suffix is obtained. The power supply names in the circuit design data of the module in the hierarchy of the module for which the net assignment was specified and the lower hierarchy are changed in accordance with the change rule corresponding to the power supply connection. The design itself does not take into account the design itself, since it is only necessary to change the required power supply name by specifying the net assignment for the module that needs to be divided in the latter half of the design. In addition, it is easy to make corrections and changes. In addition, since the power supply names in the circuit design data of the module in the hierarchy lower than the hierarchy of the module for which the net assignment is specified are changed at a time, the possibility of mistakes or oversights in the change process can be reduced. Furthermore, it is only necessary to prepare cells on the design side for one layout, which facilitates the management of the cell library. Also, since there is a one-to-one correspondence between design data and layout, there is a possibility that a design error may occur. Can be reduced.

Therefore, design work can be performed more easily than before, design reliability can be improved, and cell library management can be performed more easily.

Further, when the net assignment is specified for a plurality of modules in different hierarchies, the module of the highest level among the modules to which the net assignment is specified and the modules in the lower hierarchy are read out from the storage device 40, When changing the power supply name in the circuit design data of each read module, refer to the assignment suffix given to the module of the closest hierarchy when looking at the higher hierarchy from its own hierarchy. Is selectively performed depending on the validity / invalidity of the lower-level net assignment designation priority setting, so that the power supply name in the circuit design data of the module can be finely changed.

Further, the net assignment definition table TB
Is stored in the storage device 40, a change rule is determined by the net assignment definition table TB based on the obtained assignment suffix, and the power supply name in the circuit design data of the read module is changed according to the determined change rule. Therefore, by simply defining a plurality of desired change rules in the net assignment definition table TB and giving an assignment suffix as a suffix name, the desired plurality of power supply names can be changed collectively. The procedure can be easily performed, and the power supply name in the circuit design data of the module can be finely changed.

Also, an assignment suffix for instructing to change the power supply name in the circuit design data of the module is given as the suffix name of the module, and when the power supply name is changed, the suffix of the module is obtained. , The net assignment can be easily specified for the module, so that the design work can be performed more easily.

In the above embodiment, the power supply name in the circuit design data of the module is changed. However, the present invention is not limited to this, and other parameters in the circuit design data of the module may be changed. You may comprise.

Further, in the above-described embodiment, in executing the processing shown in the flowcharts of FIGS. 3 to 5, the case where a program stored in the ROM 14 is executed has been described, but the present invention is not limited to this. Alternatively, the program may be read from a recording medium on which a program indicating these procedures is recorded, loaded into the RAM 16, and executed.

Here, the recording medium is a semiconductor storage medium such as a RAM or a ROM, a magnetic storage type storage medium such as an FD or HD, an optical reading type storage medium such as a CD, CDV, LD, or DVD; It is a magnetic storage type / optical readout type storage medium, and includes any storage medium that can be read by a computer irrespective of an electronic, magnetic, optical or other reading method.

In the above embodiment, the assignment suffix corresponds to the identifier according to claims 1 to 4 or 6 to 8, and the storage device 40 stores the storage according to claim 1 to 4 or 6 or 7. It corresponds to the means.

[0076]

As described above, according to the netlist generating method according to the first to fourth aspects of the present invention, the design work can be performed more easily and the reliability of the design can be improved as compared with the related art. The effect is that the cell library can be easily managed and the cell library can be easily managed.

Further, according to the netlist generation method according to the second aspect of the present invention, it is possible to obtain an effect that the parameters in the circuit design data can be finely changed.

Furthermore, according to the netlist generation method of the third aspect of the present invention, the procedure for changing the parameters can be easily performed, and the parameters in the circuit design data can be finely changed. The effect that can be obtained is also obtained.

Further, according to the netlist generating method according to the fourth aspect of the present invention, an effect is obtained that the procedure for changing the parameters can be more easily performed.

Further, according to the netlist generating method according to the fifth aspect of the present invention, an effect is obtained that the method can be suitably applied to a case where a power supply name in circuit design data is changed.

On the other hand, according to the netlist generating apparatus according to the sixth to ninth aspects of the present invention, design work can be performed easily and design reliability can be improved as compared with the related art. An effect is obtained that the cell library can be easily managed.

Further, according to the netlist generating apparatus of the present invention, the procedure for changing the parameters can be easily performed, and the parameters in the circuit design data can be finely changed. The effect that can be obtained is also obtained.

Further, according to the netlist generating apparatus of the eighth aspect of the present invention, the effect that the procedure for changing the parameter can be more easily performed can be obtained.

Further, according to the netlist generating apparatus of the ninth aspect of the present invention, there is obtained an effect that the present invention can be suitably applied to a case where a power supply name in circuit design data is changed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a netlist generation device according to the present invention.

FIG. 2 is a diagram showing a configuration of a net assignment definition table.

FIG. 3 is a flowchart illustrating a process for designing and laying out a circuit.

FIG. 4 is a flowchart illustrating a net list generation process.

FIG. 5 is a flowchart showing a power supply name change process.

FIG. 6 is a diagram for explaining the operation of the embodiment.

FIG. 7 is a diagram for explaining the operation of the embodiment.

FIG. 8 is a diagram for explaining the operation of the embodiment.

[Explanation of symbols]

 10 Computer 12 CPU 14 ROM 16 RAM 17 VRAM 18 CRTC 29 Bus 30 Input Device 40 Storage Device 50 Display Device TB Net Assignment Definition Table

Claims (9)

[Claims] 1. A network in which a plurality of modules including circuit design data necessary for designing a circuit are hierarchically linked and stored in a storage unit, and a network is created by associating the circuit design data of each module. A method for generating a list, comprising: when a predetermined identifier is given to a module name of the module in any hierarchy, the respective modules are read from the storage unit, and the hierarchy of the module to which the identifier is assigned and a lower hierarchy A netlist generation method, wherein parameters in circuit design data of the module in a hierarchy are collectively changed with reference to the given identifier, and the netlist is generated based on the changed parameters. 2. A network in which a plurality of modules including circuit design data necessary for designing a circuit are hierarchically linked and stored in a storage means, and a network is created by associating the circuit design data of each module with each other. A method of generating a list, wherein when a predetermined identifier is given to each of a plurality of module names of the plurality of modules in different hierarchies, each of the modules is read from the storage means, and When changing the parameters in the circuit design data of the module in the layer of the object and the layer lower than this, the module name of the module of the closest layer among the plurality of identifiers when looking at the higher layer from the own layer A process performed collectively by referring to the module given to the A process of collectively changing parameters in the circuit design data of the module in the higher hierarchy and in the lower hierarchy with reference to the identifier given to the highest one of the modules given the identifier; and , And selectively generating the netlist based on the changed parameters. 3. The storage device according to claim 1, wherein the storage unit further stores a table in which a type of the identifier is associated with a change rule. A change rule determined by the table based on the determined identifier, and a parameter in the circuit design data of the read module is changed based on the determined change rule. 4. The netlist generation method according to claim 1, wherein the module name includes a module name and a module suffix, and the identifier is given as the module suffix. . 5. The method according to claim 1, wherein the parameter is a power supply name. 6. When a plurality of modules including circuit design data necessary for designing a circuit are hierarchically linked and stored in storage means, and when a predetermined identifier is given to the module name of the module, An apparatus for generating a netlist in which circuit design data of each module is associated with each other, and an identifier acquisition unit that acquires the identifier from a module name of the module, and a module reading unit that reads the module from the storage unit. Parameter changing means for collectively changing parameters in the circuit design data of the module in the hierarchy of the module from which the identifier has been obtained and in the hierarchy lower than the module with reference to the obtained identifier. Netlist generation device. 7. The storage device according to claim 6, wherein the storage unit further stores a table in which a type of the identifier and a change rule are associated with each other, and the parameter change unit determines the identifier based on the acquired identifier. A netlist generation device, wherein a change rule is determined by a table, and a parameter in circuit design data of the module is changed based on the determined change rule. 8. The module according to claim 6, wherein the module name includes a module name and a module suffix, and the identifier is given as the module suffix, A netlist generation device, wherein a module suffix of the module is obtained. 9. The netlist generation device according to claim 6, wherein the parameter is a power supply name.