JP2000077355A - Electrode structure of semiconductor integrated circuit and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve adhesion between an interlayer film made of an oxide film and an electrode by forming a silicide layer on the surface between a metal electrode and the interlayer film. SOLUTION: An interlayer film 101 made of an oxide film SiO2 is formed on an Si substrate 100, the surface of the interlayer film 101 is changed to SiON by an ammonium plasma, and further a silicon-rich SiNx film is deposited on it. In this case, the SiNx film is allowed to be rich in silicon and a film is formed so that x is equal to 0.8. Then, a contact is opened at the interlayer film 101 and the SiNx film, a silicon diffusion barrier layer 103 that is made of polysilicon 102 and TiN and Ti is formed in the contact, further an Ru 105 and RuO2 106 are successively deposited by a sputtering method, a heat treatment is made in nitrogen, and excessive silicon in a nitride film 107 is changed into silicide, a silicide layer 104 made of Ru, nitrogen, and silicon is formed, and the RuO2 106 and Ru 105 are machined by dry etching, thus obtaining a stack electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an electrode structure of a semiconductor integrated circuit and a method of manufacturing the same, and more particularly, to an electrode structure suitable for a semiconductor capacitor for a semiconductor integrated circuit and a method of manufacturing the same.

[0002]

2. Description of the Related Art Semiconductor integrated circuits represented by dynamic random access memories (DRAMs) have been increasingly integrated. Regardless of the degree of integration, it is necessary to secure a capacitance of about 30 fF for one semiconductor capacitor used in such a DRAM.
For this reason, studies have been made to utilize the side surface of the lower electrode by making the lower electrode structure three-dimensional and to secure the capacitance by making the capacitance film thinner.

Conventionally, a silicon oxide film and a silicon nitride film have been used as a capacitance film of the semiconductor capacitance element for a semiconductor integrated circuit. However, D at the Gbit level or higher
In the case of using the above-mentioned capacitance film having a dielectric constant of 3 to 7 in a RAM,
It is necessary to reduce the height of the three-dimensional lower electrode to 5,000 Å or more, and to further reduce the thickness of the capacitor film to a level of several atomic layers. When the capacitance film is thinned down to the level of several atomic layers, a phenomenon occurs in which electrons tunnel through the capacitance film, and the capacitance film does not function as a capacitance film. For the above reasons, the formation of a three-dimensional lower electrode using a silicon oxide film and a silicon nitride film as the capacitance film and a reduction in the thickness of the capacitance film have reached their limits.

When a material having a large dielectric constant is used for the capacitance film, the same capacitance can be obtained with a smaller electrode area than when a silicon oxide film or a silicon nitride film is used.
For this reason, it is expected that the capacity can be ensured without creating a complicated lower electrode structure. For the above reasons, SrTiO ₃ , (Ba, Sr) TiO having a dielectric constant several tens to several hundreds times higher than that of a silicon oxide film or a silicon nitride film.
High dielectric constant materials such as ₃ (hereinafter, BST) and Pb (Zr, Ti) O ₃ are being studied as the capacitance film.

[0005] For example, at the 1991 International Electron Devices Meeting (Internat)
ionicalElectronDevicesMeeti
ng) of the digest of technical papers (Di)
gestofTechnicalPapers) 823
Page 826 contains a 256 Mbit DRA using BST.
There have been reports on semiconductor capacitance elements for M.

[0006] It is disclosed in the Japanese Journal that the higher the film forming temperature, the better the electrical characteristics of the high dielectric constant film can be obtained.
Of Applied Physics (Japanese)
Journal of applied physics
cs) Vol. 35, pp. 5089-5093. When a capacitor film is formed at a high temperature, an oxide film is formed by diffusion of silicon from polysilicon at a contact portion.
There was a problem that the dielectric constant was lowered. In order to solve this problem, a silicon diffusion barrier is used, and in order to suppress the increase in contact resistance due to oxidation of the silicon diffusion barrier, an electrode structure on which an oxidation-resistant barrier layer is formed is described in Japanese journal of Applied Physics (Japanese Journal of app
Lied physics) Vol. 34, 5224-5
228 page.

However, even if the above structure is processed into a stack shape and the electrode structure is further miniaturized, there is a problem that the silicon diffusion barrier layer is oxidized and the contact resistance is increased. Therefore, in 1996, the International Electron Devices Meeting (International El.
digestDevicesMeeting) Digest of Technical Papers (DigestofT)
technicalPapers) pages 675 to 678,
By embedding a silicon barrier layer in a contact and capping with an oxygen diffusion barrier in FIG. 13A of US Pat. No. 5,381,302, a low contact resistance can be maintained even at a high high dielectric constant film formation temperature. A structure has been proposed.

However, in the above structure, the metal or metal oxide having an oxygen diffusion barrier property is in contact with the underlying interlayer film. However, SiO ₂ forming the interlayer film
Is not easily formed because it is stable, a reaction layer for improving the adhesion is not formed, and there is a problem in the adhesion between the interlayer film and the interface of the metal electrode.

[0009]

SUMMARY OF THE INVENTION It is an object of the present invention to improve the above-mentioned drawbacks of the prior art, and in particular, to improve the adhesion between an interlayer film composed of an oxide film and an electrode. It is an object of the present invention to provide a novel electrode structure of a semiconductor integrated circuit in which separation at an interface with a metal electrode is prevented, and a method of manufacturing the same.

[0010]

SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object. That is, the electrode structure of the semiconductor integrated circuit according to the present invention is an electrode structure used for a semiconductor capacitor for a semiconductor integrated circuit, wherein a silicide layer is formed at an interface between a metal electrode and an interlayer film. It is assumed that.

A first aspect of the method of manufacturing an electrode structure of a semiconductor integrated circuit according to the present invention is a method of manufacturing an electrode structure used for a semiconductor capacitor for a semiconductor integrated circuit.
A first step of forming a silicon-rich nitride film on the interlayer film; a second step of forming a metal electrode on the silicon-rich nitride film; and performing a heat treatment between the interlayer film and the metal electrode. A third step of forming a silicide layer;
The second aspect is characterized in that
The silicon-rich nitride film (SiNx) is characterized in that the ratio of silicon to nitrogen (X) is 0.1 to 1.1, and in a third aspect, the first step comprises: The fourth aspect includes a step of converting the surface of the interlayer film to SiON by ammonia treatment. In a fourth embodiment, the silicon-rich nitride film (SiNx) has a ratio of silicon to nitrogen (X) of 0.1 to 1.2. And the fifth
An aspect is a plasma CV as the method for forming the nitride film.
D, any one of CVD under reduced pressure and sputtering is used.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The electrode structure of a semiconductor integrated circuit according to the present invention is an electrode structure used for a semiconductor capacitor for a semiconductor integrated circuit, wherein a silicide layer is formed at an interface between a metal electrode and an interlayer film. It is characterized by having.

In order to obtain good adhesion between different materials, it is effective to form a reaction layer at the interface between the two materials. The oxide film is a stable material, and it has conventionally been difficult to form a metal electrode with good adhesion on the oxide film. The present invention provides an electrode structure which is configured as described above and prevents peeling from occurring at an interface between an interlayer film made of an oxide film and a metal electrode.

Specifically, a silicide layer is formed at an interface between an interlayer film made of an oxide film and an electrode made of a metal. (1) forming SiON on the surface of the interlayer film by ammonia plasma,
(2) A silicon-rich nitride film (Si
Nx) and performing a heat treatment after depositing the metal electrode to form a silicide layer as an adhesion layer between the metal electrode and the interlayer film.

A specific embodiment will be described below with reference to the drawings. FIG. 1 shows an electrode structure according to the present invention. The present invention is characterized in that a silicide layer 104 made of RuSi is formed at an interface between a metal electrode 105 made of Ru and an interlayer film 101 made of an oxide film. 2 to 4 show a method for manufacturing an electrode structure according to the present invention. In the electrode structure manufacturing method according to the present invention,
(1) As shown in FIG. 2 (b), a process of treating the surface of the interlayer film 101 with ammonia plasma to form a SiON film 110 with many defects on the surface of the interlayer film 101, and (2) as shown in FIG. 2 (c). First, a chemical vapor deposition (CV)
X) by the D) method, the plasma CVD method, or the sputtering method.
<1.2 Step of depositing SiNx film 107, (3) S
After the INx film is deposited, Ru 105 and RuO ₂ 106 are deposited, heat treatment is performed, and excess silicon in the SiN x 107 includes a step of forming the metal electrode 105 and the silicide layer 104.

[0016]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a semiconductor integrated circuit according to an embodiment of the present invention; (First Specific Example) FIGS. 1 to 4 are diagrams specifically showing an electrode structure of a semiconductor integrated circuit according to the present invention. The metal electrode 105 and the interlayer film 10
1 shows an electrode structure of a semiconductor integrated circuit in which a silicide layer 104 is formed at an interface with the semiconductor integrated circuit 1.

Hereinafter, the present invention will be described in more detail. A first specific example of the present invention will be described with reference to FIGS. First, as shown in FIG. 2A, an interlayer film 101 made of an oxide film SiO ₂ is formed on a Si substrate 100. Next, as shown in FIG. 2B, the surface of the interlayer film 101 is changed to SiON 110 by ammonia plasma. At this time, many defects are formed on the surface of the SiON 110 due to plasma damage.

The plasma processing conditions at this time are a process gas of ammonia (NH ₃ ) and argon (Ar), a film forming temperature of 400 ° C., a film forming pressure of 250 mTorr, and a plasma power of 500 W or less. Further, as shown in FIG. 2C, a silicon-rich nitride film (SINx) 107 is deposited thereon by plasma CVD at a thickness of 30 °.

At this time, the film forming conditions are as follows.
(SiH_Four), Ammonia (NH _Three) And argon
(Ar) Film forming temperature 400 ° C., film forming pressure 250 mTo
rr, plasma power 500W. At this time, Si
The Nx film is made to be silicon rich so that X = 0.8
Form a film.

Next, as shown in FIG.
01 and SiNx 107 were opened, and FIG.
As shown in (b), a polysilicon 102 and a silicon diffusion barrier layer 103 made of titanium nitride (TiN) and titanium (Ti) each having a thickness of 500 ° are formed in the contact. Further, as shown in FIG. 3C, Ru 105 having a thickness of 300 Å and RuO ₂ 106 having a thickness of 2000 Å are sequentially deposited by a sputtering method. Subsequently, as shown in FIG. 4A, a heat treatment at 600 ° C. in nitrogen is performed for 30 minutes to form the nitride film 10.
Excess silicon in 7 is silicided to form a silicide layer 104 made of ruthenium, nitrogen, and silicon. Subsequently, as shown in FIG. 4 (b), RuO ₂ 10
6 and Ru 105 are processed to a desired size by dry etching to obtain a stacked electrode.

Next, FIG. 8 shows the results of a peeling test performed on 100 electrode structures according to the prior art shown in FIG. 10 and the present invention shown in FIG. In the prior art, eight delaminations are seen, whereas in the present invention, SiNx
When X of 107 was in the range of 0.1 to 1.2, no peeling was observed, indicating that the effect of the present invention was sufficiently obtained.

In the conventional electrode structure in which Ru 105 and oxide film 101 are in contact with each other, since oxide film 101 is stable, there is no reaction region serving as an adhesion layer. For this reason, there was a problem in adhesion. In the present invention, intentionally (1) the damage layer 110 is provided on the surface of the interlayer film 101 to make the surface of the interlayer film easily reactable. (2) The interface layer 107 made of a silicon-rich nitride film is made of Ru105 and an oxide film. A desired adhesion is obtained by forming a silicide layer 104 between the layers 101 and heat-treating to form a silicide layer 104 and forming an adhesion layer formed of the silicide layer.

On the other hand, the adhesion of SiNx 107 is degraded in a region where X> 1.2 because silicon for forming silicide is insufficient. (Second Specific Example) Next, a specific example in which the nitride film (SINx) 107 is formed by a sputtering method will be described with reference to FIGS.

The steps before the deposition of SINx 107 are the same as in the first embodiment. As shown in FIG. 2 (c), SiNx 107 is deposited by 30 [deg.] On the interlayer film treated in ammonia plasma by sputtering. The film forming conditions at this time are: target Si, sputtering gas Ar, N ₂ , plasma power 2 kW, DC applied voltage 500 V, film forming chamber pressure 3 mTorr, and substrate heating 100 ° C.

Next, as shown in FIG. 3 (a), SiO ₂
Open contacts in the substrate 101 and the Si substrate 100, FIG.
As shown in (b), a polysilicon 102 and a stack 103 of titanium nitride (TiN) and titanium (Ti) each having a thickness of 500 ° are formed in the contact. Hereinafter, electrodes are formed in the same manner as in the first specific example.

(Third Specific Example) Next, a nitride film (SIN
A specific example of the case where x) 107 is formed by a low pressure CVD method will be described with reference to FIGS. The steps before the deposition of SINx107 are the same as those in the first specific example. As shown in FIG. 2 (c), the reduced pressure C was applied on the interlayer film treated in the ammonia plasma.
A silicon-rich nitride film (SiNx (X <
0.9)) Deposit 107 by 30 °. At this time, the film forming conditions include a process gas of silane (SiH ₄ ), ammonia (NH ₃ ) and argon (Ar), and a film forming temperature of 700.
C., the film forming pressure is 0.4 Torr, the SiNx film is silicon-rich, and the film is formed so that X = 0.8.

As shown in FIG. 3A, SiO ₂ 101
Then, a contact is opened in the Si substrate 100, and then FIG.
As shown in (b), a polysilicon 102 and a stack 103 of titanium nitride (TiN) and titanium (Ti) each having a thickness of 500 ° are formed in the contact. Hereinafter, electrodes are formed in the same manner as in the first specific example.

(Fourth Specific Example) A fourth specific example according to the present invention will be described with reference to FIG. 1 and FIGS. First, FIG.
As shown in FIG. 1A, an interlayer film 101 made of an oxide film is formed on a Si substrate 100. Further, as shown in FIG. 5B, a silicon-rich nitride film (SINx) 107 is deposited on the interlayer film 101 by plasma CVD at a thickness of 30 °. At this time, the film formation conditions are the process gas silane (Si
H ₄ ), ammonia (NH ₃ ) and argon (Ar),
The film forming temperature is 400 ° C., the film forming pressure is 250 mTorr, and the plasma power is 500 W. Further, the SiNx film 107 is made rich in silicon and is formed so that X = 0.7.

Next, as shown in FIG.
6 and a contact was opened in SiNx 107, and FIG.
As shown in FIG. 1A, a polysilicon 102 and a laminate 103 of titanium nitride (TiN) and titanium (Ti) each having a thickness of 500.degree. Are formed in the contact. Further, FIG.
As shown in (b), Ru 105 and Ru 105 having a thickness of 300
000 A of RuO ₂ 106 is sequentially deposited by a sputtering method, and then, as shown in FIG.
Is performed for 30 minutes to convert excess silicon in the nitride film 107 into silicide, thereby forming a silicide layer 104 made of ruthenium, nitrogen, and silicon. Subsequently, FIG.
As shown in ( ₂₎ , RuO ₂ 106 and Ru 105 are processed to a desired size by dry etching to obtain a stacked electrode.

FIG. 9 shows the results of a peel test performed on 100 electrodes in this specific example. Also in this specific example, when X is 0.1 to 1.1, good adhesion is obtained. However, since the damage layer does not exist on the surface of the interlayer film 101, the margin of the SiNx film is smaller than in the first to third specific examples. In this case, SiN
Since the adhesiveness of x107 is deteriorated in a region where X> 1.1, the range of X is preferably 0.1 to 1.1.

In the fourth specific example, plasma CVD is used as the method of forming the SiNx film 107. However, the same effect can be obtained by using the sputtering method of the second specific example and the low pressure CVD method of the third specific example. can get. Although Ru is used as the metal electrode material in the above description, W, Ti, Pt, Ir, P
Similar effects can be obtained with d or an alloy thereof.

[0032]

Since the electrode structure of the semiconductor integrated circuit and the method of manufacturing the same according to the present invention are constructed as described above, the adhesion between the interlayer film composed of an oxide film and the electrode is improved, and the reliability of the device is improved. improves.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an electrode structure of a semiconductor integrated circuit according to the present invention.

FIG. 2 is a diagram showing a manufacturing process of a first specific example of an electrode structure of a semiconductor integrated circuit according to the present invention.

FIG. 3 is a view showing a manufacturing process following FIG. 2;

FIG. 4 is a view showing a manufacturing process following FIG. 3;

FIG. 5 is a diagram showing a manufacturing process of a fourth specific example of the electrode structure of the semiconductor integrated circuit according to the present invention.

FIG. 6 is a view showing a manufacturing process following FIG. 5;

FIG. 7 is a view showing a manufacturing process following FIG. 6;

FIG. 8 is a diagram showing an effect of the first specific example of the present invention.

FIG. 9 is a diagram showing an effect of the fourth specific example of the present invention.

FIG. 10 is a cross-sectional view showing an electrode structure of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 Si substrate 101 interlayer film 102 polysilicon 103 silicon diffusion barrier layer 104 silicide layer 105 metal electrode (having oxygen diffusion barrier) 106 electrode (having oxygen barrier) 107 nitride film (SiNx) 110 SION

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 AA01 BB01 BB04 BB19 BB36 DD16 DD17 DD18 DD28 DD65 EE14 EE17 FF13 FF17 FF18 GG16 GG19 HH05 HH09 5F083 AD22 GA27 JA14 JA15 JA32 JA35 JA39 JA43 JA56 MA06 PR17 PR03 PR

Claims (6)

[Claims] An electrode structure for use in a semiconductor capacitor for a semiconductor integrated circuit, wherein a silicide layer is formed at an interface between a metal electrode and an interlayer film. 2. A method for manufacturing an electrode structure used for a semiconductor capacitor for a semiconductor integrated circuit, comprising: a first step of forming a silicon-rich nitride film on an interlayer film; And a third step of performing a heat treatment to form a silicide layer between the interlayer film and the metal electrode. Production method. 3. The fabrication of an electrode structure for a semiconductor integrated circuit according to claim 2, wherein the ratio of silicon to nitrogen (X) of the silicon-rich nitride film (SiNx) is 0.1 to 1.1. Method. 4. The method according to claim 2, wherein the first step includes a step of converting the surface of the interlayer film to SiON by ammonia treatment. 5. The electrode structure of a semiconductor integrated circuit according to claim 4, wherein a ratio (X) of silicon to nitrogen of the silicon-rich nitride film (SiNx) is 0.1 to 1.2 or less. Production method. 6. The electrode structure of a semiconductor integrated circuit according to claim 1, wherein any one of plasma CVD, low pressure CVD, and sputtering is used as the method of forming the nitride film.