[go: up one dir, main page]

ITMI921562A1 - Wafer semiconduttore e suo procedimento di fabbricazione - Google Patents

Wafer semiconduttore e suo procedimento di fabbricazione

Info

Publication number
ITMI921562A1
ITMI921562A1 IT001562A ITMI921562A ITMI921562A1 IT MI921562 A1 ITMI921562 A1 IT MI921562A1 IT 001562 A IT001562 A IT 001562A IT MI921562 A ITMI921562 A IT MI921562A IT MI921562 A1 ITMI921562 A1 IT MI921562A1
Authority
IT
Italy
Prior art keywords
manufacturing process
semiconductor wafer
wafer
semiconductor
manufacturing
Prior art date
Application number
IT001562A
Other languages
English (en)
Inventor
Jeungwoo Lee
Myoungseob Shim
Hoenjong Shin
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI921562A0 publication Critical patent/ITMI921562A0/it
Publication of ITMI921562A1 publication Critical patent/ITMI921562A1/it
Application granted granted Critical
Publication of IT1255174B publication Critical patent/IT1255174B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312Organic layers, e.g. photoresist
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dicing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
ITMI921562A 1991-06-27 1992-06-25 Wafer semiconduttore e suo procedimento di fabbricazione IT1255174B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910010829A KR930001371A (ko) 1991-06-27 1991-06-27 반도체 제조용 기판 및 그 형성방법

Publications (3)

Publication Number Publication Date
ITMI921562A0 ITMI921562A0 (it) 1992-06-25
ITMI921562A1 true ITMI921562A1 (it) 1993-12-25
IT1255174B IT1255174B (it) 1995-10-20

Family

ID=19316427

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI921562A IT1255174B (it) 1991-06-27 1992-06-25 Wafer semiconduttore e suo procedimento di fabbricazione

Country Status (7)

Country Link
US (1) US5300816A (it)
JP (1) JPH06204401A (it)
KR (1) KR930001371A (it)
DE (1) DE4220721A1 (it)
FR (1) FR2678427A1 (it)
GB (1) GB2257298A (it)
IT (1) IT1255174B (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2894165B2 (ja) * 1993-07-24 1999-05-24 ヤマハ株式会社 半導体装置
JP2755131B2 (ja) * 1993-10-27 1998-05-20 日本電気株式会社 半導体装置
US5686171A (en) * 1993-12-30 1997-11-11 Vlsi Technology, Inc. Integrated circuit scribe line structures and methods for making same
US5861660A (en) * 1995-08-21 1999-01-19 Stmicroelectronics, Inc. Integrated-circuit die suitable for wafer-level testing and method for forming the same
US5700732A (en) 1996-08-02 1997-12-23 Micron Technology, Inc. Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns
US6197645B1 (en) 1997-04-21 2001-03-06 Advanced Micro Devices, Inc. Method of making an IGFET with elevated source/drain regions in close proximity to gate with sloped sidewalls
JP3132451B2 (ja) * 1998-01-21 2001-02-05 日本電気株式会社 半導体装置およびその製造方法
US6441465B2 (en) 1999-02-09 2002-08-27 Winbond Electronics Corp. Scribe line structure for preventing from damages thereof induced during fabrication
JP2000294771A (ja) * 1999-04-02 2000-10-20 Fuji Electric Co Ltd プレーナ型半導体装置
WO2003038880A1 (fr) * 2001-10-31 2003-05-08 Mitsuboshi Diamond Industrial Co., Ltd. Procede de formation de chemin de decoupe sur une tranche de semi-conducteur, et dispositif pour former un chemin de decoupe
US7829462B2 (en) * 2007-05-03 2010-11-09 Teledyne Licensing, Llc Through-wafer vias
US8263496B1 (en) * 2011-04-12 2012-09-11 Tokyo Electron Limited Etching method for preparing a stepped structure
TWI467757B (zh) * 2013-08-02 2015-01-01 Chipbond Technology Corp 半導體結構
TWI467711B (zh) * 2013-09-10 2015-01-01 Chipbond Technology Corp 半導體結構

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3707760A (en) * 1971-05-19 1973-01-02 Sieburg Ind Inc Method and device for article working such as fracturing of semiconductor slices and separating semiconductor chips
JPS5467370A (en) * 1977-11-09 1979-05-30 Hitachi Ltd Mos semiconductor device
US4381201A (en) * 1980-03-11 1983-04-26 Fujitsu Limited Method for production of semiconductor devices
US4835592A (en) * 1986-03-05 1989-05-30 Ixys Corporation Semiconductor wafer with dice having briding metal structure and method of manufacturing same
JPS6428827A (en) * 1987-07-24 1989-01-31 Hitachi Ltd Manufacture of semiconductor device
JPH01120029A (ja) * 1987-11-02 1989-05-12 Seiko Epson Corp 半導体製造装置のスクライブ構造
JPH0821559B2 (ja) * 1988-02-12 1996-03-04 三菱電機株式会社 半導体集積回路装置の製造方法
JPH027431A (ja) * 1988-06-27 1990-01-11 Oki Electric Ind Co Ltd 半導体装置
JPH0237747A (ja) * 1988-07-28 1990-02-07 Oki Electric Ind Co Ltd 半導体装置の製造方法
US5053836A (en) * 1989-11-21 1991-10-01 Eastman Kodak Company Cleaving of diode arrays with scribing channels
JPH03185750A (ja) * 1989-12-14 1991-08-13 Victor Co Of Japan Ltd 半導体装置
JPH1028827A (ja) * 1996-07-19 1998-02-03 Mitsubishi Heavy Ind Ltd 除塵装置

Also Published As

Publication number Publication date
GB9213586D0 (en) 1992-08-12
ITMI921562A0 (it) 1992-06-25
DE4220721A1 (de) 1993-01-14
IT1255174B (it) 1995-10-20
KR930001371A (ko) 1993-01-16
JPH06204401A (ja) 1994-07-22
FR2678427A1 (fr) 1992-12-31
GB2257298A (en) 1993-01-06
US5300816A (en) 1994-04-05

Similar Documents

Publication Publication Date Title
ITMI921651A0 (it) Dispositivo a semiconduttore e suo metodo di fabbricazione
DE69210942D1 (de) Halbleiterherstellung
IT1248860B (it) Dispositivo a semiconduttore e suo metodo di fabbricazione
DE69208937D1 (de) Halbleiter-Herstellungseinrichtung
ITMI921873A0 (it) Dispositivo semiconduttore e metodo per fabbicarlo
DE69430511D1 (de) Halbleiteranordnung und Herstellungverfahren
KR970005687B1 (en) Semiconductor wafer
DE69429906D1 (de) Halbleiterstruktur und Herstellungsverfahren
ITMI921562A1 (it) Wafer semiconduttore e suo procedimento di fabbricazione
DE69414277D1 (de) Halbleiterwaferkassette
KR900008697A (ko) 반도체 웨이퍼 제조방법
ITMI922707A1 (it) Struttura periferica di una piastrina come un dispositivo a semiconduttore e suo procedimento di fabbricazione
IT9021853A0 (it) Dispositivo di memoria a semiconduttore altamente integrato e suo metodo di fabbricazione
DE69124981D1 (de) Bistabile integrierte Halbleiterschaltung
KR900012360A (ko) 반도체 집적회로와 그 제조방법
DE69105530D1 (de) Halbleiterscheibe.
ITMI923001A0 (it) Dispositivo di memoria a semiconduttore e suo metodo di funzionamento
ITMI911148A1 (it) Struttura di contatto interstrato di un dispositivo a semiconduttore e suo metodo di fabbricazione
DE69125498D1 (de) Halbleiterverrichtungsherstellungsverfahren
DE69223752D1 (de) Halbleiterschaltungen
KR950012605U (ko) 반도체 제조용 웨이퍼 척
KR940027624U (ko) 플랫트존을 갖지 않는 반도체 웨이퍼
KR940006476U (ko) 반도체 웨이퍼 건조장치
KR940008664U (ko) 반도체 웨이퍼 세정장치
KR970046736U (ko) 반도체 웨이퍼 제조용 페티클

Legal Events

Date Code Title Description
0001 Granted