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IT7824720A0 - Procedimento per fabbricare un transistore per alte frequenze. - Google Patents

Procedimento per fabbricare un transistore per alte frequenze.

Info

Publication number
IT7824720A0
IT7824720A0 IT7824720A IT2472078A IT7824720A0 IT 7824720 A0 IT7824720 A0 IT 7824720A0 IT 7824720 A IT7824720 A IT 7824720A IT 2472078 A IT2472078 A IT 2472078A IT 7824720 A0 IT7824720 A0 IT 7824720A0
Authority
IT
Italy
Prior art keywords
manufactureing
procedure
high frequency
frequency transistor
transistor
Prior art date
Application number
IT7824720A
Other languages
English (en)
Other versions
IT1108801B (it
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of IT7824720A0 publication Critical patent/IT7824720A0/it
Application granted granted Critical
Publication of IT1108801B publication Critical patent/IT1108801B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/051Manufacture or treatment of vertical BJTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/965Shaped junction formation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
IT24720/78A 1977-06-27 1978-06-20 Procedimento per fabbricare un transistore per alte frequenze IT1108801B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19772728845 DE2728845A1 (de) 1977-06-27 1977-06-27 Verfahren zum herstellen eines hochfrequenztransistors

Publications (2)

Publication Number Publication Date
IT7824720A0 true IT7824720A0 (it) 1978-06-20
IT1108801B IT1108801B (it) 1985-12-09

Family

ID=6012432

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24720/78A IT1108801B (it) 1977-06-27 1978-06-20 Procedimento per fabbricare un transistore per alte frequenze

Country Status (6)

Country Link
US (1) US4175983A (it)
JP (1) JPS5411683A (it)
DE (1) DE2728845A1 (it)
FR (1) FR2396411B2 (it)
GB (1) GB1577405A (it)
IT (1) IT1108801B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5577172A (en) * 1978-12-06 1980-06-10 Oki Electric Ind Co Ltd Semiconductor device
US4269636A (en) * 1978-12-29 1981-05-26 Harris Corporation Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking
JPS5852339B2 (ja) * 1979-03-20 1983-11-22 富士通株式会社 半導体装置の製造方法
US4261761A (en) * 1979-09-04 1981-04-14 Tektronix, Inc. Method of manufacturing sub-micron channel width MOS transistor
US4261763A (en) * 1979-10-01 1981-04-14 Burroughs Corporation Fabrication of integrated circuits employing only ion implantation for all dopant layers
JPS57149770A (en) * 1981-03-11 1982-09-16 Mitsubishi Electric Corp Manufacture of semiconductor device
EP0080523B1 (de) * 1981-11-28 1986-10-01 Deutsche ITT Industries GmbH Verfahren zum Herstellen einer monolithisch integrierten Schaltung mit mindestens einem Paar von komplementären Feldeffekttransistoren und mindestens einem Bipolartransistor
US4961102A (en) * 1982-01-04 1990-10-02 Shideler Jay A Junction programmable vertical transistor with high performance transistor
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
JPS5941877A (ja) * 1982-08-31 1984-03-08 Junichi Nishizawa フオトトランジスタ
SE461428B (sv) * 1988-06-16 1990-02-12 Ericsson Telefon Ab L M Foerfarande foer att paa ett underlag av halvledarmaterial framstaella en bipolaer transistor eller en bipolaer transistor och en faelteffekttransistor eller en bipolaer transistor och en faelteffekttransistor med en komplementaer faelteffekttransistor och anordningar framstaellda enligt foerfarandena
JP2748420B2 (ja) * 1988-08-12 1998-05-06 ソニー株式会社 バイポーラトランジスタ及びその製造方法
EP0605946B1 (en) * 1992-11-12 1999-02-24 National Semiconductor Corporation Transistor process for removing narrow base effects

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1457139A (en) * 1973-09-27 1976-12-01 Hitachi Ltd Method of manufacturing semiconductor device
JPS5214594B2 (it) * 1973-10-17 1977-04-22
NL180466C (nl) * 1974-03-15 1987-02-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal.
US3904450A (en) * 1974-04-26 1975-09-09 Bell Telephone Labor Inc Method of fabricating injection logic integrated circuits using oxide isolation
JPS50153873A (it) * 1974-05-30 1975-12-11
US4066473A (en) * 1976-07-15 1978-01-03 Fairchild Camera And Instrument Corporation Method of fabricating high-gain transistors

Also Published As

Publication number Publication date
GB1577405A (en) 1980-10-22
US4175983A (en) 1979-11-27
DE2728845A1 (de) 1979-01-18
FR2396411A2 (it) 1979-01-26
FR2396411B2 (it) 1983-08-05
JPS5411683A (en) 1979-01-27
IT1108801B (it) 1985-12-09
DE2728845C2 (it) 1987-07-16

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