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IT1397216B1 - Dispositivo di memoria sram - Google Patents

Dispositivo di memoria sram

Info

Publication number
IT1397216B1
IT1397216B1 ITMI2009A002322A ITMI20092322A IT1397216B1 IT 1397216 B1 IT1397216 B1 IT 1397216B1 IT MI2009A002322 A ITMI2009A002322 A IT MI2009A002322A IT MI20092322 A ITMI20092322 A IT MI20092322A IT 1397216 B1 IT1397216 B1 IT 1397216B1
Authority
IT
Italy
Prior art keywords
memory device
sram memory
sram
memory
Prior art date
Application number
ITMI2009A002322A
Other languages
English (en)
Inventor
Donatella Brambilla
Carolina Selva
Rita Zappa
Danilo Rimondi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITMI2009A002322A priority Critical patent/IT1397216B1/it
Priority to US12/974,569 priority patent/US8400820B2/en
Publication of ITMI20092322A1 publication Critical patent/ITMI20092322A1/it
Application granted granted Critical
Publication of IT1397216B1 publication Critical patent/IT1397216B1/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hall/Mr Elements (AREA)
ITMI2009A002322A 2009-12-29 2009-12-29 Dispositivo di memoria sram IT1397216B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
ITMI2009A002322A IT1397216B1 (it) 2009-12-29 2009-12-29 Dispositivo di memoria sram
US12/974,569 US8400820B2 (en) 2009-12-29 2010-12-21 Adjustable impedance SRAM memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI2009A002322A IT1397216B1 (it) 2009-12-29 2009-12-29 Dispositivo di memoria sram

Publications (2)

Publication Number Publication Date
ITMI20092322A1 ITMI20092322A1 (it) 2011-06-30
IT1397216B1 true IT1397216B1 (it) 2013-01-04

Family

ID=42102520

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI2009A002322A IT1397216B1 (it) 2009-12-29 2009-12-29 Dispositivo di memoria sram

Country Status (2)

Country Link
US (1) US8400820B2 (it)
IT (1) IT1397216B1 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2508221B (en) 2012-11-26 2015-02-25 Surecore Ltd Low-Power SRAM Cells
CN103019878B (zh) * 2012-12-31 2015-01-14 清华大学 一种冗余结构存储单元
CN103714849B (zh) * 2013-12-30 2017-01-25 深圳市国微电子有限公司 一种用于可编程芯片的可编程存储单元
US9871520B1 (en) * 2016-08-15 2018-01-16 Xilinx, Inc. Voting circuit and self-correcting latches
US10236057B2 (en) * 2017-05-25 2019-03-19 Globalfoundries Singapore Pte. Ltd. Memory cells and methods for writing data to memory cells
DE102021109480A1 (de) * 2020-12-14 2022-06-15 Taiwan Semiconductor Manufacturing Co., Ltd. Speichervorrichtung
TW202331718A (zh) * 2021-12-21 2023-08-01 美商賽諾西斯公司 具有寫入輔助的靜態隨機存取記憶體非箝位寫入驅動器

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4638463A (en) * 1985-01-24 1987-01-20 International Business Machines Corporation Fast writing circuit for a soft error protected storage cell
US4956815A (en) * 1988-09-30 1990-09-11 Texas Instruments Incorporated Memory cell with increased stability
US5307142A (en) * 1991-11-15 1994-04-26 The United States Of America As Represented By The United States Department Of Energy High performance static latches with complete single event upset immunity
JP3517411B2 (ja) * 2002-04-08 2004-04-12 沖電気工業株式会社 半導体記憶装置
JP2004047529A (ja) * 2002-07-09 2004-02-12 Renesas Technology Corp 半導体記憶装置
WO2007091541A1 (ja) * 2006-02-08 2007-08-16 Renesas Technology Corp. 半導体記憶装置
JP4932341B2 (ja) * 2006-06-23 2012-05-16 ルネサスエレクトロニクス株式会社 半導体記憶装置及び半導体記憶装置の動作方法
US7782654B2 (en) * 2007-05-09 2010-08-24 Nec Electronics Corporation Static random access memory device
US7983071B2 (en) * 2008-01-04 2011-07-19 Texas Instruments Incorporated Dual node access storage cell having buffer circuits
FR2927722A1 (fr) * 2008-02-18 2009-08-21 Commissariat Energie Atomique Cellule memoire sram a transistor double grille dotee de moyens pour ameliorer la marge en ecriture
WO2009122579A1 (ja) * 2008-04-03 2009-10-08 日本ユニサンティスエレクトロニクス株式会社 6t sgt cmos sramセルの安定性を改善する方法及び装置
JP5306084B2 (ja) * 2009-07-10 2013-10-02 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
US20110157954A1 (en) 2011-06-30
US8400820B2 (en) 2013-03-19
ITMI20092322A1 (it) 2011-06-30

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