IT1188309B - Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione - Google Patents

Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione

Info

Publication number: IT1188309B
Authority: IT; Italy
Prior art keywords: procedure; manufacture; high voltage; electronic devices; channel mos
Prior art date: 1986-01-24

Application number

IT19173/86A

Other languages

English (en)

Other versions

IT8619173A0 (it

Inventor

Claudio Contiero

Paola Galbiati

Antonio Andreini

Original Assignee

Sgs Microelettrica Spa

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-01-24

Filing date

1986-01-24

Publication date

1988-01-07

1986-01-24 Application filed by Sgs Microelettrica Spa filed Critical Sgs Microelettrica Spa

1986-01-24 Priority to IT19173/86A priority Critical patent/IT1188309B/it

1986-01-24 Publication of IT8619173A0 publication Critical patent/IT8619173A0/it

1987-01-21 Priority to EP87100765A priority patent/EP0231811B1/en

1987-01-21 Priority to DE87100765T priority patent/DE3788438T2/de

1987-01-22 Priority to US07/006,037 priority patent/US4721686A/en

1987-01-23 Priority to JP62015042A priority patent/JP2721877B2/ja

1988-01-07 Application granted granted Critical

1988-01-07 Publication of IT1188309B publication Critical patent/IT1188309B/it

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
- H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0163—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including enhancement-mode IGFETs and depletion-mode IGFETs
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Microelectronics & Electronic Packaging (AREA)
General Physics & Mathematics (AREA)
Manufacturing & Machinery (AREA)
Computer Hardware Design (AREA)
Condensed Matter Physics & Semiconductors (AREA)
Power Engineering (AREA)
High Energy & Nuclear Physics (AREA)
Health & Medical Sciences (AREA)
Toxicology (AREA)
Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Bipolar Integrated Circuits (AREA)
Bipolar Transistors (AREA)

IT19173/86A 1986-01-24 1986-01-24 Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione IT1188309B (it)

Priority Applications (5)

Application Number	Priority Date	Filing Date	Title
IT19173/86A IT1188309B (it)	1986-01-24	1986-01-24	Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione
EP87100765A EP0231811B1 (en)	1986-01-24	1987-01-21	Method for manufacturing integrated electronic devices, in particular high voltage P-channel MOS transistors
DE87100765T DE3788438T2 (de)	1986-01-24	1987-01-21	Methode zur Herstellung von integrierten elektronischen Vorrichtungen, insbesondere Hochspannungs-P-Kanal-MOS-Transistoren.
US07/006,037 US4721686A (en)	1986-01-24	1987-01-22	Manufacturing integrated circuits containing P-channel MOS transistors and bipolar transistors utilizing boron and arsenic as dopants
JP62015042A JP2721877B2 (ja)	1986-01-24	1987-01-23	集積電子素子の製作方法

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
IT19173/86A IT1188309B (it)	1986-01-24	1986-01-24	Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione

Publications (2)

Publication Number	Publication Date
IT8619173A0 IT8619173A0 (it)	1986-01-24
IT1188309B true IT1188309B (it)	1988-01-07

Family

ID=11155505

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT19173/86A IT1188309B (it)	1986-01-24	1986-01-24	Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione

Country Status (5)

Country	Link
US (1)	US4721686A (it)
EP (1)	EP0231811B1 (it)
JP (1)	JP2721877B2 (it)
DE (1)	DE3788438T2 (it)
IT (1)	IT1188309B (it)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
IT1213411B (it) *	1986-12-17	1989-12-20	Sgs Microelettronica Spa	Struttura mos di potenza con dispositivo di protezione contro le sovratensioni e processo per lasua fabbricazione.
EP0296627A3 (en) *	1987-06-25	1989-10-18	Kabushiki Kaisha Toshiba	Method for manufacturing a semiconductor device
KR930008899B1 (ko) *	1987-12-31	1993-09-16	금성일렉트론 주식회사	트랜칭(trenching)에 의한 바이-씨모스(Bi-CMOS)제조방법
JP2623635B2 (ja) *	1988-02-16	1997-06-25	ソニー株式会社	バイポーラトランジスタ及びその製造方法
US4943536A (en) *	1988-05-31	1990-07-24	Texas Instruments, Incorporated	Transistor isolation
NL8802219A (nl) *	1988-09-09	1990-04-02	Philips Nv	Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een siliciumlichaam waarin door ionenimplantaties halfgeleidergebieden worden gevormd.
JPH06101540B2 (ja) *	1989-05-19	1994-12-12	三洋電機株式会社	半導体集積回路の製造方法
US5254486A (en) *	1992-02-21	1993-10-19	Micrel, Incorporated	Method for forming PNP and NPN bipolar transistors in the same substrate
JPH06342914A (ja) *	1993-06-01	1994-12-13	Nec Corp	半導体装置の製造方法
DE69415500T2 (de) *	1994-03-31	1999-05-20	Stmicroelectronics S.R.L., Agrate Brianza, Mailand/Milano	Verfahren zur Herstellung eines Halbleiterbauteils mit vergrabenem Übergang
JPH08172139A (ja) *	1994-12-19	1996-07-02	Sony Corp	半導体装置製造方法
AU4993896A (en) *	1995-03-27	1996-10-16	Micrel, Incorporated	Self-alignment technique for semiconductor devices
US6017785A (en) *	1996-08-15	2000-01-25	Integrated Device Technology, Inc.	Method for improving latch-up immunity and interwell isolation in a semiconductor device
JP3527148B2 (ja) *	1999-09-24	2004-05-17	日本電気株式会社	半導体装置の製造方法
US6451645B1 (en)	2000-07-12	2002-09-17	Denso Corp	Method for manufacturing semiconductor device with power semiconductor element and diode
US20060148188A1 (en) *	2005-01-05	2006-07-06	Bcd Semiconductor Manufacturing Limited	Fabrication method for bipolar integrated circuits

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
NL162511C (nl) *	1969-01-11	1980-05-16	Philips Nv	Geintegreerde halfgeleiderschakeling met een laterale transistor en werkwijze voor het vervaardigen van de geintegreerde halfgeleiderschakeling.
US3915767A (en) *	1973-02-05	1975-10-28	Honeywell Inc	Rapidly responsive transistor with narrowed base
US4087900A (en) *	1976-10-18	1978-05-09	Bell Telephone Laboratories, Incorporated	Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions
JPS543479A (en) *	1977-06-09	1979-01-11	Toshiba Corp	Semiconductor device and its manufacture
US4485552A (en) *	1980-01-18	1984-12-04	International Business Machines Corporation	Complementary transistor structure and method for manufacture
NL8006827A (nl) *	1980-12-17	1982-07-16	Philips Nv	Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL8103218A (nl) *	1981-07-06	1983-02-01	Philips Nv	Veldeffekttransistor met geisoleerde stuurelektrode.
US4435895A (en) *	1982-04-05	1984-03-13	Bell Telephone Laboratories, Incorporated	Process for forming complementary integrated circuit devices
US4507847A (en) *	1982-06-22	1985-04-02	Ncr Corporation	Method of making CMOS by twin-tub process integrated with a vertical bipolar transistor
JPS60234357A (ja) *	1984-05-08	1985-11-21	Toshiba Corp	半導体装置の製造方法

1986
- 1986-01-24 IT IT19173/86A patent/IT1188309B/it active
1987
- 1987-01-21 EP EP87100765A patent/EP0231811B1/en not_active Expired - Lifetime
- 1987-01-21 DE DE87100765T patent/DE3788438T2/de not_active Expired - Fee Related
- 1987-01-22 US US07/006,037 patent/US4721686A/en not_active Expired - Lifetime
- 1987-01-23 JP JP62015042A patent/JP2721877B2/ja not_active Expired - Fee Related

Also Published As

Publication number	Publication date
EP0231811B1 (en)	1993-12-15
JPS62183553A (ja)	1987-08-11
EP0231811A2 (en)	1987-08-12
DE3788438D1 (de)	1994-01-27
IT8619173A0 (it)	1986-01-24
DE3788438T2 (de)	1994-04-07
US4721686A (en)	1988-01-26
EP0231811A3 (en)	1988-03-02
JP2721877B2 (ja)	1998-03-04

Publication	Publication Date	Title
IT1188309B (it)	1988-01-07	Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione
DE3861707D1 (de)	1991-03-07	Mos-transistoren fuer hohe spannungen.
IT8419086A0 (it)	1984-01-10	Processo per la fabbricazione di transistori mos complementari a basse tensioni di soglia in circuiti integrati ad alta densita' e struttura da esso risultante.
IT8220661A0 (it)	1982-04-08	Processo per la fabbricazione di transistori mos complementari in circuiti integrati ad alta densita' per tensioni elevate.
HU9402061D0 (en)	1994-09-28	Semiconductor device with mos transistor provided with an extended drain region for high voltages
IT1166587B (it)	1987-05-05	Processo per la fabbricazione di transistori mos complementari ad alta integrazione per tensioni elevate
DE3782367D1 (de)	1992-12-03	Mos-halbleiterschaltung.
DE69003321D1 (de)	1993-10-21	MOS-integrierte Schaltung mit regelbarer Schwellspannung.
FI860222A (fi)	1986-07-20	Puolijohdekomponentti sisältäen korkeajännite-MOS kanavatransistoreita ja matalajännite-MOS kanavatransistoreita
IT1084774B (it)	1985-05-28	Processo per fabbricare transistore ad effetto di campo e bipolari sullo stesso chip semiconduttore
IT1216464B (it)	1990-03-08	Dispositivo semiconduttore ad alta tensione di rottura.
IT1217104B (it)	1990-03-14	Circuito integrato cmos a due alimentazioni con un transistore mos integrato di protezione contro il <<latch-up>>.
IT1190325B (it)	1988-02-16	Circuito di polarizzazione per dispositivi integrati in tecnologia mos,particolarmente di tipo misto digitale-analogico
KR890012388A (ko)	1989-08-26	Mis형 반도체 집적회로장치
IT8721989A0 (it)	1987-09-23	Disposizione di estensione di canale ad elevata velocita'.
IT8619906A0 (it)	1986-03-27	Procedimento per la fabbricazione di circuiti integrati a semiconduttore includenti dispositiv cmos e dispositivi elettronici ad alta tensione.
IT1214606B (it)	1990-01-18	Dispositivo integrato di protezione dinamica, in particolare per circuiti integrati con ingresso in tecnologia mos.
DE3889584D1 (de)	1994-06-23	Ausgangspuffer für MOS-integrierte Halbleiterschaltung.
IT1213192B (it)	1989-12-14	Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.
IT8723162A0 (it)	1987-12-22	Circuito per il mantenimento in conduzione di un transistore mos in mancanza di tensione di alimentazione elettrica.
DE69013057D1 (de)	1994-11-10	Hochspannungsdünnschichttransistor.
IT8119502A0 (it)	1981-02-04	Dispositivo semiconduttore ad alta tensione di scarica.
IT1243934B (it)	1994-06-28	Circuito integrato ad alta tensione.
EP0160183A3 (en)	1986-12-03	High voltage mos field effect transistor
GB8322822D0 (en)	1983-09-28	Mos transistor integrated circuit

Legal Events

Date	Code	Title	Description
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19960129