IE46058B1 - Continuously expandable switching network - Google Patents

Abstract

In this continuously expandable modular switching network, incoming traffic infiltrates the network only to the extent required in order to set up the desired connection. For an extension involving additional switching matrices (110, 112, 113) in two stages, there is no need to alter the internal or external connection lines. A technique is employed in which the outputs (104, 106) of the switching elements of any given stage (stage 1) are connected only to the inputs of switching elements of higher-order stages (stage 2). So-called reversal points (114, 116, 118, 120) of the aforementioned second stage are used to switch a connection.

Description

This invention relates to the switching of space and time division multiplexed transmissions, and especially to a novel switching element and network configuration for implementing a substantially continuously expandable switching network in a telephone exciiange, telephone central office, PABX, remote concentrator, data circuit switch or other device wherein a plurality of terminal interconnections are required.

Currently available TDM switching networks use time-slot-interchange modules or space switching modules using time-shared space interconnections, usually two of the former modules and one of the latter or two of the latter modules and one of the former. U.S. Patent No. 3,770,895 is illustrative of a time-slot-interchange of the prior art, and U.S. Patent No. 3,963,872 is illustrative of a folded multiple stage switching network of the prior art. These networks are generally incapable of modification without extensive recabling to accommodate major system size expansion.

Known switching networks are designed to cover particular size ranges·, i.e., the number of lines that can be switched, whereas the present invention is adaptable to switch over a wide and expandable size range.

An abject of the- present invention is to provide a switching network which may be economically constructed and which is readily expandable.

According to the present invention there is provided an expandable switching network including a number of switches arranged in a plurality of switching stages, - 2 46058 each said switch having two or more inlets and two or more outlets, wherein each said switch can selectively reflect traffic entering any one of its inlets via one of its outlets and back to any other of its inlets and can connect any one of its inlets to any one of its outlets, wherein the outlets of each switch of the highest order switching stage are used solely as reflection points for reflected traffic between inlets of that same switch and are not connected to any other switch of the network, and wherein the outlets of the switcnes of the stages other than the highest order switching stage can each oe used as a reflection point for traffic between inlets of its own switch and either are not connected to inlets of other switches or are connected to inlets of switches of a stage higher than its own.

There is no upper limit from a network configuration standpoint to the expandability of such a network, i.e., the network is readily expandable from a few hundred linen requiring a small number of stages to a large number of lines, i.e., 50,000 lines requiring more stages. Also, a working small network can be readily expanded to a large working network without recabling as would be required in systems of the prior art.

A continuously expandable switching network configuration is described wherein the outlets of the stages comprising the network are connected only to the switches in higher level stages, thus eliminating the need-for recabling in the event of system expansion. The connections between terminals are accomplished by use of the reflection and the connection characteristics of the individual switching elements. By reflection characteristics, the capability of interconnecting two inlets within the same switch is met. This network is implementable with either analog or digital transmission schemes over either two or four wire traffic paths and with space and time switching and combinations thereof.

In a preferred embodiment of this invention, a combined multistage space switch and time-slot-interchange switching network is described which uses.as each of its individual switching.elements an integrated signal switch and control circuit by which traffic can.be interconnected to another inlet or connected to an outlet. The described network configuration is applicable to either analog or digital traffic switching and is particularly advantageous when used in a four wire network as either a group switch, a concentrator, a deconcentrator or any other type of PCM switching unit requiring the capability of space and time switching to connect any time slot on any incoming multi15 plexed line to any.other time slot on any other outgoing multiplexed line. The described switch may be incorporated in the network for switching both the forward and return paths of four wire interconnections by a controllable reflection point technique and a path selection control accessible for distributed control Command.with digitally encoded speech and control commands with direct control of the speech path, thereby eliminating extra.control lines.

It is therefore a primary object of the present invention to provide a substantially continuously expandable switching network.

Embodiments of the invention will now be described with reference to the.accompanying· drawings, in which; Figure3A is a simplified junctor switch of the prior - 5 art using the reflection point technique.

Figure IB is.a known use of reflection and connection verticals in a known switching network.

Figures 2A, 2B, 2C and 2D are simplified switching network configurations illustrative of the network expandability of the reflection technique of the present invention, wherein typical single block, two block, three block and eight block switching network configurations are shown, respectively.

Figure 3 shows a space switch on the inlet side of a time-slot-interchange also using the reflection technique.

Figure 4 is a graph of blocking versus the number of stages of switching for different levels of traffic intensity.

Figures 5A and 5B illustrate the switching matrix expansion by use of reflection/connection outlets, wherein Figure 5A is a single switching module and Figure 5B is an expanded switching module.

Figures 6A to 6E illustrate a multistage switching network expansion configuration in accordance with the present invention.

Figure 7A represents a four wire path complementary delay.

Figure 7B illustrates the control logic for a single entry or exit point.

Figure 7C is an equivalent logical representation of the control logic described with reference to Figure 7B.

Figure 8 is a time switch control circuit for a four wire delay line time switch using the switching logic described with reference to Figure 7B.

Figure 9 is a logic and block diagram of a network crosspoint.

Figure 10 is a block diagram of the network crosspoint of Figure 10 incorporated within a network matrix.

The reflection point technique has been employed in known systems such as the Al crossbar networks marketed in U.S.A. by ITT, in which system it is used in a space division switch by closing two horizontals on one vertical. This is illustrated by Figure 1Λ, wherein traffic on line units 10 and 12 are coupled to a junctor switch 14 via horizontal matrix lines 16 and 18 to a vertical line 20.

Each line unit 10 and 12 may comprise a small network of crossbar switches having coupled thereto input/output lines.15. The reflection concept is implemented by the coupling of traffic on line 16 to the junctor switch 14 wherein it is reflected off vertical line 20 and exits from the junctor switch via horizontal line 18.

A known improvement over the technique of Figure IA is shown in simplified form by Figure IB, which shows the reflection point concept used by the ESR-1 PABX switching network of Standard Elektrik Lorenz A.G. In this system, the vertical lines are connected between switching modules at the same level in the network hierarchy, thus limiting the maximum size to which the network can be expanded. Thus line units 22, 24, 26 and 30 are connected on respective 6 0 58 - 7 horizontal lines 32, 34, 36 and 38 to switching modules 40 and 42. Module 40 serves to interconnect line units 22 and 24 by reflection, module 42 serves to interconnect line units 26 and 30 by reflection and modules 40 and 42 together with link 44 serve to interconnect line units 22 and 24 with line units 26 and 30.

The numerical designation (1) on lines 32 and 34 is equivalent to the intermodule connection of traffic on lines 32 and 34. For this condition, crosspoints 46 and 48 are closed. The numerical designation (2) on lines 34, 38 and 44 is equivalent to the intermodule connection of traffic on lines 34 and 38. For this condition, crosspoints 48 and 50 are closed while crosspoints 46 arid 52 are open.

The system of Figure IB, while using the basic reflection technique, provides a system whereby the vertical of one switch is connected to another switch at the same level in the network hierarchy, i.e., to the same level switching stage, which limits the maximum size to which the network can be expanded. By contrast with such known systems and in accordance with this invention, it has been discovered that by connecting the reflection/ connection verticals only to horizontals of higher level switches, which higher level switches also have reflection/ connection verticals, a continuously expandable switching network is obtainable.

As used herein, the terms input, output, inlet and outlet are defined as follows. An input is a port to a switch or combination of switches, which port carries - 8 signals from outside the switch into the switch, while an output is a port on a switch carrying signals from the switch. An inlet j s a connection to a switch, having both an input port and an output port, which carry the signals for the two directions of transmission forming a full duplex communication path, and which connect to one side of a switch. An outlet is a connection to a switch having both an input port and an output port which carry the signals relating to the two directions of transmission forming a full duplex communication path and which connect to the side of the switch opposite to the inlet.

Referring now to Figures 2B to 2D, a folded network is described which illustrates the reflection/connection technique of this invention, in which the outlet from any switch of a·particular stage is never connected either to the same or to a lower level stage, and wherein the sequence of numbering of the stages is from the terminal stage into the folding point in increasing order. Note that this network configuration is greatly simplified to illustrate the network expandability. By way of definition, every switching matrix consists of a number of depths, ranks, or stages of switches through which the path connecting two terminals must pass. In a non-folded network, the connecting path crosses each stage once only and the path from the originating terminal to the terminating terminal always crosses any one stage in one direction only. In a folded network, the connecting path between an originating terminal and a terminating terminal may cross any stage in either direction and will cross at least one stage at least twice, once in each direction. - 8 46058 - 9 In the present system, the cutlets of the highest numbered switching stage uie used as reflection points, but these outlets are always available for connection to yet a higher numbered stage without circuit modification.

Thus the outlets are used to connect to another switch or may be considered as folding points. A folding point may be defined as that point in a folded network at which a signal switched through the network reverses direction through the network, i.e., stops its progression toward a higher level st ige. Add it iuiiu I ly, the reflection and connection capability of the witch may be utilized on alternate connections. figure 2A shows a 2 x 2 line switch having two inlets, 100 and 102, and two reflection points, 104 and 106. Reflection points 104 and 106 are also connection verticals as will be described. Where each of the inlets 100 and 102 1.. a twenty-four channel TW line, then switch 108 provides a switching capability of 150 lines with suitable concentration, as is well known, on one inlet and up to twenty-four trunk linen on the other inlet with full interconneetability therebetween ai will be described.

Another example of the reflection/connection technique is the case i.n which inlet loo has coupled thereto a circuit having six lines concentrated thereon, while inlet 102 comprises a two-way trunk line to another switching location in an analog or non-mul.ti.plexed configuration. By using only one of the reflection ports 104 or 106, both line-to-line (revertive) or line-to-trunk calls may be - 10 46088 Implemented one at a time. This network is continuously expandable, e.g., to twelve lines and two trunks as in Figure 2B, wherein additional switches 110, 112 and 113 of identical configuration to switch 108 are added giving expansion to two stages. For purposes of description, the switch added to expand to a second terminal switch is identified by the numeral 2.

When interconnection among channels within switch 108 are required, the outlets 104 and 106 of switch 108 are used as reflection points, i.e., for telephone calls among the original lines and trunks. The reflection properties of switch 108 are used while calls are also switched among the new terminals in similar manner. However, for calls between a terminal served by switch 108 and a terminal served by switch 110, then the outlets of switches 108 and 110, i.e., switches both first stage /, are switched through to a common second stage switch, either switch 112 or 113. The reflection points of the second stage at 114, 116, 118 and 120 are used to complete the connection. Thus for connections between channels of primary switches 108 and 110, an outlet on each of these switches is used as a connection port to a common higher level switch, with one of the outlets of such higher level stage used as a reflective port.

Figures 2C and 2D illustrate the continuous expansion of the switching network to three and eight 46053 - 11 primary switches, respectively. This expansion technique without rearrangement either of internal or external connecting links, can be achieved for space and time division switching and to any desired size basic switching element; however, the space division implementation is illustrated by Figure 2. With reference to Figure 2C, the three primary switching block configuration illustrated provides a capability of six additional lines and another two-way trunk due to the thrrd switching block 126. Two-thirds of JO the incoming traffic from switch 126 would statistically be destined for the first two switches, 128 and 130, since twothirds of the incoming lines and trunks to the switching network are coupled to switches 128 and 130. However, since each inlet provides one unit of traffic, then two-thirds of the two switching units 128 and 130 is four-thirds of a traffic unit which exceeds the traffic-capability of one switch outlet; hence, two secondary stage switches -132 and 134 are provided for the third primary switching unit 126.

As will become apparent with respect to Figure 2Π, the addition of a fourth switching unit will not result in the rearrangement of any existing links. The switching blocks 136 and 138 of the second stage and switching blocks 140 and 142 of the third stage are of the same configuration as are the primary stage switching blocks. The network expandability without rearrangement of existing connecting links is illustrated as extended to eight primary switching blocks, each of which may, for example, have coupled thereto six lines and a two-way trunk line as illustrated - 11 - 12 46058 in Figure 2D. The eight primary switching blocks 150 to 164 of the first stage may be identical in configuration to the switching units of Figures 2A to 2C. In contradistinction to a single stage folded network, the present switching network configuration is more economically expandable since the cost of a single stage folded network in terms of crosspoints per line increases linearly with the number of terminals, i.e.f inlet ports or lines, while the present network, in terms of crosspoints per line, grows approximately as the logarithm to the base 2 of the number of terminals. This relationship is illus- trated by the following table ! for the eight block network of Figure 2D. 15 Primary Blocks (2N) No. Switches Added Total Switches In Network No. Switches In Network Per Primary Block N where N = (Stage No. -1) 1 1 1 1 0 2 2 4 2 1 3 5 9 3 4 3 12 3 2 20 5 7 19 3.8 6 5 24 4 7 5 29 4.1 8 3 32 4 3 16 80 5 4 25 32 192 6 5 The switching blocks added to the network in stages 2, 3 and 4 are identified by numerals corresponding to the addition of the primary switching block, the - 13 addition of which rertuires the addition of the corresponding higher level switching. Thus the addition of primary switch 156, the fifth primary switch, results in the addition of second stage switches 166 and 168, third stage switches 170 and 172, and fourth stage switches 174 and 176.

Figure 3 is a preferred form for the elemental switch, a number of which form the overall switching network. Each elemental switch must function as a space switch capable of switching m in'et connections to n outlet connections. Additionally, each elemental switch must comprise at least one time-slot-interchange (TSI) unit for each inlet or outlet, m being the number of inlet connections and n the number of outlet connections. This designation of inlets and outlets is exemplary only, and the number of TSTs would correspond to the smaller number of m or n. If a number of TSfs equal to the larger of m or n or in any event greater than the smaller of m or n were used, the network would still be functional, but at reduced efficiency. Finally, each elemental switch must include enabling gates for signal reflection which is critical for a four wire network. The connection/reflection gates are shown in Figure 3 in simplified form, but each of these gates corresponds to the logical implementations described with reference in part to Figure 7A.

A space switch which can switch m x n is also required. A concentration capability is implemented if m is greater than n and an expansion capability if n is greater than m. Further, in the concentration case, when - 14 a symmetrical (n x n) switch is desired, only n of the m inlets need be used, since the non-utilization of the remaining inlets would result in only a small number of inexpensive gates being non-utilized. Furthermore, an m x 2n switch may be achieved by connecting the inlets of the necessary additional switches to the inlets 234 and 236. Of course, the value of m can vary widely with m being any number of inlet connections and n being any number of outlet connections.

Referring now to Figure 4, a graph of blocking B versus number of switching stages N for four levels of link occupancy is illustrated. The term blocking as used herein may be defined as the inability to interconnect the idle lines or trunks connected to a network because of the impossibility for whatever reason to achieve such interconnection. The term non-blocking network as used herein may be defined as a network in which there is at all times at least one available path or link between any pair of idle lines or trunks connected thereto, regardless of the number of paths already occupied.

Two important aspects of network operation are the ability of the network to respond to varying traffic levels and the effect of an increased number of stages on the network operating characteristics. In the present systems, as the number of network stages increases, with each stage comprehending a plurality of switches in a switching network, each having an identical parallel function to another switch in the switching stage of equal rank, the blocking does not continuously increase but approaches an asymptotic value between zero and one depending upon switch size and traffic intensity. The term traffic intensity as used herein may be defined as the traffic ouantitv in one or more traffic paths per unit of time and is generally measured in Erlangs. In the present system, the network blocking characteristic B for a particular number of switching stages N for low, medium and high traffic levels is such that a relationship exists between the blocking characteristic and N, where N is the number of stages such that once a maximum blockinq level is reached, the network blocking will not further increase, i.e., the network blocking versus N curve becomes asymptotic at a maximum blocking level. This is shown in Figure 4 for four levels of traffic intensity with curve 1 representative of low traffic intensity, curve 2 representative of low to medium traffic intensity, curve 3 representative of medium to high traffic intensity, and curve 4 representiitive of high traffic intensity. As the switch size in each stage is increased, the blocking probability becomes lower for a given traffic intensity E.

Referring now to Figures 5A and 5B, the network expansion by the reflection/connection output terminal is illustrated. Speech connections in switching block 300 are provided by the TDM space matrix 302 and the channel interchange units such as 304, 306 and 308. Each inlet (of which 310, 312, 314 are examples) and each outlet (of which 322, 324, 326 are examples) has input and output - 16 connections which carry the input and output paths of the four wire connection. As used herein, the terms channel interchange units and time-slot-interchange units are interchangeable. Each switching matrix module 300 will provide for thirty-two channels on each of eight inlets of which three are illustrated at 310, 312, and 314 (inlets 0, 2 and 7, respectively) for simplicity of description.

Data on inlets 310, 312 and 314 at the inputs 311, 313 and 315 thereof, respectively, shown as inlets 0, 2 and 7 of eight inlets may be switched to the inlets of the channel interchange units 304, 306 and 308 via the TDM space switching matrix 302 at 316, 318 and 320, respectively. Thus, data at any of the switching module inputs may be selectively coupled to any of the inputs of the channel interchange units for each of the channel times. Three channel interchange units 304, 306 and 308, one for each of the illustrated switching module outputs illustrated at 322, 324 and 326, introduce a predetermined delay, effectively switching data from a time channel on the input thereto to a different time channel on the output such that no two channels occupy the same position in time on each channel'interchange output. For example, data on input 313 of inlet 312 is switched via crosspoint 354 to input 244 of channel interchange 306 inlet 318. Channel 15 data on input 313 is effectively converted to channel 21 data on output 328.

The channel interchange units may comprise well known units such as are described in U.S. Patent No. 3,740,483 and which patent references a number.of well known time slot interchange references. In the present systems, the output - 17 328 of channel interchange 306 outlet 324, for example, may be controllably forced into a changed impedance state to connect to the input 330 of channel interchange 306 out!el 324 as illustrated, The channel interchange can cause, for example, the data on input 330 for channel 21 to be converted to the data in time channel 9 on the output 334 of inlet 318. Switch 302 by means of crosspoint 340 switches the data from output 334 to output 338 of module inlet 314. This describes the data path corresponding to two vires of the four wire path. The other half of the data oath is described as follows. Data on input 315 of inlet 314 at channel time 9 is switched via crosspoint 342 to the input 244 of inlet 318 of channel interchange unit 306. The channel interchange unit 306 transposes in time the data on channel 9 to channel 15 on output 334 of inlet 318 and couples same to crosspoint 350 which couples the data in channel 15 to output 352 of inlet 312. The contr· ! is such that independent access is provided from each of the switch matrix module inlets 310, 312, 314, etc. to the channel interchange inlets, all in a predetermined format.

Referring now to Figure 5B, the expanded switch of Figure 5A is illustrated with a new traffic path and connections therefor when a plurality of like switching modules are interconnected in a multistage switching network. Thus it may be seen that a traffic path is established from input channel 15 of inlet 2 of module 300 to output channel 21 of outlet 6 of module 300. Outlet 6 of module 300 is connected to inlet zero of module 300Λ. Input channel 21 of inlet - 18 zero of module 300A is connected to output channel 30 of outlet 7 of module 300A. Thus, channel 30 of outlet 7 of module 300A becomes the reflection point for the described connection, which is completed via input channel 30 of outlet 7 of module 300A, which is coupled to output channel 17 at inlet 7 of module 300A. Inlet 7 of module 300A is connected to outlet 6 of module 300B, which connects input channel 17 of outlet 6 to output channel 9 of inlet 7 of module 300B. This illustrates the connection of input channel 15 of inlet 2 of module 300 to output channel 9 of inlet 7 of module 300B by reflection at channel 30 of outlet 7 of module 300A. The return half of the four wire connection is the complement of this sequence.

The path selected through switch 300, as described for Figure 5A before expansion of the network is equally possible for switch 300 after the expansion shown in Figure 5B. The choice of reflection or through transmission at outlet 6 of module 300 will depend upon the path required. Thus, it has been shown that the switching module of Figure 5A is expanded modularly in a multistage configuration by the reflection technique to permit any requisite input interconnection while simultaneously leaving the reflection output available for further expansion by connection to a higher order stage. Other switching modules 300C, 300D are of like configuration as the aforedescribed modules.

Referring now to Figures 6A to 6E, distribution networks wherein each switching block is a 2 x 2 switch illustrates quantitative examples of the present invention. - 19 Of course, in eictual nractice, larger switches in the order oi 8 x 8, 16 x 16, 32 x 32, etc. could be used, depending upon packaging, cabling and other economic considerations.

For 192 lines on a thirty-two channel carrier at a traffic density of .1 Erlang/line, a traffic density of .6 Erlang for each of the thirty-two channels results. Assuming that 50?. of the traffic is intraoffice, then trunk traffic is 19.2 Erlang divided by r.'o, or 9.6 Erlangs per 192 line carrier. If trunk traffic is one-way over one group in each direction, each trunk group would require the caoability to carry 4.8 Erlangs per 192 lines. The following table refers to Figures 6A to 6E of the combined time and space network.

Nunber Trunks Total Fig No. Lines Line Erlangs Trunk Traffic One-Way Traffic (1¾ Blocking Probability) Number Trunks Number Switches 6A 192 19.2 9.6 4.8 11 22 1 6B 384 38.4 19.2 9.6 18 36 4 6C 576 57.6 28.8 14.4 25 50 7 6D 768 76.8 38.4 19.2 31 62 9 6E 960 96.0 48.0 24.0 37 74 12 A switch embodying the invention may be implemented on a single LSI chip, combining both space and time switching and may be cascaded and interconnected to form a continuously expandable network of, for example, two thousand to one hundred thousand lines. Functionally, the channel interchange portion of this switch can be onerative as a delay line which, whether implemented by charge coupled devices (CCD) or as a MOS dynamic shift register performs /J.60S8 - 20 the complementary delay required to produce a four wire path as shown by Figure 7A, in which two signal inputs are illustrated by SI and S2 on lines 700 and 702, respectively, whereby SI and S2 have variable delays illustrated for S2 at 706 and 708 typically from 5 to 125 microseconds, while the delay of signal SI is illustrated at 709. The total delay 706 plus 708 plus 709 is typically 125 microseconds.

Logic for implementing this delay is illustrated by Figure 7B. Each signal entry and exit point has the capability of entry, extraction or coupling a currently existing signal through the switch. A time-slot-interchange control signal C on line 710 is coupled to AND gates 712 and 714 and to AND gate 716 via an inverter 718. A digitized voice signal SI is AND'ed with the control signal at AND gate 712, while S2 is AND'ed with the control signal at AND gate 714. The digitized voice signal S2 is coupled from a shift register 720 to AND gates 714 and 716, and is AND'ed at gate 716 with the inverted control signal. The output of AND gate 716 (signal S2) is OR'ed with the output of AND gate 712 signal (SI) at OR gate 722. Thus either SI or S2 is coupled through to shift register 724. The simplified logic of Figure 7C illustrates shift registers 720 and 724 and the aforedescribed logic 726, and will be used hereinafter. When the described control logic is for an inlet, the control signal in line 710 is a selected stored control signal; however, when the described control logic is for an outlet, the control signal is a reflection control. - 20 46058 - 21 Figure 8 illustrates a time switch and its associated control· gating logic as described with reference to Figure 7B for a multiple channel four wire configuration. The input signal Si is coupled to the switch inlet 800 input line 802 while the S2 output, the return path of the four wire connection, is extracted from the switch inlet output line 804. Outlet 806 includes an outlet input line 816 and an outlet output line 818.

The signal delay for signal SI between inlet 800 input 802 and outlet 806 output 818 is soloctably variable by selecting the desired signal input point 802, 808, 810, 812, etc. or other input points (not shown) in the delay line time switch, under the programmed control of control store 814, which contains the addresses of the signal input points in a predetermined and variable order. By accessing the address of the desired signal input point: from the control store 814, signal SI is entered into and Ξ2 is extracted from the selected access point in the delay line. The control store 814 is timed by a timing circuit 820 to be synchronous with the speech delay line such that the adress to be selected for each SI input point is coupled from the control store 814 via line 822 to a serial-toparallel shift register 824. The output of register 824 is used to select and operate one of the logic gating circuits provided for each of the thirty-two channels controlling the selected input gates 802, 808, 810, 812, etc. These control signal logic gating circuits are illustrated for channels, one, two, three, thirty and thirty-one at -. 21 46058 - 22 826, 828, 830, 832 and 834, respectively. The parallel output from register 824 is coupled to gates 826 to 834 via lines 836 to 844. Line 846 serves as the delay line return line from reflection gate 848. A synchronization signal supplied to timing circuit 820 matches the speech sample rate and the control code rate of the control store 824 in time. The two rates need not be bit synchronous since the two codes may differ, i.e., the speech sample may comprise eight bits, while the control code may comprise five bits. Each signal insertion, extraction and bypassing switch 850, 852, 854, 856, and 858 between the input and output delays 860 to 870 associated therewith provides the mechanism to allow the selection of the insertion/extraction point of the SI and S2 signals, respectively, to provide the required amount of delay between inlet and outlet for SI and the complementary delay of the return path for signal S2.

The insertion, extraction and bypassing switch 848 enables signal reflection at the switch output when the path chosen between calling and called subscriber requires the folding of the path at this point in the network.

The reflection of a particular connection, when desired, is accomplished by the activation of control lead 872 of the reflection gate 848 at the appropriate time. By way of example, a sample of the signal SI is entered on input 802 of inlet 800 and is to be reflected and returned from output 804 of inlet 800 at a predetermined later time, such as two channel times later as the signal SI* at the same channel time, when the complementary signal S2* (which - 23 is a sample of the signal in the other direction of conversation) is entered at input 802 on inlet 800 and output at 804 on inlet 800 as signal S2 at 30 channel times later, which is representative of thirty-two minus two channel times, at the same channel time when the next sample of SI is being entered at 802. To accomplish the foregoing, the selection gate 826 activates the input/ output logic 858 to insert·. SI into the delay line and reflection control 872 ori reflection gate 848 is activated one channel time later to reflect SI into path 846.

Selection gates 834 are then activated to control input/ output logic 850 one channel time later to extract signal Si and place it as SI* on the output 804, while simultaneously inserting the signal S2* on input 802 into the shift register delay line 862. Upon the expiration of thirty additional channel times, selection gates 826 will again activate input/output logic 858 to extract the signal S2* and output S2* on output line 804 as signal S2. Simultaneously with the foregoing, the next sample of SI from input line 802 is inserted into shift register delay 870.

The described switch thus transmits and reflects signals SI and S2 in accordance with the requirements of the particular switching path as determined by the control storage 824.

Digitally encoded speech and control messages to direct the selection of switching module interconnection paths and channel interchange delays coupled via the switch module interconnections are encoded for each channel into - 24 sixteen serially transmitted bits. Typically, 8k frames per second are transmitted, with thirty-two channels per frame and Ιδ-bits/channel. Timing is provided such that channel 0, for example, occupies the same time slot (or period) on both the input and output connections. The channel interchange permits the 16-bits contained by each channel to be controllably transferred to a different channel by the introduction of delay into the bit stream. Such delay (for the thirty-two channel case) is a minimum of one channel period and a maximum of thirty-one channel periods. Reflection is accomplished by controllably changing the impedance switch outlets corresponding to either channel interchange to the high impedance state and connecting together the output and input of the selected channel inter15 change outlet.

Referring now to Figure 9, a typical time division space orosspoint xy used with the time switch hereinbefore described, is illustrated at 900 for the crosspoint of inlet x comprising input line 902 and output line 904 and outlet y comprising input line 906 and output line 908 from and to the associated crosspoint channel interchange (hereinbefore described), respectively. Switch 910 has coupled thereto as one input a switch select signal from the control storage and the output via line 906 from the channel interchange unit associated therewith, and its output is coupled to the output line 904 of inlet x. Switch 912 has coupled thereto a switch select signal from the control store and the signal on the input line 902 of inlet x, and has its output on - 25 line 908 to its associated channel interchange unit. Output and input switches similar to 910 and 912 from up to seven other inlets may be connected to lines 906 and 908 at commoning points 924 and 926. The input and output lines 902 and 904 of inlet x are also coupled to a port recognition redundancy check fault detection circuit 914 and to a channel idle detection circuit 916 via AND gates 918 and 920, respectively, with the other input to gates 918 and 920 being a monitor to enable the gates at desired times.

The port recognition and redundancy check.'fault detection circuit 914 which may be of conventional design is provided to detect messages on input 902 directed to the control circuits associated with outlet y, to check the coding of messages to determine that such messages do not contain errors, to detect idle channels on the inlet input 902, and to output signals on inlet output 9f)4 to indicate the busy/ free condition of outlet y. Port recognition and redundancy check fault detection circuit 914 receives commands such as a send busy command from the control circuits associated with outlet y and consequently couples out a signal indicative of a busy/fault message to line 904. When circuit 914 recognizes a selection request message on input line 902 destined for outlet y, circuit 914 couples a priority select signal to a crosspoint priority control circuit which arbitrates among simultaneous requests on more than one inlet for output to outlet y. The output of channel idle detect circuit 916 is coupled to a free channel selection circuit via line 922. - 26 A matrix of crosspoints xy as described with reference to Figure 9 is illustrated by Figure 10 wherein one representative outlet 960 and its control out of a possible eight other outlets in a matrix of eight inlets by eight outlets is shown connected to two inlets, 962 and 964 out of the possible eight inlets, zero to seven. Crosspoint xy illustrated at 900 corresponds to the crosspoint described with reference to Figure 9. Also, as described with reference to Figure 9, eight such crosspoints may be connected to the time switch (channel interchange) 928 via lines 906 and 908. Time switch 928 is described with reference to Figure 8. The port recognition redundancy check fault detection channel idle detection circuits at 930 and 932 operate in like manner as circuit 914 described with reference to Figure 9, and channel idle detection circuitry 934 and 936 operate in like manner as does the channel idle detect circuit 916, also described with reference to Figure 9. The outputs 922, 938 and 940 of port recognition circuits 914, 930 and 932, respectively, are indicative of the receipt of messages at those respective circuits requesting connection to channel interchange 928 and are individually and separately connected to the crosspoint seizure priority control circuit 942. Upon receipt of simultaneous requests on two or more lines, circuit 942 is operative to select one of the reauesting inlets and commands the sending of busy signals to the other nonselected requesting inlets by signals on lines 944, 946 or 948 as the case may be, to the respective circuits 930, - 27 914 and 932 as appropriate, which busy signals are applied to the respective output lines on the crosspoint inlets as described with respect to Figure 9. CrossDoint selection circuit 950 accepts and stores in a control delay line therein of like design to control store 814 described with reference to Figure 8, the crossooint selected by crosspoint selection circuit 942 for each of the thirty-two channel periods, and will open and close the selected crosspoint for each channel period by coupling signals onto the aopropriate control lines 952, 954, etc. Signals on input 956 of outlet 960 may include path selection control signals received from a higher stage switch after reflection and which signals are recognised by previously described circuit 932. Outlet 960 thereby forms one of the inlets of such higher stage switch. Channel idle detect circuits 934 and 936 perform the same function as does channel idle detection circuit 916 described with reference to Figure 9. It is to be understood that the matrix illustrated by Figure 10 is exemplary only. However, and by way of example, an additional seven matrices identical to that described with reference to Figure 10 may be connected to the inlets 962 and 964 at the commoning points 966 and 968. Up to six additional inlets having circuitry and connectivity identical to that illustrated by inlets 962 and 964 are implementable.

Claims (19)

1. An expandable switching network including a number of switches arranged in a plurality of switching stages, each said switch having two or more inlets and two or'more outlets, wherein each said switch can selectively reflect traffic entering any one of its inlets via one of its outlets and back to any other of its inlets and can connect any one of its inlets to any one of its outlets, wherein the outlets of each switch of the highest order switching stage are used solely as reflection points for reflected traffic between inlets of that same switch and are not connected-to any other switch of the network, and wherein the outlets of the switches of the stages other than the highest order switching stage can each be used as a reflection point for traffic between inlets of its own switch and either are not connected to inlets of other switches or are connected to inlets of switches of a stage higher than its own.

2. An expandable switching network with a number of switches arranged in a plurality of switching stages, each said switch having two or more inlets and two or more outlets, wherein each said switch can selectively reflect traffic entering any one of its inlets via one of its outlets, and back to any other of its inlets and can connect any one of its inlets to any one of its outlets, wherein the outlets of each switch of the highest order switching stage are used solely as reflection points for traffic between inlets of the same switch and are not connected to any other switch, wherein outlets of switches of the said highest order switching stage are available for connection to inlets of switches of a stage of still higher order in the case of expansion of the network, wherein the outlets of the switches in the stages other than the highest order switching stage can each be used as a reflection point for traffic between inlets of its own switch and are either not connected to inlets of other switches or are connected to inlets of switches of a stage of higher order than its own switch, and wherein a said outlet which is connected to an inlet of a higher order stage than its own stage is usable either as a reflection point for traffic - 28 4 6058 between inlets of its own switch or for connectionsto an inlet to a switch of such a higher order stage.

3. A network in accordance with Claim 1 or 2, and wherein to expand the switching network there is provided an additional stage of switches, each switch of said additional stage having two or more inlets and two or more outlets and being adapted to selectively reflect traffic entering any inlet thereto back via one of its outlets to any other inlet; and means for connecting the outlets of the switches of said highest order switching stage of the network to the inlets of the switches of said additional stage, such that the outlets of said switches of said highest order stage are operative either as reflection or connection points and the outlets of the switches of said additional stage are used solely as reflection points, and such that said additional stage of switches is the highest order stage of said expanded switching network.

4. A network in accordance with Claim 3, and wherein the inlets of said additional stage are connected to the outlets of the switches of said highest order stage by said connecting means such that no previously connected switches in any of said plurality of stages of switches is disconnected during said expansion.

5. A network in accordance with Claim 3 or 4, and wherein the network blocking approaches asymptotically a value between zero and one as the number of network stages is increased.

6. A network in accordance with any one of Claims 1, 2, 3, 4 or 5 and wherein the network is a folded network.

7. A network in accordance with any one of Claims 1 to 6, wherein said switches are space division switches.

8. A network in accordance with any one of Claims 1 to 6, wherein said switches are time division switches.

9. A network in accordance with any one of Claims 1 to 6, wherein said switches are combined space division and time division switches. - 29 46058

10. A network in accordance with any one of Claims 1 to 6, and including traffic selection control means for controlling the path of traffic through the network; and data storage means for deriving a command signal for accessing said traffic control means such that said conmand signal is coupled over the same path as said traffic.

11. A network in accordance with Claim 10, wherein said path is the speech path.

12. A network in accordance with Claim 10, wherein said incoming traffic is comprised of a series of samples representing a speech waveform, each of said samples being digitally encoded.

13. A network in accordance with Claim 12, wherein said encoding is linear PCM.

14. A network in accordance with Claim 10, wherein said incoming traffic comprises digitally encoded analog signals.

15. A network in accordance with Claim 10, wherein each of said inlets and outlets has an input and an output and wherein each of said inputs and outputs of each inlet and outlet comprises a time division multiplexed line.

16. A telephone switching exchange including a network as claimed in any one of Claims 1 to 15.

17. A telephone switching exchange in accordance with Claim 16, wherein said network is a folded network having a folding point and wherein the switching stage order increases from a terminal stage to the folding point.

18. An automatic telephone exchange, which includes a plural-stage switching network with subscribers' lines and other exchange peripherals connected to inlets of the first stage of the network, traffic control means for controlling the paths of telephone traffic through the switching network, and data storage means in which wanted number information is inserted and from which may be derived command signals for accessing said traffic control means, wherein the speech is conveyed within the network in digitally encoded form and the command signals are conveyed from the storage means to the traffic control means over the - 30 46058 same physical path as is used for the digitally encoded speech, wherein each said switch has two or more inlets and two or more outlets with digitallyencoded speech signals conveyed in time division multiplex manner over multiplex highways which form said inlets and said outlets, wherein each said switch can 5 selectively reflect traffic entering any one of its inlets via one of its outlets and back to any other of its inlets and can connect any one of its inlets to any one of its outlets, wherein the outlets of each switch of the highest order switching stage are used solely as reflection points for traffic between inlets of that same switch and are not connected to any other switch, wherein outlets 10 of switches of said highest order switching stage are available for connection to inlets of switches of a still higher order in the case of expansion of the network, wherein the outlets of the switches in the stages other than the highest order switching stage can each be used as a reflection point for traffic between inlets of its own switch and are either not connected to inlets of other 15 switches or are connected to inlets of switches of a stage of higher order than its own switch, and wherein a said outlet which is connected to an inlet of a higher order stage than its own stage is usable either as a reflection point for traffic between inlets of its own switch or for connections to an inlet to a switch of such a higher order stage.

19. 20 19· A switching network substantially as described with reference to Figs. 2 to 10 of the accompanying drawings.