HU179871B - Apparatus for searching extreme value of and noise compensation at the procession of sampled signals - Google Patents

Abstract

The system has each sampled value stored until the following sampling cycle, together with the momentary output value. A mean value is obtained from each actual sampled value, the stored sampled value and the output value and is used to provide a replacement output value if the stored sampled value or the stored output value differs from it by more than a given amount. Pref. the system uses an a-d converter (1) coupled directly and via a buffer register (2) to respective inputs of a logic current circuit (5). This provides the mean value and has an output coupled to an output register (3) and a third input receiving the output of the latter. The output register (3) is controlled by a common system clock source (4) via a gating circuit (6). The system is used for measured values from a measuring instrument.

Description

FIELD OF THE INVENTION The present invention relates to an apparatus for searching for a spread value and for compensating for interference processing of sampled signals.

With the apparatus of the invention, the time extremes of the sampled signals containing time-varying interfering signals can be determined and stored.

Several measurement methods are known in which a measuring device or sensor provides a time-varying analog signal and the useful measurement result is the peak (local maximum) of this signal or the "valley" (local minimum) between the peaks. Such a case occurs eg. immersion metal melting thermometers, quadrupol mass spectrometer peak mass monitoring equipment (so-called peakmultiplexer), shockwaves in flowing gases and liquids, and explosion and suction pressures in explosive engines. Such measurements are generally complicated by the fact that the input analog signal also contains a noise component, which is usually composed of short pulses occurring at random times. The amplitude of these pulses may sometimes exceed the maximum or minimum value to be measured and may result in erroneous results. There are several ways to eliminate this harmful phenomenon.

In one such known method, the amplified and sampled signal is signaled to the operator by means of an instrument or a numeric display. Maximum monitoring is the responsibility of the operator, who monitors, interprets, ignores the current outliers, and accepts a more permanent extreme value as a measurement result. The method and the associated device are very simple. It has the disadvantage that it is only capable of evaluating relatively slow-moving signals and may result in erroneous judgment due to subjective judgment by the operator.

Alternatively, the extreme value displayed by the analogue or numeric device is automatically stored until reset after measurement. Exceeding the extremes of disturbance by avoiding a low pass filter in front of the extremes monitoring device, which suppresses short-term pulses, is avoided. The method produces objective data. The disadvantage is that effective interference filtering requires the application of a constant time corresponding to a multiple of the sampling period, which not only filters the signal but also delays it, so that the extremes reach the steady state value only late. Because of this, filtering out the rapidly changing useful signal in such cases does not give a realistic measurement result.

In another known method, the sampled values are stored in the memory of a digital computer (e.g., a microcomputer) and the extreme value is determined by a software algorithm. Such a procedure may e.g. based on some version of the stochastic approximation25 weeks. With this method, good results can be achieved. However, due to the cost of the computer required, the use of the method only pays off in places where the computer is needed anyway and the computer has sufficient spare capacity for this purpose.

-1179871

Our aim is to overcome the drawbacks of the above solutions by employing a device which provides interference suppression without the introduction of a time constant. To this end, the apparatus of the present invention periodically samples the input signal amplified without filtering, and logically analyzes the successive sampling values so obtained to select those positive or negative peaks that are interfering.

The invention is based on the discovery that if the apparatus always accepts an average magnitude of the instantaneous sampling value, the preceding sampling value, and the instantaneous output as the instantaneous sampling value, the effect of short-term interference pulses can be completely eliminated.

FIELD OF THE INVENTION The present invention relates to an apparatus for searching for extreme values and compensating for interference processing of sampled signals, the input of which is connected to an analog digital converter input and includes an output register for storing and possibly displaying a measurement result.

The invention relates to the output of the A / D converter being connected via a buffer register and directly to one of the inputs of the logical circuit selecting the middle numeric value, the latter being connected to the input of the output register and the output of the output register to the third input of the is also connected and includes a clock generator, which has three time-shifted clock signal outputs, one to the A / D converter trigger input, the second to the middle numeric value select circuit input, and the third to the buffer register write control input and logic gate circuit is connected to one of its inputs, the output of this gate circuit is connected to the input control input of the output register, and the other input is connected to the gate output of the middle numeric value selection circuit, which is its signal It is used to indicate that the value at the output of the middle numeric value selection circuit is greater at maximum search and less than at the third input of current at maximum search.

The main advantage of the invention is that it provides accurate storage of the steady-state extreme value even when high-amplitude pulsed interference signals are transmitted to the input before it is formed.

An embodiment of the invention will now be described with reference to the drawing.

The drawing illustrates a schematic diagram of a device according to the invention.

The input of the circuit shown in the drawing is the same as the input of the A / D converter 1 and the output of the latter is connected to the second input of the middle numeric value selection circuit 5 and the buffer register 2, the latter output being connected to the first input of the middle numeric value selection circuit 5. The output of the middle numeric value selection circuit 5 is connected to the input of the output register 3, the output of which is the output of the whole circuit, and is connected to the third input 60 of the middle numeric value selection circuit 5. The output logic line of the latter is connected to one of the inputs of the gate circuit 6, while the output of the gate circuit 6 is connected to the input control of the output register 3.

The first output of the stroke generator 4 is connected to the control input 65 of the A / D converter 1, the second output to the control input of the middle numeric value selection circuit 5 and the third output to the input control of the buffer register 2 and the other input of the gate circuit.

The operation of the circuit according to the drawing is as follows: The cycle generator 4 repeats the cycle of the time program at specified intervals. First, it starts the A / D converter 1, which causes it to take the sample from the input signal 10 and convert it to a numeric form.

Then, the output of the A / D converter 1 has the current sampling value, the output of the buffer register 2 has the previous sampling value, and the output of the output register 3 has the current output value. As a result of the second clock signal of the stroke generator 4, the middle numeric value selection circuit 5 selects the middle of the three numeric values at its inputs and is displayed at its output, while the middle numeric value selection circuit 5 is signaled by an output line that the mean value is higher at maximum search and less than the number stored in output register 3 at minimum search, and if so, the third cycle of the cycle generator 4 passes through the gate circuit 6 to the input control of the output register 25 the numerical value assigned to its input, and the same rhythm, the value at the output of the A / D converter 1 is written to the buffer register 2 so that its contents can be shown as a preventive value in the next sampling cycle. Thus, the device selects the middle of the sample value for each cycle, the sample value for the preceding cycle, and the current output value, and if this desired edge differs from the output value by 35, then it will be the new output value. otherwise, the output remains unchanged.

An advantage of the present invention is that since the amplitude of the interfered signals being filtered is completely neglected, the interference suppression effect is independent of the actual magnitude of interference, which is not provided by conventional interference suppression solutions. A further advantage is that the system does not contain an exponential behavior time constant, but instead delays the signal to be processed according to only one sampling period, i.e., by correctly selecting the cycle time, the dead time is equal to that of the longest detectable interference pulse. According to information theory, this is the minimum delay between filters with different operating principles but with the same filtering efficiency. Therefore, the apparatus is considered to be optimal for interference suppression. In addition, the apparatus according to the invention combines even this optimal interference compensation with a search for extreme values.

Claims (1)

An apparatus for searching for extreme values and processing compensation for sampled signals, the input of which is connected to the input of an A / D converter (1) and includes an output register (3) for storing and possibly displaying the measurement result. -2179871, the output of the A / D converter (1) being connected via an input register (2) via a buffer register (2) and directly to an input of a logical circuit (5) which selects a middle numeric value, the output of the latter the output of the output register (3) is also connected to the third input of the middle numerical value selection circuit (5) and includes a clock generator (4) having three time-shifted clock signal outputs to the first input of the A / D converter (1). , the second is connected to the trigger input of the middle numeric value selection circuit (5), and the third is connected to the input register controlling the buffer register (2) and one of the 5 inputs of the gate circuit (6). is connected to its input and the other input is the gate (5) which selects the middle numeric value The output is connected