[go: up one dir, main page]

HK1188874A1 - Nfc device combining components of antenna driver and shunt regulator - Google Patents

Nfc device combining components of antenna driver and shunt regulator Download PDF

Info

Publication number
HK1188874A1
HK1188874A1 HK14101906.5A HK14101906A HK1188874A1 HK 1188874 A1 HK1188874 A1 HK 1188874A1 HK 14101906 A HK14101906 A HK 14101906A HK 1188874 A1 HK1188874 A1 HK 1188874A1
Authority
HK
Hong Kong
Prior art keywords
antenna port
transistor
antenna
regulator
switch
Prior art date
Application number
HK14101906.5A
Other languages
Chinese (zh)
Other versions
HK1188874B (en
Inventor
阿拉斯泰爾.萊弗利
阿拉斯泰尔.莱弗利
Original Assignee
美國博通公司
Nxp Usa, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美國博通公司, Nxp Usa, Inc. filed Critical 美國博通公司
Publication of HK1188874A1 publication Critical patent/HK1188874A1/en
Publication of HK1188874B publication Critical patent/HK1188874B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0715Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including means to regulate power transfer to the integrated circuit
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/20Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by the transmission technique; characterised by the transmission medium
    • H04B5/24Inductive coupling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/48Transceivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/70Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
    • H04B5/79Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for data transfer in combination with power transfer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/43Antennas

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Near-Field Transmission Systems (AREA)
  • Power Engineering (AREA)
  • Details Of Aerials (AREA)
  • Support Of Aerials (AREA)

Abstract

The present invention discloses a NFC device combining components of antenna driver and shunt regulator. Embodiments of the present disclosure can be used to produce smaller, more compact antenna drivers at a reduced cost. Systems and methods for integrating components of an antenna driver with components of a shunt regulator and clamp are provided. By combining these components according to embodiments of the present disclosure, transistor count in an antenna driver can be reduced. This integrated device advantageously allows antenna driver functionality, regulator functionality, and clamp control functionality to be provided at a reduced manufacturing cost and with reduced real estate.

Description

NFC device for combining components of an antenna driver and a shunt regulator
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims priority from U.S. non-provisional application No. 13/523,445, filed on day 6, month 14, 2012, the entire contents of which are incorporated herein by reference.
Technical Field
The present invention relates to antennas, and more particularly to NFC transceiver devices.
Background
In many conventional communication devices, separate circuits are often included to provide antenna driver functionality and regulator/clamp (clamp) functionality. Implementations using separate lines for antenna driver functionality and regulator/clamp functionality may require several large transistors, which increases manufacturing cost and footprint (real estate).
For example, many conventional antenna driver circuits incorporate two large input/output transistors on each antenna port. Conventional antenna drivers for Near Field Communication (NFC) devices may include circuitry for pulling a current down to VSSN-type metal oxide semiconductor (NMOS) device (e.g., negative supply voltage), and method for driving a semiconductor device from VDDA P-type metal oxide semiconductor (PMOS) device that supplies current (e.g., positive supply voltage). These NMOS and PMOS devices are dedicated Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) used to implement logic for the antenna driver circuit.
The circuitry for regulator and clamp control of the antenna may also include NMOS devices and/or PMOS devices. Thus, adding regulators and/or clamp control circuits to a device may further increase the manufacturing cost and footprint (e.g., circuit board area) required for the device. These dedicated transistors can be very expensive and can also require a large footprint on the transceiver device Integrated Circuit (IC).
Disclosure of Invention
According to an embodiment of the present invention, there is provided a circuit including: an antenna port coupled to the first transistor, the second transistor, and the third transistor; a pre-driver configured to be coupled to the first transistor, the second transistor, and the third transistor; a voltage regulator configured to be coupled to the second transistor; and a clamp controller configured to be coupled to the third transistor.
Further, the first transistor is a P-type metal oxide semiconductor (PMOS) transistor, and wherein the second and third transistors are N-type metal oxide semiconductor (NMOS) transistors.
In addition, the circuit further comprises: a first switch configured to couple the pre-driver to the first transistor; a second switch configured to couple the pre-driver to the second transistor; and a third switch configured to couple the pre-driver to the third transistor.
In addition, the circuit further comprises: a fourth switch configured to couple the regulator to the second transistor; a fifth switch configured to couple the clamp controller to the third transistor.
Further, during a first mode, the first switch, the second switch, and the third switch are configured to be closed while the fourth switch and the fifth switch are open; and during a second mode, the first switch, the second switch, and the third switch are configured to be open while the fourth switch and the fifth switch are closed.
Further, the antenna port is an antenna port of a Near Field Communication (NFC) device, wherein the antenna port is configured to support a reader mode of the near field communication device during the first mode, and wherein the antenna port is configured to support a target mode of the near field communication device during the second mode.
In addition, the circuit also includes a diode coupled to the antenna port and the regulator, wherein the regulator is configured to: receiving a feedback signal from the diode; comparing the feedback signal to a reference signal; and adjusting a voltage provided to the second transistor in response to the comparison between the feedback signal and the reference signal.
In addition, the circuit further comprises: a second antenna port coupled to the fourth transistor, the fifth transistor, and the sixth transistor, wherein: the pre-driver is further configured to be coupled to the fourth transistor, the fifth transistor, and the sixth transistor, the voltage regulator is further configured to be coupled to the fifth transistor, and the clamp controller is further configured to be coupled to the sixth transistor.
Further, the clamp controller is configured to: determining whether a first voltage of the first antenna port or a second voltage of the second antenna port is lower; if the first voltage is low, creating a short circuit at the first antenna port; and creating a short circuit at the second antenna port if the second voltage is low.
According to still another embodiment of the present invention, there is provided a Near Field Communication (NFC) device including: a first antenna port coupled to the first plurality of transistors; a second antenna port coupled to the second plurality of transistors; a pre-driver configured to be coupled to the first plurality of transistors and the second plurality of transistors; a voltage regulator configured to be coupled to the first antenna port and the second antenna port; and a clamp controller configured to be coupled to the first antenna port and the second antenna port.
Further, the near field communication device is configured to receive information indicating that the near field communication device places the first antenna port in a reader mode or a target mode.
Further, the near field communication device is configured to couple the pre-driver to the first plurality of transistors and decouple the voltage regulator and the clamp controller from the first antenna port in response to receiving an instruction to place the first antenna port in the reader mode.
Further, the near field communication device is configured to decouple the predriver from the second plurality of transistors and couple the voltage regulator and the clamp controller to the second antenna port in response to receiving an instruction to place the first antenna port in the reader mode.
Further, the near field communication device is configured to decouple the predriver from the first plurality of transistors and couple the voltage regulator and the clamp controller to the first antenna port in response to receiving an instruction to place the first antenna port in the target mode.
Further, the near field communication device is configured to couple the pre-driver to the second plurality of transistors and decouple the voltage regulator and the clamp controller from the second antenna port in response to receiving an instruction to place the first antenna port in the target mode.
According to yet another embodiment of the present invention, there is provided a method including: determining whether the antenna port is to receive or create a magnetic field; and in response to determining that the antenna port is used to create the magnetic field: the method includes coupling a predriver to a first transistor, a second transistor, and a third transistor, decoupling a regulator from the second transistor, and decoupling a clamp controller from the third transistor.
In addition, the method further comprises: in response to determining that the antenna port is used to create the magnetic field: the method further includes decoupling the pre-driver from a second antenna port, coupling the regulator to the second antenna port, and coupling a clamp controller to the second antenna port.
In addition, the method further comprises: in response to determining that the antenna port is not being used to create the magnetic field: decoupling the pre-driver from the first transistor, the second transistor, and the third transistor, coupling the regulator to the second transistor, and coupling the clamp controller to the third transistor.
In addition, the method further comprises: in response to determining that the antenna port is not being used to create the magnetic field: the method further includes coupling the pre-driver to the second antenna port, decoupling the regulator from the second antenna port, and decoupling the clamp controller from the second antenna port.
Further, the method includes determining whether the antenna port is to receive the magnetic field or to create the magnetic field based on an instruction received from a host Near Field Communication (NFC) device.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with a general description given above and the detailed description of the embodiments given below, serve to explain the principles of the invention. In the drawings:
fig. 1A shows a circuit diagram of a conventional antenna driver.
Fig. 1B shows a circuit diagram of a conventional antenna driver having two ports.
Fig. 2 shows a circuit diagram of a conventional regulator/clamp circuit for an antenna.
Fig. 3A shows a circuit diagram of an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention.
Fig. 3B shows another circuit diagram of an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention.
Fig. 4 shows a circuit diagram of an integrated antenna driver, regulator and clamp control circuit for two antenna ports according to an embodiment of the invention.
Fig. 5 is a flow diagram of a method for providing antenna driver functionality, regulator functionality, and clamp control circuit functionality according to an embodiment of the invention.
Fig. 6 shows a block diagram of an NFC environment.
Fig. 7 shows a block diagram illustrating the integration of an NFC device into an electronic host communication device with shared memory.
Fig. 8 shows a block diagram of an NFC device with an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention.
Features and advantages of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention, including structures, systems and methods, may be practiced without these specific details. The description and representations herein are the general means used by those skilled in the art to most effectively convey the substance of their work to others skilled in the art. In other instances, well-known methods, routines, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the invention.
References in the specification to "one embodiment," "an example embodiment," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
Although the present invention is described with respect to Near Field Communication (NFC) embodiments, persons skilled in the relevant art will recognize that the present invention may be applied to other communications using the near field and/or the far field without departing from the spirit and scope of the present invention. For example, although the present invention is described using NFC enabled communication devices, one skilled in the relevant art will recognize that the functionality of these NFC enabled communication devices may be applied to other communication devices using the near field and/or the far field without departing from the spirit and scope of the present invention.
1. Overview
Embodiments of the present invention provide systems and methods for combining components of an antenna driver with components of a shunt regulator and a clamp circuit to reduce transistor count in an antenna driver circuit. Because these transistors can be very expensive due to the need for them to be a source of or sink hundreds of milliamps of current, embodiments of the present invention can be used to produce antenna drivers at reduced cost. Further, because these transistors may require significant silicon area on an Integrated Circuit (IC), embodiments of the present invention may be advantageously used to produce smaller, more compact antenna drivers when compared to conventional devices that require separate circuitry for antenna driver functionality and regulator/clamp control functionality.
Embodiments of the present invention provide systems and methods for combining an N-type metal oxide semiconductor (NMOS) input/output transistor of an antenna driver with an NMOS input/output transistor of a shunt regulator and clamp circuit. For example, embodiments of the present invention provide an integrated antenna driver, shunt regulator, and clamp control circuit. By reusing these NMOS transistors for antenna driver and shunt regulator/clamp functionality, the total transistor count in the device may be reduced.
2. Practice of
Fig. 3A, 3B and 4 show circuit diagrams of an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention. Embodiments of the invention (e.g., as illustrated by fig. 3A, 3B, and 4) may be implemented on one or more ICs. For example, in an embodiment, all of the elements shown in fig. 3A may be implemented on a single IC, all of the elements shown in fig. 3B may be implemented on a single IC, and all of the elements shown in fig. 4 may be implemented on a single IC. In an embodiment, the integrated antenna driver, regulator, and clamp control circuit of fig. 3A, 3B, and/or 4 may be incorporated into a Near Field Communication (NFC) device. The NFC device is now described with reference to fig. 6, 7, and 8.
2.1NFC Environment
Fig. 6 shows a block diagram of an NFC environment according to an example embodiment of the present invention. NFC environment 600 provides for wireless communication of information (e.g., one or more commands and/or data) between a first NFC device 602 and a second NFC device 604 that are in sufficient proximity to each other. The first NFC device 602 and/or the second NFC device 604 may be implemented as stand-alone or discrete devices, or may be incorporated into or coupled to another electronic device or host device clock, such as a mobile phone, a portable computing device, another computing device (e.g., a laptop, tablet, or desktop computer), computer peripherals such as a printer, portable audio and/or video player, payment systems, ticket writing systems (e.g., parking lot ticketing systems, bus ticketing systems, train ticketing systems, or entry ticketing systems) to provide some examples, or incorporated into a ticket reading system, a toy, a game, a poster, packaging, advertising material, a product catalog checking system, and/or any other suitable electronic device that will be apparent to those skilled in the relevant art without departing from the spirit and scope of the invention. Herein, when incorporated or coupled to another electrical device or host device, this type of NFC device may be referred to as an NFC-enabled device.
The first NFC device 602 generates a magnetic field and detects the magnetic field of the second NFC device 604. The first NFC device 602 and the second NFC device 604 may use a type a standard, a type B standard, a type F (electronic money)Package (FeliCa)) standard and/or a nearby standard. The type a and B standards are published on 11/18 2010 as "NFC Forum: NFC Activity Specification: technical specification, NFC ForumTMActivity1.0NFCForum-TS-Activity-1.0 (hereinafter "NFC behavior Specification") and/or ISO/IEC14443-3 published 11.6.1999, "Identification cards-contact integrated circuits(s) cards-proximity cards-Part 3: initiation and antistolsion "are further defined and are incorporated herein by reference in their entirety. The type F standard is further defined in the NFC behavior specification. ISO/IEC15693-3 published by the nearby standards on 6/4/2009: 2009, "Identification cards-contact integrated circuits(s) cards-visual cards-Part 3: anti-collision and transmission protocol (hereinafter "nearby Specification").
Upon establishing communication with the second NFC device 604, the first NFC device 602 modulates its corresponding information onto a first carrier and generates a magnetic field by applying the modulated information communication to a first antenna of the first NFC device, thereby providing a first information communication 652. Once the information has been transferred to the second NFC device 604, the first NFC device 602 continues to apply the first carrier without its corresponding information to continue to provide the first communication of information 652. The first NFC device 602 is sufficiently close to the second NFC device 604 such that the first information communication 652 is inductively coupled to the second antenna of the second NFC device 604.
The second NFC device 604 takes or collects power from the first information communication 652 to recover, process, and/or provide a response to the information. The second NFC device 604 demodulates the first information communication 652 to recover and/or process the information. The second NFC device 604 may respond to the information by applying its corresponding information to a first carrier inductively coupled to a second antenna to provide a second modulated information communication 654.
Further operation of the first NFC device 602 and/or the second NFC device 604 may be as described in international standard ISO/IEC18092 published on 4/1/2004: 2004 (E), "Information technologies-Telecommunications and Information Exchange Betwen systems-Near Field Communication-Interface and Protocol (NFCIP-1)" and International Standard ISO/IEC21481 published on 1, 15/2005: 2005 (E), "Information technologies-Telecommunications and Information Exchange Betwen systems-Near Field Communication-Interface and Protocol-2 (NFCIP-2)," each of these international standards is incorporated herein by reference in its entirety.
2.2NFC device integration into host device
The NFC device (e.g., NFC device 602) may be integrated into a host communication device (e.g., host mobile phone). Fig. 7 shows a block diagram illustrating the integration of an NFC device 602 into an electronic host communication device 700 with a shared memory 704 according to an embodiment of the invention. In this embodiment, electronic communication device 700 includes NFC device 700, memory 704, security component 708, WI-FI component 710, phone component 712, bluetooth component 714, battery 716 to power the communication device, host processor 718, and bus 720. It should be understood that components 712, 718, 710, 708, and 714 are optional and provided to illustrate components that may be incorporated into a host communication device. It should be further appreciated that one, several, all, or none of the components 712, 718, 710, 708, and 714 may be incorporated into the host communication device 700 in accordance with embodiments of the present invention.
According to embodiments of the present invention, host communication device 700 may represent a wide variety of electronic communication devices including, but not limited to, mobile phones, portable computing devices, other computing devices (e.g., personal computers, laptop computers, desktop computers), computer peripherals such as printers, portable audio, and/or video players, payment systems, ticket writing systems (e.g., parking lot ticketing systems, bus ticketing systems, train ticketing systems, or entry ticketing systems).
In an embodiment, the NFC device and/or the NFC controller is designed to comprise a secure element using a secure external memory. In an embodiment, the secure external memory is provided by a host device (e.g., memory 704). In another embodiment, the secure external memory is provided by a dedicated additional non-volatile memory chip (e.g., flash memory or EE memory). Utilizing the external memory enables the NFC device and/or the NFC controller to be manufactured using 40nm process technology that does not necessarily support non-volatile memory.
2.3 Integrated antenna driver, regulator and clamp control Circuit
Fig. 8 shows a block diagram of an NFC device with an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention. The NFC device 602 may be configured to operate in a target or tag mode of operation in response to a polling command from a second NFC-enabled device (e.g., NFC device 604) in a polling mode of operation. The NFC device may represent an NFC tag or an NFC communication device. An NFC reader is a type of NFC device that is capable of operating in an initiator mode to initiate communication with another NFC enabled device. The NFC tag is a type of NFC device that is capable of operating in a target mode in response to initiation of communication by another NFC-enabled device. An NFC communication device is a type of NFC apparatus that is capable of operating in an initiator mode or in a target mode, and is capable of switching between these two modes.
The NFC device 602 may represent a stand-alone or discrete device, or may represent an NFC-enabled device. Since the second NFC-enabled device may be configured substantially similar to NFC device 602, the following description focuses on the description of NFC device 602. The NFC device 602 may have multiple identities associated with it, such as a ticket, credit card, identification, and the like. The NFC device 602 includes an antenna module 802, a demodulator module 804, a controller module 806, a power control module 808, and a memory module 810. NFC device 602 may represent an example implementation of NFC device 604.
The antenna module 802 inductively receives a communication signal 850 from a second NFC-enabled device, providing a recovered communication signal 854. Typically, the received communication signal 850 includes a polling command that has been modulated by the second NFC-enabled device.
The demodulator module 804 modulates the recovered communication signal 854 using any suitable analog or digital modulation technique to provide the recovery command 856. The resume command 856 may be a poll command. Suitable analog or digital modulation techniques may include Amplitude Modulation (AM), Frequency Modulation (FM), Phase Modulation (PM), Phase Shift Keying (PSK), Frequency Shift Keying (FSK), Amplitude Shift Keying (ASK), Quadrature Amplitude Modulation (QAM), and/or any other suitable modulation technique apparent to one skilled in the relevant art.
When the demodulator module 804 is in the type a tag domain, it detects the polling command based on 100% ASK modulation. The voltage amplitude must be reduced substantially to zero in order for the demodulator module 804 to act as a gap detector for type a tags. In this case, any modulation based on another modulation scheme that does not fall below the threshold required for type a labeling may be given a value of 1. When the amplitude drops low enough, the demodulator module 804 gives it a value of 0 according to the modified miller coding scheme.
When the demodulator module 804 is in the field of type B tags, it detects the polling command based on 10% ASK modulation. The demodulator module 804 has a voltage threshold at 90% of the total modulation amplitude. If the modulation of the polling command falls below the threshold, the demodulator module 804 gives it a value of 0 according to the NRZ-L coding scheme. In this case, any modulation based on another protocol may drop below the threshold required for type B marking and thus be given a value of 0. Any modulation that remains above this threshold is given a value of 1.
When the demodulator module 804 is in the field of type F tags, it polls the command based on the manchester encoding scheme that uses a modulation threshold between the modulation thresholds for type a tags and type B tags. If the polling command falls below the threshold, a value of 0 is given for the modulation. Any modulation that remains above this threshold is given a value of 1.
As can be seen from the above, the type a flag does not assign a value of 0 to any modulation based on the type B or type F flag because the modulation amplitude does not drop below the threshold required for 100% ASK modulation. Thus, the modulator module 804 in the type a tag does not detect the polling command sent to detect the type B or type F tag.
When the demodulator module 804 is in the vicinity of the standard tag field, it detects the polling command based on 10% or 100% ASK modulation depending on the modulation selection of the reader. When using 100% ASK modulation, the voltage amplitude must be reduced substantially to zero in order for the demodulator module 804 to act as a gap detector for the type a marks. In this case, any modulation based on another modulation scheme that does not fall below the threshold required by the adjacent standard mark may be given a value of 1. When the amplitude drops low enough, the demodulator block 804 gives it a value of 0 according to the pulse position modulation.
When 10% ASK modulation is used with adjacent standards, the demodulator module 804 has a voltage threshold at 90% of the total modulation amplitude. If the modulation of the poll command falls below the threshold, the demodulator module 804 gives it a value of 0 according to the pulse position modulation coding scheme. In this case, any modulation based on another protocol may drop below the threshold required by the adjacent standard mark and thus be given a value of 0. Any modulation that remains above this threshold is given a value of 1.
Moving on to other aspects of the NFC device 602, the controller module 806 controls the overall operation and/or configuration of the NFC device 602. When the NFC device 602 supports multiple identities, the controller module 806 sends a list search command 862 to the memory module 810. The control module 806 receives the list search response 864 with the first identity matching the polling command characteristic. The controller module 806 then provides a response 858 to the received command 856, which response 858 merges the list search response 864 when responding to the polling command.
Generally, after the received communication signal 850 passes the polling command to the NFC device 602, the second NFC-enabled device inductively couples the carrier wave as the received communication signal 850 on the antenna module 802. The controller module 806 modulates the carrier wave in accordance with the response 858 to provide a transmitted communication signal 860. For example, the impedance of the antenna module 802 changes based on the response 858 to change the load of the NFC device 602, as seen by the second NFC-enabled device.
The memory module 810 stores a list of a plurality of identities associated with the NFC device 602. When the received communication signal 850 is a polling command that has been modulated from a second NFC-enabled device, the memory module 810 receives a list search command 862 to search for a list of multiple identities associated with the NFC device 602. Once a match is found with the polling command characteristics, the memory module 810 returns the corresponding identity as a list search response 864. For example, the match may represent a first identity from among multiple identities that matches a characteristic of the polling command, referred to as a first match.
The power control module 808 can collect power for the NFC device 602 from the recovered communication signal 854. Power coupling from the power scavenging module 808 that powers other modules of the NFC device 602, such as the antenna module 802, the demodulator module 804, the controller module 806, and the memory module 810, is not shown in fig. 8. Alternatively or additionally, a battery may be provided.
In an embodiment, the power control module 808 includes an integrated antenna driver, regulator, and clamp control circuit 870. The integrated antenna driver, regulator and clamp control circuit 870 reuses NMOS transistors for the antenna driver and shunt regulator/clamp functionality, so the total transistor count in the device can be reduced, which allows the antenna driver functionality, regulator functionality and clamp control functionality to be provided at reduced manufacturing costs and with reduced footprint (e.g., reduced circuit board area).
3. Conventional antenna driver, regulator and clamp circuit
Circuits for conventional antenna drivers, regulators, and clamping circuits are now described with reference to fig. 1A-1C. Fig. 1A and 1B show a conventional antenna driver circuit, and fig. 1C shows a conventional circuit including a regulator and a clamp circuit for an antenna. In conventional devices, separate circuitry is often included to provide antenna driver functionality and regulator/clamp functionality. As discussed below, implementations using separate circuits for antenna driver functionality and regulator/clamp functionality may require several large transistors, which increases manufacturing costs and footprint.
3.1 conventional antenna driver
Fig. 1A shows a circuit diagram of a conventional antenna driver. In fig. 1A, an antenna predriver (antenna predriver) 102 is used to supply power to the antenna port. For example, the antenna predriver 102 may be used to power the antenna port 104 a. Antenna pre-driver 102 generates a signal buffered by large transistors (PMOS 108a and NMOS110 a) coupled to antenna pre-port 104 a. These large transistors allow the antenna 104 to deliver large currents. For example, the area of NMOS110a and PMOS108a may be about 0.1 square millimeters, and these transistors can have a peak current of 2 mA. Antenna port 104a is coupled to the drain of PMOS108a and the source of NMOS110 a. The source of PMOS108a is coupled to the positive supply voltage VDD114, and the source of NMOS110a is coupled to a negative supply voltage VSS116. The gates of PMOS108a and NMOS110a are coupled to antenna predriver 102 and decoupled from antenna predriver 102 using switches 106 and 112.
Switches 106 and 112 are cycled to change the state of antenna port 104 a. For example, in an embodiment, switches 106 and 112 are cycled on and off, changing the state of antenna port 104a to a state for creating a magnetic field over which data may be transmitted and received, or to a state for receiving a magnetic field over which data may be transmitted and received. When the antenna of fig. 1 is used to drive a magnetic field to antenna port 104a, horizontal switches 106a and 106b are closed and vertical switches 112a and 112b are opened. When horizontal switch 106b is closed, antenna predriver 102 is connected to the gates of PMOS108a and NMOS110 a. Although horizontal switch 106 is closed, vertical switch 112 is open, thus at the gate of NMOS110a and VSS116 are not provided withThere is a connection and thus no connection between PMOS108a and antenna port 104 a.
When the antenna driver of fig. 1A is off (e.g., when the antenna port 104a is used to receive a magnetic field), the horizontal switch 106 is open and the vertical switch 112 is closed. The opening of horizontal switch 106 prevents connection between antenna predriver 102 and PMOS108a and NMOS110 a. The closing of vertical switch 112 prevents PMOS108a and NMOS110a from receiving current (i.e., closing vertical switch 112 turns these transistors "off"). By opening and closing horizontal switch 106 and vertical switch 112, the antenna driver of fig. 1A can cycle between states for creating and receiving magnetic fields. For example, in an embodiment, the antenna driver of fig. 1A may be used as an antenna driver for a Near Field Communication (NFC) device. The NFC device may be used in a reader mode when the antenna driver of fig. 1A is put into a state for creating a magnetic field, and may be used in a target (tag) mode when the antenna driver of fig. 1A is put into a state for receiving a magnetic field.
Fig. 1B is a circuit diagram of a conventional antenna driver having two antenna ports (an antenna port 104a and an antenna port 104B). In fig. 1B, antenna port 104B is coupled to two additional large transistors (PMOS 108B and NMOS 110B) that allow antenna port 104B to deliver large currents. The two additional horizontal switches (106 c and 106 d) are switched in the same manner as the two additional vertical switches (112 c and 112 d) to place the antenna port 104b in a mode to create a magnetic field or to receive a magnetic field. For example, antenna port 104b may be used to create a magnetic field when horizontal switches 106c and 106d are closed and vertical switches 112c and 112d are open. Antenna port 104b may be used to receive a magnetic field when horizontal switches 106c and 106d are open and vertical switches 112c and 112d are closed. In an embodiment, antenna predriver 102 may drive signals to PMOS108b and NMOS110b in anti-phase to invert signals sent to antenna port 104b from signals sent to antenna port 104 a.
3.2 conventional regulator/clamp Circuit
FIG. 2 shows aA circuit diagram of a conventional regulator/clamp circuit for an antenna. In conventional devices, separate circuitry is often included to provide antenna driver functionality and regulator/clamp functionality. Thus, in many conventional communication devices, the regulator/clamp circuit (e.g., shown in fig. 2) is separate from (e.g., not integrated with) the antenna driver circuit of fig. 1A and 1B. Because a separate circuit is used, the transistors of fig. 1A and 1B are not shared with the circuit of fig. 2. In fig. 2, new large scale transistors (NMOS 210a and NMOS210 b) are included to support regulator and clamp control functionality. The NMOS210a is used to pull the voltage and/or current from the antenna port 104b to VSS116 and NMOS210b is used to sum the sub-V generated at antenna port 104aSS116 (i.e., short circuit).
The circuit of fig. 2 may be "on" or "off" depending on the state of the circuit (i.e., whether antenna port 104a is used to create or receive a magnetic field). Horizontal switch 212 and vertical switch 214 switch open and closed to change the state of the circuit. For example, if the antenna port 104a is used to create a magnetic field, the circuit of fig. 2 is "open". When the circuit of fig. 2 is open, horizontal switch 212 is open and vertical switch 214 is closed. The connection formed by closed vertical switch 214 pulls the gate of transistor 210 low to VSS116, thus turning off the output of transistor 210.
In fig. 2, a regulator 202 may be used to maintain the voltage provided to the antenna port 104a at a stable voltage. The diode 208 detects the voltage of the signal on the antenna port 104a and feeds this information back to the regulator 202. In an embodiment, diode 208 is a full wave rectifier and detects a voltage peak of the signal on antenna port 104 a. The diode 208 converts the AC signal to an approximately DC signal on the antenna port 104 a. The regulator 202 compares the output of the diode 208 to a reference voltage 206, which may represent a desired voltage. If the regulator 202 determines that the voltage of the signal on the antenna port 104a is not maintained close to the desired voltage (e.g., within a predetermined range of the desired voltage), the regulator 202 may adjust its output to maintain the voltage of the signal provided to the antenna port 104a at the desired value set by the reference voltage 206.
When the antenna port 104a receives a magnetic field, the circuit of FIG. 2 is "on". In this state, the horizontal switch 212 is closed and the vertical switch 214 is opened. Thus, regulator 202 is coupled to the gate of NMOS210a, and clamp controller 204 is coupled to the gate of NMOS210 b. When the antenna port 104a receives a magnetic field, current flows through the antenna coupled to the antenna port 104a and a voltage builds on the antenna port 104 a. The regulator 202 compares the voltage detected by the diode 208 with the reference voltage 206 and if the detected voltage is too high, the regulator 202 increases the voltage provided to the gate of the NMOS210a, which in turn increases the voltage provided to the antenna (and thus reduces the current flowing through the antenna at the antenna port 104 a). When the diode 208 detects a lower voltage, the regulator 202 stops increasing the voltage provided to the gate of the NMOS210 a.
Clamp controller 204 may be used to prevent the voltage from antenna port 104a from exceeding a predetermined magnitude. This functionality is particularly important if more than one antenna is present. As is apparent, a single antenna port 104a is shown in fig. 2 (e.g., for a single port antenna implementation). However, it should be understood that embodiments of the present invention may include multiple antenna ports (e.g., for a dual port antenna embodiment). For example, an NFC implementation of the present invention may include two antenna ports (e.g., as shown in fig. 1B). In embodiments of the invention having two antenna ports, when the voltage at one antenna port is positive (i.e. higher than V)SS116) While the voltage at the other port becomes negative (i.e. it is driven below V)SS116). Clamp controller 204 may be used to prevent going below VSSAffects the circuit of fig. 2.
As previously discussed, when the circuit of fig. 2 is "on" and antenna port 104a receives a magnetic field, horizontal switch 212 is closed and vertical switch 214 is open. In this state, clamp controller 204 is coupled to the gate of NMOS210 b. If clamp controller 204 detects power at antenna port 104aThe voltage is negative, then clamp controller 204 uses NMOS210b at antenna ports 104a and VSS116 create a short circuit therebetween. For example, in an embodiment using two antenna ports, clamp controller 204 may detect whether the voltage at antenna port 104a or antenna port 104b is high. If the voltage at antenna port 104b is higher than the voltage at antenna port 104a, then clamp controller 204 may determine that antenna port 104a is "negative". In response, clamp controller 204 adjusts the voltage provided to the gate of NMOS210b so that at antenna ports 104a and VSS116 have a short circuit between them. By doing so, clamp controller 204 prevents below V at antenna port 104aSS116 negatively affects the circuit of figure 2.
4. Integrated antenna driver, regulator and clamp control circuit
As previously discussed, separate circuits to provide antenna driver functionality and regulator/clamp control functionality require several large transistors (e.g., transistors 108, 110, and 210). Embodiments of the present invention advantageously provide antenna driver functionality, regulator functionality, and clamp control functionality using a reduced number of transistors by integrating the antenna driver functionality, regulator functionality, and clamp control functionality into a single circuit. This reduction in the number of transistors required advantageously results in a reduction in the required footprint and manufacturing costs. For example, these transistors may each require 5% or more of the footprint on the IC. Thus, embodiments of the present invention enable the production of cheaper, smaller ICs for providing antenna driver functionality, regulator functionality and clamp control functionality.
Fig. 3A shows a circuit diagram of an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the invention. This circuit requires fewer transistors than two separate circuits (e.g., as shown by fig. 1A, 1B, and 2) that provide antenna driver functionality and regulator/clamp control functionality. In an embodiment, the circuit of fig. 3A may be implemented in an NFC device (e.g., NFC device 602). For example, the circuit of fig. 3A may be implemented as an integrated antenna driver, regulator and clamp control circuit 870 of the power control module 808.
In an embodiment, the circuit of fig. 3A may be put into two modes of operation: an operational mode for receiving a magnetic field from the antenna port 104a (e.g., when the antenna port 104a is used to support a target (tag) mode of the NFC device), and an operational mode for creating a magnetic field via the antenna port 104a (e.g., when the antenna port 104a is used to support an initiator (reader) mode of the NFC device).
If the antenna port 104a is used to create a magnetic field, the horizontal switches 302a, 302b, and 302d are closed allowing the signal to propagate to the PMOS306 and NMOS308 a. At the same time, vertical switch 304 is open and horizontal switches 302c and 302e are open, thus regulator 202 and clamp controller 204 are disconnected from the rest of the circuit. In this mode, antenna predriver 102 generates a signal that is amplified by PMOS306 and NMOS308a coupled to antenna port 104 a. These large transistors allow the antenna port 104a to deliver large currents.
If antenna port 104a is to receive a magnetic field, vertical switch 304 is closed and horizontal switches 302a, 302b, and 302d are open, creating an open circuit between antenna port 104a and antenna predriver 102. Horizontal switches 302c and 302e close to connect regulator 202 and clamp controller 204 to the rest of the circuit. When antenna port 104a receives a magnetic field, regulator 202 regulates the signal detected at antenna port 104a, and clamp controller 204 prevents a negative voltage (e.g., below V) at antenna port 104aSS116) negatively affects the rest of the circuit.
Fig. 3B illustrates another circuit diagram of an integrated antenna driver, regulator and clamp control circuit according to an embodiment of the present invention. In an embodiment, the circuit of fig. 3B may be implemented in an NFC device (e.g., NFC device 602). For example, the circuit of fig. 3B may be implemented as an integrated antenna driver, regulator and clamp control circuit 870 of the power control module 808.
In fig. 3B, a diode 310 and a feedback path 312a are shown. In an embodiment, diode 310 is a rectifier (e.g., a full-wave rectifier). When the rectifier 202 and clamp controller 204 switch into the circuit (i.e., when the antenna port 104a is used to receive a magnetic field), the diode 310 resolves the peak voltage associated with the incoming signal at the antenna port 104a and compares it to the reference voltage 206. Based on the comparison, the regulator 202 may determine whether the voltage of the signal provided to the antenna port 104a is too high (or too low). As previously discussed, the regulator 202 may increase (or decrease) the amount of voltage provided to the NMOS308a (and thus alter the current at the antenna port 104 a), thereby maintaining the voltage at the antenna port 104a at a stable value.
Fig. 4 shows a circuit diagram of an integrated antenna driver, regulator and clamp control circuit for two antenna ports according to an embodiment of the invention. In an embodiment, the circuit of fig. 4 may be implemented in an NFC device (e.g., NFC device 602). For example, the circuit of fig. 3B may be implemented as an integrated antenna driver, regulator and clamp control circuit 870 of the power control module 808.
In fig. 4, antenna predriver 102, regulator 202, and clamp controller 204 may be coupled to antenna port 104a via horizontal switch 302 and to antenna port 104b via horizontal switch 402. In an embodiment, antenna predriver 102 may drive a signal in anti-phase to invert the signal sent to antenna port 104b from the signal sent to antenna port 104 a.
In an embodiment, when antenna port 104a and antenna port 104b are used to create a magnetic field, for example, antenna predriver 102 is connected to antenna ports 104a and 104b (e.g., by closing horizontal switches 302a, 302b, 302d, 402a, 402b, and 402 d). Vertical switches 304 and 404 are also open. By turning on the horizontal switches 302c, 302e, 402c, and 402e, the regulator 202 and the clamp controller 204 are disconnected from the antenna ports 104a and 104 b. If the antenna ports 104a and 104b are to receive a magnetic field, the antenna predriver 102 can be disconnected from the antenna ports 104a and 104b by opening the horizontal switches 302a, 302b, 302d, 402a, 402b, and 402d and closing the vertical switches 304 and 404. Regulator 202 and clamp controller 204 may be coupled to antenna ports 104a and 104b by closing horizontal switches 302c, 302e, 402c, and 402 e.
When current flows through the antenna, the regulator 202 detects the voltage established on the antenna port 104b via a diode (e.g., full-wave rectifier 310). By comparing this voltage to the reference voltage 206, the regulator 202 may determine whether the current flowing through the antenna (via NMOS408 a) should be increased or decreased. The clamp controller 204 prevents negative voltages (e.g., below V)SS116) negatively affects the rest of the circuit of fig. 4. When the voltage at one antenna port is positive (i.e., higher than V)SS116) While the voltage at the other port may become negative (i.e., it is driven below V)SS116). For example, if the voltage at antenna port 104b is higher than the voltage at antenna port 104a, clamp controller 204 may determine that antenna 1 is "negative". In response, clamp controller 204 adjusts the voltage provided to the gate of NMOS308a so that at antenna ports 104a and VSS116 have a short circuit between them. By doing so, clamp controller 204 prevents below V at antenna port 104a or antenna port 104bSS116 negatively affects the circuit of figure 4.
In the integrated circuit configurations illustrated by fig. 3A, 3B, and 4, one transistor may be "saved" per antenna. That is, by integrating the antenna driver functionality, regulator functionality, and clamp control functionality onto a single circuit, each antenna port requires one less transistor relative to conventional devices that use separate circuits to provide the antenna driver functionality and separate circuits to provide the regulator/clamp control functionality. Thus, embodiments of the present invention enable the manufacture of cheaper and smaller communication devices that support this functionality.
5. Method of producing a composite material
Fig. 5 is a flow diagram of a method for providing antenna driver functionality, regulator functionality, and clamp control circuit functionality according to an embodiment of the present invention. In step 500, a determination is made as to whether the antenna is to be used to receive or create a magnetic field. For example, a host device (e.g., an NFC device) may create a magnetic field (e.g., if the NFC device is operating in a reader mode) or receive a magnetic field (e.g., if the NFC device is operating in a target mode) using an antenna port (e.g., using antenna port 104 a). Circuitry supporting antenna driver functionality, regulator functionality, and clamp control functionality may then be configured based on this determination in step 502.
If the antenna port is not being used to create a magnetic field, the antenna predriver is connected to the antenna in step 504. Antenna predriver 102 is coupled to PMOS306 and NMOS308a, for example, by closing horizontal switches 302a, 302b, and 302d, opening vertical switch 304. In step 506, the regulator is disconnected from the antenna. For example, the regulator 202 is disconnected from the NMOS308a by opening the horizontal switch 302 c. In step 508, the clamp control is also disconnected from the antenna. For example, clamp controller 204 is disconnected from NMOS308b by opening horizontal switch 302 e.
If the antenna port (e.g., antenna port 104 a) is not being used to create a magnetic field (i.e., if the antenna port is being used to receive a magnetic field), the antenna predriver is disconnected from the antenna port at step 510. For example, antenna predriver 102 is disconnected from the circuit by opening horizontal switches 302a, 302b, and 302d and closing vertical switch 304. In step 512, the regulator is connected to the antenna port. For example, regulator 202 is coupled to NMOS308a by closing horizontal switch 302 c. In step 508, the clamp control is also connected to the antenna port. Clamp controller 204 is connected to NMOS308b, for example, by closing horizontal switch 302 e.
6. Other embodiments
The antenna driver according to embodiments of the present invention may also comprise additional functionality. For example, the load modulator function may also be combined with the regulator 202. In an embodiment, the load modulator functionality may also be supported without the need for additional transistors. For exampleAn NMOS input/output transistor (e.g., NMOS308 a) may be configured to be driven by antenna predriver 102, regulator 202, and clamp controller 204, while keeping the gate of the transistor therein pulled to VSS116 to turn off the transistor.
The regulator 202 may also be redesigned to incorporate a linear shunt (linear shunt). In this case, the protection NMOS transistor (e.g., NMOS308 b) is connected between the antenna ports (e.g., between antenna port 104a and antenna port 104 b) and not connected to VSS116 and no clamping means (e.g., clamp controller 204) is required. Further, in an embodiment, the NMOS transistor of the linear shunt may be combined with an NMOS transistor (e.g., NMOS308 a) used to support the antenna driver.
7. Conclusion
It is to be understood that the detailed description and not the abstract are intended to be used to interpret the claims. For example, the abstract may set forth one or more, but not all example embodiments of the invention contemplated by the inventors, and is therefore not intended to limit the invention and the appended claims in any way.
The invention has been described with the aid of functional building blocks illustrating the implementation of specific functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries may be defined so long as the specified functions and relationships thereof are appropriately performed.
The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present invention. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. The phraseology or terminology employed herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.
The representative signal processing functions described herein (e.g., channel and source decoders, etc.) may be implemented in hardware, software, or some combination thereof. For example, the signal processing functions may be implemented using a computer processor, computer logic, application specific circuits (ASICs), digital signal processors, etc., as will be appreciated by those skilled in the art based on the discussion presented herein. Accordingly, any processor that performs the signal processing functions described herein is within the scope and spirit of the present invention.
The above systems and methods may be implemented as a computer program executing on a machine, as a computer program product, or as a tangible and/or non-transitory computer readable medium having stored instructions. For example, the functions described herein may be implemented by computer program instructions executed by a computer processor or any of the hardware devices listed above. The computer program instructions cause the processor to perform the signal processing functions described herein. The computer program instructions (e.g., software) may be stored in a tangible, non-transitory computer usable medium, a computer program medium, or any storage medium that can be accessed by a computer or processor. Such media include memory devices such as RAM or ROM, or other types of computer storage media (such as computer diskettes or CD ROMs). Thus, any tangible, non-transitory computer storage medium having computer program code that causes a processor to perform the signal processing functions described herein is within the scope and spirit of the present invention.
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims (10)

1. A circuit, comprising:
an antenna port coupled to the first transistor, the second transistor, and the third transistor;
a pre-driver configured to be coupled to the first transistor, the second transistor, and the third transistor;
a voltage regulator configured to be coupled to the second transistor; and
a clamp controller configured to be coupled to the third transistor.
2. The circuit of claim 1, wherein the first transistor is a P-type metal-oxide-semiconductor (PMOS) transistor, and wherein the second and third transistors are N-type metal-oxide-semiconductor (NMOS) transistors.
3. The circuit of claim 1, further comprising:
a first switch configured to couple the pre-driver to the first transistor;
a second switch configured to couple the pre-driver to the second transistor; and
a third switch configured to couple the pre-driver to the third transistor.
4. The circuit of claim 3, further comprising:
a fourth switch configured to couple the regulator to the second transistor;
a fifth switch configured to couple the clamp controller to the third transistor.
5. The circuit of claim 4, wherein:
during a first mode, the first switch, the second switch, and the third switch are configured to be closed while the fourth switch and the fifth switch are open; and
during a second mode, the first switch, the second switch, and the third switch are configured to be open while the fourth switch and the fifth switch are closed,
wherein the antenna port is an antenna port of a Near Field Communication (NFC) device, wherein the antenna port is configured to support a reader mode of the near field communication device during the first mode, and wherein the antenna port is configured to support a target mode of the near field communication device during the second mode.
6. The circuit of claim 1, further comprising a diode coupled to the antenna port and the regulator, wherein the regulator is configured to:
receiving a feedback signal from the diode;
comparing the feedback signal to a reference signal; and
adjusting a voltage provided to the second transistor in response to the comparison between the feedback signal and the reference signal.
7. The circuit of claim 1, further comprising:
a second antenna port coupled to the fourth transistor, the fifth transistor, and the sixth transistor, wherein:
the pre-driver is further configured to be coupled to the fourth transistor, the fifth transistor, and the sixth transistor,
the voltage regulator is further configured to be coupled to the fifth transistor, an
The clamp controller is further configured to be coupled to the sixth transistor,
wherein the clamp controller is configured to:
determining whether a first voltage of the first antenna port or a second voltage of the second antenna port is lower;
creating a short circuit at the first antenna port if the first voltage is low; and
creating a short circuit at the second antenna port if the second voltage is low.
8. A Near Field Communication (NFC) device, comprising:
a first antenna port coupled to the first plurality of transistors;
a second antenna port coupled to the second plurality of transistors;
a pre-driver configured to be coupled to the first plurality of transistors and the second plurality of transistors;
a voltage regulator configured to be coupled to the first antenna port and the second antenna port; and
a clamp controller configured to couple to the first antenna port and the second antenna port.
9. A method, comprising:
determining whether an antenna port is to receive a magnetic field or to create the magnetic field; and
in response to determining that the antenna port is used to create the magnetic field:
coupling a pre-driver to the first transistor, the second transistor and the third transistor,
decoupling a regulator from the second transistor, an
Decoupling a clamp controller from the third transistor.
10. The method of claim 9, further comprising:
in response to determining that the antenna port is used to create the magnetic field:
decoupling the pre-driver from a second antenna port,
coupling the regulator to the second antenna port, an
Coupling a clamp controller to the second antenna port.
HK14101906.5A 2012-06-14 2014-02-27 Nfc device combining components of antenna driver and shunt regulator HK1188874B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/523,445 2012-06-14
US13/523,445 US9020424B2 (en) 2012-06-14 2012-06-14 NFC device combining components of antenna driver and shunt regulator

Publications (2)

Publication Number Publication Date
HK1188874A1 true HK1188874A1 (en) 2014-05-16
HK1188874B HK1188874B (en) 2017-06-09

Family

ID=

Also Published As

Publication number Publication date
US20130337744A1 (en) 2013-12-19
TW201351781A (en) 2013-12-16
CN103516387A (en) 2014-01-15
EP2675077A3 (en) 2017-07-26
EP2675077B1 (en) 2018-08-08
TWI520440B (en) 2016-02-01
US20150229363A1 (en) 2015-08-13
EP2675077A2 (en) 2013-12-18
US9020424B2 (en) 2015-04-28
KR101524861B1 (en) 2015-06-01
CN203563063U (en) 2014-04-23
KR20130140586A (en) 2013-12-24
US9614591B2 (en) 2017-04-04
CN103516387B (en) 2016-08-10

Similar Documents

Publication Publication Date Title
CN203563063U (en) Near field communication circuit and near field communication device
US9805230B2 (en) Method for controlling NFC tag and controlled NFC tag
JP5836898B2 (en) Communication apparatus and operation method thereof
KR102072522B1 (en) Contactless communication device and user device including the same
US8050651B2 (en) Detector, RF circuit with detector, and mobile device with RF circuit
US8811898B2 (en) Information processing device, communication control method and program
US20070246546A1 (en) Information Processing Terminal, IC Card, Portable Communication Device, Wireless Communication Method, and Program
US9904820B2 (en) Communication device, communication method, integrated circuit, and electronic instrument
US8897699B2 (en) Reducing emissions in a near field communications (NFC) capable device
US20150118956A1 (en) Collaborative Coexistence of Near-Field Wireless Systems in a Communication Device
US20070155442A1 (en) Semiconductor integrated circuit device, and non-contact type ic card and portable information terminal using the semiconductor integrated circuit device
CN210721478U (en) Transponder
JP2010157096A (en) Communication interface circuit and communication equipment
US8792844B2 (en) Electronic circuit arrangement for receiving low frequency electro-magnetic waves with an adjustable attenuator element
HK1188874B (en) Nfc device combining components of antenna driver and shunt regulator
CN203366368U (en) Controlled NFC (Near Field Communication) tag
JP2009094883A (en) Auxiliary power system for cellular phone
KR101939239B1 (en) Envelop Detector for RF Communication
EP2816737B1 (en) Secure near field communication
US20220215222A1 (en) Improved ground switch
GB2484104A (en) Combined regulator and rectifier for a near field RF communicator

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20210613