HK1173003A1

HK1173003A1 - Radio frequency power amplifier with linearizing predistorter

Info

Publication number: HK1173003A1
Application number: HK13100093.1A
Authority: HK
Inventors: Hamid R. Amir Firouzkouhi; Bipul Agarwal; Hasan Akyol
Original assignee: 天工方案公司
Priority date: 2009-08-17
Filing date: 2009-08-17
Publication date: 2013-05-03
Also published as: EP2467943A4; WO2011021995A1; CN102577136A; EP2467943A1; KR20170032486A; KR20120065350A; KR20170032485A; KR101719387B1; KR101766628B1; KR101814352B1; CN102577136B

Abstract

A power amplifier circuit includes an amplifier MOSFET and a predistorter MOSFET. The predistorter MOSFET source and drain are connected together, and the predistorter MOSFET is connected between the gate of the amplifier MOSFET and a second bias voltage signal. This biasing of the predistorter MOSFET causes it to provide a nonlinear capacitance at the gate of the amplifier MOSFET. The combined non-linear capacitances of the amplifier MOSFET and predistorter MOSFET provide predistortion that promotes cancellation of the distortion or nonlinearity contributed by the amplifier MOSFET alone.

Description

Radio frequency power amplifier with linear predistorter

Background

Radio Frequency (RF) transmitters, such as those included in mobile radiotelephone handsets (also known as cellular telephones) and other portable radio transceivers, typically include a power amplifier. The power amplifier is typically the last stage of the transmitter circuit. In some types of transmitters, it is important to achieve linear power amplification. However, various factors may prevent linear operation. For example, in a transmitter of the type typically included in some types of mobile radiotelephone handsets, in which the power amplifier receives the output of an up-conversion mixer, the relatively large signal that such a mixer typically outputs can drive the power amplifier into non-linear operation. Increasing the power amplifier current is one technique for facilitating linear operation in such transmitters, but it does not work well in all situations.

As shown IN fig. 1-2, IN a transmitter of the type typically included IN some types of mobile radiotelephone handsets, the power amplifier 10 typically includes several amplifier drive stages or sections 12, 14, 16, etc., at least one of which, such as the amplifier drive stage 14, includes a transconductance (Gm) amplifier that outputs a Radio Frequency (RF) current signal 18(I _ OUT) IN response to an RF input voltage signal 20(V _ IN). The BIAS voltage signal 22(V BIAS) provided via the RF choke 24 may be controlled to control the gain of the power amplifier 10. (although not shown in fig. 1-2 for clarity, the circuitry in the mobile radiotelephone handset generates the bias voltage signal 22 in response to various operating conditions that require adjustment of the transmitter output power.) as shown in fig. 2, the transconductance amplifier transistor 26 is typically a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) arranged in a circuit in a common source configuration. The RF input voltage signal 20 is coupled to the gate of the transistor 26 via the coupling capacitor 28. The current source circuit coupled to transistor 26 is not shown for clarity, but is indicated by the ellipsis (") symbol. Such MOSFETs, when driven by a relatively large signal, produce a non-linear current signal 18 as a result of transistor effects such as mobility degradation, speed saturation and non-linearity of the input capacitance. It is known to design transconductance amplifiers to operate at increased current levels in an attempt to meet noise performance requirements and to promote linear operation to some extent. However, increasing the current alone generally does not provide sufficient overdrive voltage at the gate-source junction to render a linear output current signal 18. A technique known as degeneration may be combined with the increased current technique described above to further promote linearity, but this degeneration precludes the use of the bias voltage signal 22 as an amplifier gain control. Moreover, the increased current in the mobile radiotelephone handset power amplifier tends to drain the battery faster.

It would be desirable to promote transconductance amplifier linearity in a manner that does not consume excessive current, degrade amplifier noise performance, or sacrifice bias voltage gain controllability.

Disclosure of Invention

Embodiments of the present invention relate to a power amplifier circuit comprising an amplifier MOSFET and a predistorter MOSFET. The amplifier MOSFET has a gate terminal coupled to a first bias voltage via a linear coupling capacitor and to an input voltage signal. (the term "coupled" as used herein means connected via zero or more intervening elements.) the source and drain terminals of an amplifier MOSFET that provides an amplifier output current signal are coupled to a reference voltage, such as ground or a supply voltage, and a current source or sink. The predistorter MOSFET is connected between the gate terminal of the amplifier MOSFET and the second bias voltage signal. The source and drain terminals of the predistorter MOSFET are connected together such that they provide a nonlinear capacitance at the gate terminal of the amplifier MOSFET.

The gate-source voltage of the amplifier MOSFET is the input voltage signal that is capacitively divided between the input linear coupling capacitance and the combined nonlinear capacitance of the amplifier MOSFET and the predistorter MOSFET. Thus, the gate-source voltage of the amplifier MOSFET is non-linear or pre-distorted. The predistortion facilitates the cancellation of distortion or non-linearity caused by the amplifier MOSFETs.

Other systems, methods, features and advantages of the invention will be, or will become, apparent to one with skill in the art upon examination of the following figures and detailed description.

Drawings

The invention may be better understood with reference to the following drawings. The components within the figures are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present invention. Moreover, in the figures, like reference numerals designate corresponding parts throughout the different views.

Fig. 1 is a block diagram of a known power amplifier system having at least one transconductance stage.

Fig. 2 is a schematic diagram of a portion of a transconductance stage of the power amplifier system of fig. 1.

Fig. 3 is a schematic diagram of a portion of a transconductance stage of a power amplifier system in accordance with an exemplary embodiment of the present invention.

Fig. 4 is a schematic diagram of a portion of a transconductance stage of a power amplifier system according to another example embodiment of the present invention.

Fig. 5 is a schematic diagram of a portion of a transconductance stage of a power amplifier system according to another example embodiment of the present invention.

Fig. 6 is a schematic diagram of a portion of a transconductance stage of a power amplifier system according to another example embodiment of the present invention.

Fig. 7 is a graph showing the improvement in transconductance amplifier linearity.

Fig. 8 is a block diagram of a mobile radiotelephone handset having a power amplifier system according to an exemplary embodiment of the invention.

Fig. 9 is a block diagram of the transmitter portion of the mobile radiotelephone handset of fig. 7.

Detailed Description

As shown in fig. 3, the transconductance (g) of an RF power amplifier of the type that may be commonly included, for example, in some types of mobile radiotelephone handsets_m) The amplifier circuit 30 included IN the stage outputs an RF current signal 32(I _ OUT) IN response to an RF input voltage signal 34(V _ IN). The amplifier circuit 30 includes an amplifier MOSFET 36 and a predistorter MOSFET 38. In the embodiment shown in fig. 3, amplifier MOSFET 36 is an n-channel (NMOS) device and predistorter MOSFET 38 is a p-channel (PMOS) device.

The gate terminal of the amplifier MOSFET 36 is coupled to the first BIAS voltage signal 40(V _ BIAS) via an RF choke 42. The gate terminal of the amplifier MOSFET 36 is also coupled to the input voltage signal 34 via a linear coupling capacitor 44. The source terminal of amplifier MOSFET 36 is connected to ground. The drain terminal of the amplifier MOSFET 36 is connected to a current source circuit, which is not shown for clarity but is indicated with an ellipsis ("-) symbol.

The source and drain terminals of predistorter MOSFET 38 are connected together, thereby effectively defining a (non-linear) capacitance. The predistorter MOSFET 38 is connected between the gate terminal of the amplifier MOSFET 36 and the second BIAS voltage signal 46(V _ BIAS _ PMOS) such that the gate terminal of the predistorter MOSFET 38 is connected to the gate terminal of the amplifier MOSFET 36 and the source and drain terminals of the predistorter MOSFET 38 are connected to the second BIAS voltage signal 46. The biasing of predistorter MOSFET 38 is such that it provides a nonlinear capacitance at the gate terminal of amplifier MOSFET 36.

The dimensions of the second bias voltage signal 46 and the predistorter MOSFET 38 are selected such that the combination of the nonlinear capacitance of the predistorter MOSFET 38 and the nonlinear capacitance of the amplifier MOSFET 36 define a capacitor that behaves in opposition to the way the input capacitor of the amplifier MOSFET 36 behaves alone. Note, however, that the nonlinear capacitance of predistorter 38 not only cancels out the nonlinear capacitance of amplifier MOSFET 36. Instead, the gate-source voltage of the amplifier MOSFET 36 is the input voltage signal 34 divided capacitively between the linear coupling capacitor 44 and the combined nonlinear capacitance of the predistorter MOSFET 38 and the amplifier MOSFET 38. Thus, the gate-source voltage of amplifier MOSFET 36 is non-linear or pre-distorted. This predistortion cancels out distortion or non-linearity of amplifier MOSFET 36. This effect can be better understood with reference to the following formula.

In a prior art transconductance amplifier circuit such as the amplifier driver stage 14 shown in fig. 2:

(1)V_GS₂₆＝V_IN*[C₂₈/(C₂₈+C_26GG)]，

wherein, V _ GS₂₆Is the gate-source voltage, C, of the amplifier MOSFET 26₂₈Is the capacitance of the coupling capacitor 28, and C_26GGIs the capacitance of the amplifier MOSFET 26 at its gate terminal;

(2)I_OUT＝Gm₂₆*V_GS₂₆＝Gm₂₆*V_IN*[C₂₈/(C_28GG+C_26GG)]，

wherein, Gm₂₆Is the transconductance of the amplifier MOSFET 26; and (c) and (d).

(3)Gm_eff＝Gm₂₆*[C_28GG/(C_28GG+C2_6GG)]，

Wherein, Gm_effIs the effective transconductance of the amplifier driver stage 14.

From equation (3), it can be seen that the nonlinear transconductance and the nonlinear capacitanceThe divided products, where these non-linearities are uncorrelated with each other, result in a combined non-linear effective transconductance (Gm)_eff)。

In contrast, in the example transconductance amplifier circuit 30 described above with reference to fig. 3:

(4)I_OUT＝Gm₃₆*V_GS₃₆＝Gm₃₆*V_IN*[C₄₄/(C₄₄+C_36GG+C_38GG)]，

wherein Gm₃₆Is the transconductance of the amplifier MOSFET 36, V _ GS₃₆Is the gate-source voltage, C, of the amplifier MOSFET 36₄₄Is the linear capacitance, C, of the coupling capacitor 44_36GGIs the nonlinear capacitance of the amplifier MOSFET 36 at its gate terminal, and C_38GGIs the nonlinear capacitance of predistorter MOSFET 38 at its gate terminal; and

(5)Gm_eff＝Gm₃₆*[C₄₄/(C₄₄+C_36GG+C_38GG)]，

wherein, Gm_effIs the effective transconductance of the amplifier circuit 30.

From equation (5), it can be seen that the product of the nonlinear transconductance and the nonlinear capacitance division, where these nonlinearities are adjusted to cancel each other, results in a linear effective transconductance (Gm)_eff). The nonlinear capacitance of the predistorter MOSFET 38 can be adjusted by selecting the size of the MOSFET 38 and the value of the second bias voltage 46. The total nonlinear capacitance of predistorter 38 and the total nonlinear capacitance of amplifier MOSFET 36 should be made similar to each other, i.e., have similar nonlinear characteristics. The combination of the size of the predistorter MOSFET 38 and the value of the second bias voltage 46 that results in the maximum reduction in nonlinear operation of the amplifier circuit 30 and results in the total nonlinear capacitance of the predistorter MOSFET 38 and the total nonlinear capacitance of the amplifier MOSFET 36 being similar to one another may be determined empirically or by any other suitable means. The electricity may be simulated by circuitry, i.e. using commonly available simulator software, by software means on a suitable workstation computer (not shown)Modeling the way to perform experimental estimation. In the simulation, the second bias voltage 46 and the length and width of the predistorter MOSFET 38 can be swept across a range of values relative to each other, and it can be observed how the amplifier circuit 30 behaves linearly or nonlinearly, and the optimum value is noted. In this manner, one skilled in the art to which the present invention relates can quickly and easily determine the appropriate values for one or both of the size of the predistorter MOSFET 38 and the second bias voltage 46. By way of example, the amplifier MOSFET 36 may be 4.80 microns wide and 0.24 microns long; predistorter MOSFET 38 may be 6.72 microns wide and 0.24 microns long; and the second bias voltage 46 may be 650 millivolts. The first bias voltage 40 may be, for example, 1.1 volts.

An alternative amplifier circuit 48 is shown in fig. 4. Transconductance (g) for an RF power amplifier of the type that may be commonly included, for example, in some types of mobile radiotelephone handsets_m) The amplifier circuit 48 included IN the stage outputs an RF current signal 50(I _ OUT) IN response to an RF input voltage signal 52(V _ IN). The amplifier circuit 48 includes an amplifier MOSFET 54 and a predistorter MOSFET 56. In the embodiment shown in fig. 4, the amplifier MOSFET 54 is a p-channel (PMOS) device and the predistorter MOSFET56 is an n-channel (NMOS) device.

The gate terminal of the amplifier MOSFET 54 is coupled to the first BIAS voltage signal 58(V _ BIAS) via the RF choke 60. The gate terminal of the amplifier MOSFET 54 is also coupled to the input voltage signal 52 via a linear coupling capacitor 62. The source terminal of amplifier MOSFET 54 is connected to a supply Voltage (VCC). The drain terminal of the amplifier MOSFET 54 is connected to a current sink circuit, which is not shown for clarity, but is indicated with an ellipsis ("-) symbol.

The source and drain terminals of predistorter MOSFET56 are connected together, thereby effectively defining a (non-linear) capacitance. The predistorter MOSFET56 is connected between the gate terminal of the amplifier MOSFET 54 and the second BIAS voltage signal 64(V _ BIAS _ NMOS) such that the gate terminal of the predistorter MOSFET56 is connected to the gate terminal of the amplifier MOSFET 54 and the source and drain terminals of the predistorter MOSFET56 are connected to the second BIAS voltage signal 64. This biasing of predistorter MOSFET56 is such that it provides a nonlinear capacitance at the gate terminal of amplifier MOSFET 54.

The dimensions of the second bias voltage signal 64 and the predistorter MOSFET56 are selected such that the combination of the nonlinear capacitance of the predistorter MOSFET56 and the nonlinear capacitance of the amplifier MOSFET 54 define a capacitor that behaves in opposition to the way the input capacitor of the amplifier MOSFET 54 behaves alone. This predistortion cancels out distortion or non-linearity of the amplifier MOSFET 54.

Another alternative amplifier circuit 66 is shown in fig. 5. Transconductance (g) for an RF power amplifier of the type that may be commonly included, for example, in some mobile radiotelephone handsets_m) The amplifier circuit 66 included IN the stage outputs an RF current signal 68(I _ OUT) IN response to an RF input voltage signal 70(V _ IN). The amplifier circuit 66 includes an amplifier MOSFET 72 and a predistorter MOSFET 74. In the embodiment shown in fig. 5, the amplifier MOSFET 72 is an n-channel (NMOS) device and the predistorter MOSFET74 is an n-channel (NMOS) device.

The gate terminal of the amplifier MOSFET 72 is coupled to the first BIAS voltage signal 76(V _ BIAS) via the RF choke 78. The gate terminal of the amplifier MOSFET 72 is also coupled to the input voltage signal 70 via a linear coupling capacitor 80. The source terminal of amplifier MOSFET 72 is connected to ground. The drain terminal of the amplifier MOSFET 72 is connected to a current source circuit, which is not shown for clarity but is indicated with an ellipsis ("-) symbol.

The source and drain terminals of predistorter MOSFET74 are connected together, thereby effectively defining a (non-linear) capacitance. The predistorter MOSFET74 is connected between the gate terminal of the amplifier MOSFET 72 and the second BIAS voltage signal 82(V _ BIAS _ NMOS) such that the gate terminal of the predistorter MOSFET74 is connected to the second BIAS voltage signal 82 and the source and drain terminals of the predistorter MOSFET74 are connected to the gate terminal of the amplifier MOSFET 72. This biasing of predistorter MOSFET74 causes it to provide a nonlinear capacitance at the gate terminal of amplifier MOSFET 72.

The dimensions of the second bias voltage signal 82 and the predistorter MOSFET74 are selected such that the combination of the nonlinear capacitance of the predistorter MOSFET74 and the nonlinear capacitance of the amplifier MOSFET 72 define a capacitor that behaves in opposition to the way the input capacitor of the amplifier MOSFET 72 behaves alone. This predistortion cancels out distortion or non-linearity of the amplifier MOSFET 72.

The following formula applies to the embodiment shown in fig. 5:

(6)I_OUT＝Gm₇₂*V_GS₇₂＝Gm₇₂*V_IN*[C₈₀/(C₈₀+{C_72GG+(C_74DD+C_74SS)})]，

wherein Gm₃₆Is the transconductance of the amplifier MOSFET 36, V _ GS₃₆Is the gate-source voltage, C, of the amplifier MOSFET 36₄₄Is the linear capacitance, C, of the coupling capacitor 44_72GGIs the nonlinear capacitance of the amplifier MOSFET 72 at its gate terminal, and C_74DDIs the nonlinear capacitance of predistorter MOSFET 36 at its drain terminal, and C_74SSIs the nonlinear capacitance of predistorter MOSFET 38 at its source terminal; and

(7)Gm_eff＝Gm₇₂*[C₈₀/(C₈₀+{C_72GG+(C_74DD+C_74SS)})]，

wherein, Gm_effIs the effective transconductance of amplifier circuit 66.

From equation (7), it can be seen that the product of the nonlinear transconductance and the nonlinear capacitance division, where these nonlinearities are adjusted to cancel each other, results in a linear effective transconductance (Gm)_eff). The nonlinear capacitance of predistorter MOSFET74 can be adjusted by selecting the size of MOSFET74 and/or the value of second bias voltage 82.

Another alternative amplifier circuit 84 is shown in fig. 6. Transconductance of an RF power amplifier of the type that may be commonly included, for example, in some types of mobile radiotelephone handsets(g_m) The amplifier circuit 84 included IN the stage outputs an RF current signal 86(I _ OUT) IN response to an RF input voltage signal 88(V _ IN). The amplifier circuit 84 includes an amplifier MOSFET 90 and a predistorter MOSFET 92. In the embodiment shown in fig. 6, amplifier MOSFET 90 is a p-channel (PMOS) device and predistorter MOSFET 92 is a p-channel (PMOS) device.

The gate terminal of the amplifier MOSFET 90 is coupled to the first BIAS voltage signal 94(V _ BIAS) via the RF choke 96. The gate terminal of the amplifier MOSFET 90 is also coupled to the input voltage signal 88 via a linear coupling capacitor 98. The source terminal of amplifier MOSFET 90 is connected to a supply Voltage (VCC). The drain terminal of the amplifier MOSFET 90 is connected to a current drain (current drain) circuit, which is not shown for clarity but is indicated with an ellipsis (".") symbol.

The source and drain terminals of predistorter MOSFET 92 are connected together, thereby effectively defining a (non-linear) capacitance. The predistorter MOSFET 92 is connected between the gate terminal of the amplifier MOSFET 90 and the second BIAS voltage signal 100(V _ BIAS _ PMOS) such that the gate terminal of the predistorter MOSFET 92 is connected to the second BIAS voltage signal 100 and the source and drain terminals of the predistorter MOSFET 92 are connected to the gate terminal of the amplifier MOSFET 90. This biasing of predistorter MOSFET 92 causes it to provide a nonlinear capacitance at the gate terminal of amplifier MOSFET 90.

The dimensions of the second bias voltage signal 100 and the predistorter MOSFET 92 are selected such that the combination of the nonlinear capacitance of the predistorter MOSFET 92 and the nonlinear capacitance of the amplifier MOSFET 90 define a capacitor that behaves in opposition to the way the input capacitor of the amplifier MOSFET 90 behaves alone. This predistortion cancels out distortion or non-linearity of the amplifier MOSFET 90.

The improved linearity of a transconductance amplifier of the type described above is illustrated in fig. 7. Transconductance (Gm)99, which is generally characteristic of prior amplifier circuits of the type shown in fig. 2, is non-linear, and is generally characteristic of the exemplary RF power amplifier circuits 30, 48, 66 and 84 described above or other such amplifier circuits to which the present invention relatesEffective transconductance (Gm) of the characteristics of the path_eff)101 is more linear.

As shown in fig. 8 and 9, any of the above-described example RF power amplifier circuits 30, 48, 66 and 84 or other such amplifier circuits to which the present invention relates may be included in a mobile wireless telecommunications device 102, such as a cellular telephone handset. Device 102 includes a Radio Frequency (RF) subsystem 104, an antenna 106, a baseband subsystem 108, and a user interface section 110. The RF subsystem 104 includes a transmitter section 112 and a receiver section 114. The output of the transmitter section 112 and the input of the receiver section 114 are coupled to the antenna 106 via a front end module 116, which front end module 116 allows simultaneous transmission of the transmitted RF signal generated by the transmitter section 112 and the received RF signal provided to the receiver section 114. For a portion of the transmitter section 112, however, the above listed elements may be of the type conventionally included in such mobile wireless telecommunications devices. As conventional elements, those of ordinary skill in the art will well understand that the present invention relates thereto and thus is not described in detail herein. However, unlike the conventional transmitter portion of such mobile wireless telecommunication devices, the transmitter portion 112 includes a power amplifier system 118 having one or more transconductance stages with the above-described exemplary amplifier circuits 30, 48, 66 and 84 (not shown in fig. 7-8) or other such amplifier circuits to which the present invention relates. It should be noted that although the present invention is described in the context of an example embodiment involving a mobile wireless communications device, the present invention may alternatively be implemented in other devices that include an RF transmitter.

As shown in fig. 8, in the transmitter portion 112, the power amplifier system 118 receives the output of an upconverter 120, which upconverter 120 in turn receives the output of a modulator 122. The gain of the power amplifier system 118 may be controlled by adjusting one or more power control signals 124. The power control circuit 126 may generate the control signal 124 in a conventional manner in response to various operating conditions, as is well understood in the art. A bias voltage generator circuit (not shown for clarity) in the power amplifier system 118 may generate the first and second bias voltage signals described above in response to the power control signal 124. As described above, the gain of any of the example amplifier circuits 30, 48, 66, and 84 may be controlled by adjusting its first bias voltage signal. Although in this example embodiment the first and second bias voltage control signals are generated by circuitry within the power amplifier system 118, in other embodiments any other circuitry in the transmitter portion 112 or any other suitable portion of the mobile wireless communication device 102 may generate the first and second bias voltage signals.

While various embodiments of the invention have been described, those of ordinary skill in the art will appreciate that many more embodiments and implementations are possible within the scope of the invention. Accordingly, the invention is not limited except as by the appended claims.

Claims

1. A power amplifier circuit for a Radio Frequency (RF) transmitter, the power amplifier circuit comprising:

an amplifier Metal Oxide Semiconductor Field Effect Transistor (MOSFET) having a gate terminal coupled to a first bias voltage and to an input voltage signal via a linear capacitance, one of a source terminal and a drain terminal coupled to a reference voltage, the other of the source terminal and the drain terminal coupled to a current circuit such that one of the source terminal and the drain terminal provides an output current signal in response to the input voltage signal; and

a predistorter MOSFET connected between a gate terminal of the amplifier MOSFET and the second bias voltage signal, a source terminal of the predistorter MOSFET connected to a drain terminal of the predistorter MOSFET, a combination of the predistorter MOSFET dimensions and the second bias voltage signal values defining a nonlinear capacitance that behaves inversely to the input capacitance of the amplifier MOSFET.

2. The power amplifier circuit of claim 1, wherein:

the amplifier MOSFET comprises an n-channel (NMOS) device, a source terminal of the amplifier MOSFET is coupled to a ground reference voltage, and a drain terminal of the amplifier MOSFET is coupled to a current source circuit; and

the predistorter MOSFET includes a p-channel (PMOS) device, a source terminal and a drain terminal of the predistorter MOSFET are connected to a second bias voltage signal, and a gate terminal of the predistorter MOSFET is connected to a gate terminal of the amplifier MOSFET.

3. The power amplifier circuit of claim 1, wherein:

the amplifier MOSFET comprises a p-channel (PMOS) device, a source terminal of the amplifier MOSFET is coupled to a power supply reference voltage, and a drain terminal of the amplifier MOSFET is coupled to a current sink circuit; and

the predistorter MOSFET includes an n-channel (NMOS) device, a source terminal and a drain terminal of the predistorter MOSFET are connected to a second bias voltage signal, and a gate terminal of the predistorter MOSFET is connected to a gate terminal of the amplifier MOSFET.

4. The power amplifier circuit of claim 1, wherein:

the predistorter MOSFET includes an n-channel (NMOS) device, a source terminal and a drain terminal of the predistorter MOSFET are connected to a gate terminal of the amplifier MOSFET, and the gate terminal of the predistorter MOSFET is connected to the second bias voltage signal.

5. The power amplifier circuit of claim 1, wherein:

the predistorter MOSFET includes a p-channel (PMOS) device, a source terminal and a drain terminal of the predistorter MOSFET are connected to a gate terminal of the predistorter MOSFET, and the gate terminal of the predistorter MOSFET is connected to the second bias voltage signal.

6. The power amplifier circuit of claim 1, wherein the amplifier MOSFET has a nonlinear capacitance substantially equal to a nonlinear capacitance of the predistorter MOSFET.

7. The power amplifier circuit of claim 6, wherein the predistorter MOSFET has a nonlinear capacitance substantially similar to a nonlinear capacitance of the amplifier MOSFET.

8. The power amplifier circuit of claim 1, wherein the power amplifier circuit is included in a mobile wireless communication device.

9. A method for linearly amplifying a Radio Frequency (RF) signal in an RF transmitter, the method comprising:

providing an input voltage signal to a gate terminal of an amplifier Metal Oxide Semiconductor Field Effect Transistor (MOSFET) via a linear capacitor;

providing a first bias voltage to a gate terminal of an amplifier MOSFET;

providing a reference voltage to one of a source terminal and a drain terminal coupled to the amplifier MOSFET;

receiving a current in the other of a source terminal and a drain terminal, one of the source terminal and the drain terminal providing an output current signal in response to an input voltage signal; and

pre-distorting a voltage between a gate terminal and a source terminal of a predistorter MOSFET connected between the gate terminal and a second bias voltage signal of an amplifier MOSFET, the source terminal of the predistorter MOSFET connected to the drain terminal of the predistorter MOSFET, the voltage between the gate terminal and the source terminal of the predistorter MOSFET being pre-distorted by combining a non-linear capacitance of the predistorter MOSFET with a non-linear capacitance of the amplifier MOSFET, the combination of the predistorter MOSFET size and the value of the second bias voltage signal defining a non-linear capacitance which behaves oppositely to an input capacitance of the amplifier MOSFET.

10. The method of claim 9, wherein predistorting the voltage comprises providing a nonlinear capacitance to the predistorter MOSFET similar to a nonlinear capacitance of the amplifier MOSFET.

11. The method of claim 10, wherein providing the predistorter MOSFET with a nonlinear capacitance similar to that of the amplifier MOSFET comprises selecting a combination of predistorter MOSFET size and second bias voltage signal value.

12. A transmitter module, comprising:

a modulator circuit configured to modulate a Radio Frequency (RF) signal;

an upconverter configured to receive the modulated RF signal and generate an upconverted signal; and

a power amplifier circuit configured to amplify the upconverted signal, the power amplifier circuit comprising an amplifier transistor and a predistorter transistor connected between a gate terminal of the amplifier transistor and a bias voltage signal, a combination of a size of the predistorter transistor and a bias voltage signal value defining a nonlinear capacitance that behaves inversely with an input capacitance of the amplifier transistor, and the predistorter transistor being configured such that a gate-source voltage of the amplifier transistor is predistorted to facilitate cancellation of distortion presented by the amplifier transistor.

13. The module of claim 12 wherein each of the amplifier transistor and the predistorter transistor comprises a Metal Oxide Semiconductor Field Effect Transistor (MOSFET).

14. The module of claim 13, wherein the distortion comprises a non-linear response associated with an amplifier MOSFET.

15. A wireless device, comprising:

a baseband subsystem configured to generate a Radio Frequency (RF) signal;

a transmitter circuit in communication with the baseband subsystem and configured to generate an output signal based on an RF signal, the transmitter circuit comprising a first transistor and a predistorter transistor connected between a gate terminal of the first transistor and a bias voltage signal, a combination of a size of the predistorter transistor and a bias voltage signal value defining a nonlinear capacitance that behaves inversely to an input capacitance of the first transistor, and the predistorter transistor configured such that a gate-source voltage of the first transistor is predistorted to facilitate cancelling distortion presented by the first transistor; and

an antenna in communication with the transmitter circuit and configured to facilitate transmission of an output signal.

16. The apparatus of claim 15, wherein the first transistor comprises an amplifier transistor.

17. The apparatus of claim 16, wherein the amplifier transistor and the predistorter transistor are part of a power amplifier circuit.

18. The device of claim 15, wherein the wireless device comprises a cellular telephone device.