HK1099743A - Reduction of etching charge damage in manufacture of microelectromechanical devices - Google Patents
Reduction of etching charge damage in manufacture of microelectromechanical devices Download PDFInfo
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- HK1099743A HK1099743A HK07107310.1A HK07107310A HK1099743A HK 1099743 A HK1099743 A HK 1099743A HK 07107310 A HK07107310 A HK 07107310A HK 1099743 A HK1099743 A HK 1099743A
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Abstract
A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The electrical coupling of the layers mitigates or eliminates the effects of electrostatic charge build up on the device during the removal process.
Description
Technical Field
The present invention relates to a method and apparatus for fabricating a micro-electromechanical device.
Background
Microelectromechanical systems devices (MEMS) can be made from thin film processes. These processes may involve a series of thin films deposited in layers that are patterned and etched to form the devices. To enable the device to be mobile, one of the layers may be an insulating layer. An insulating layer is a layer that serves as a structural member in forming the various layers in the device, but is removable when the device is completed.
The removal of the insulating layer may involve an etching process using a material that only acts on the sacrificial layer material as an etchant. In some cases, the insulating layer may be an oxide that can be removed by a dry gas etch. Other forms of insulating layers, and other removal methods may also exist. Removal of the insulating layer typically creates a gap through which a component of the device will move when actuated.
MEMS devices are often actuated through the use of electrical signals that create a voltage difference between a first conductive layer and a second conductive layer separated by the gap. During dry gas etching of the insulating layer, electrostatic charges may build up on the various layers, causing the movable member to be attracted to another conductive layer. In extreme cases, the two layers may become stuck together and render the device unusable. In less extreme cases, the movable element may be damaged or deformed and then become unable to function correctly.
Disclosure of Invention
A method of fabricating a micro-electromechanical device includes forming at least two conductive layers on a substrate. An insulating layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the insulating layer is removed to form a gap between the conductive layers. Electrically coupling the layers may reduce or eliminate the effect of static charge build-up on the device during the removal process.
The present invention also proposes an apparatus for manufacturing a microelectromechanical device, comprising: a conductive line configured to electrically connect at least two conductive layers together prior to an etching process, wherein the at least two conductive layers form at least a portion of the micromechanical device.
Drawings
The invention is best understood by reading the disclosure herein with reference to the accompanying drawings.
FIG. 1 illustrates one embodiment of a micro-electromechanical device fabricated using an insulating layer;
FIG. 2 shows a MEMS device that is unusable due to static charge build-up during the etching process
Example (c);
FIG. 3 illustrates one embodiment of an apparatus for mitigating the effects of static charge build-up during an etch process;
FIG. 4 shows an alternative to an apparatus for mitigating the effects of electrostatic charge during an etch process
Example (c);
FIG. 5 shows a flow diagram of one embodiment of a method of fabricating a micro-electromechanical device;
fig. 6a and 6b show an embodiment of an alternative apparatus for mitigating the effects of electrostatic charge during an etch process.
Detailed Description
FIG. 1 shows an example of a micro-electromechanical device made by a thin film process including an insulating layer. This particular example is an interferometric modulator example, but embodiments of the invention are also applicable to all kinds of MEMS devices made by thin film processes with insulating layers. The modulator is formed on a transparent substrate 10. An optical stack, typically comprising metal layers and oxide layers, such as 12 and 14, is formed on the substrate 10. A metal film 18 is formed on a sacrificial layer (not shown). The sacrificial layer may also be referred to as an insulating layer because it serves to electrically insulate the conductive layers from each other during processing. Prior to forming the film, vias are patterned within the insulating layer to enable metal in the film to fill the vias and form pillars (e.g., 16).
After the modulator structure (e.g., metal film 18) is fabricated, the insulating layer is removed. This deflects portions of the membrane 18 towards the electrode layer 12 of the optical stack. In the case of an interferometric modulator, the membrane 18 is attracted to the metal layer 12 under manipulation of the voltage difference between the membrane 18 and the electrode layer 12. Layer 12 and film 18 may be a metal as previously described, or may be any conductive material. The cell formed by the membrane portion shown in fig. 1 is activated by applying a voltage to conductive layer 14 that is different from the voltage of membrane 18. This causes the film to become electrostatically attracted to the electrode layer or first conductive layer 12. The conductive layer may be a metal or any other conductive material.
During removal of the insulating layer, sufficient electrostatic charge may build up on the surfaces of the two conductive layers to cause the film to be attracted toward conductive layer 14 without being energized. This state is shown in fig. 2. This is typically the actuated state of the interferometric modulator, but differs in that the membrane does not release from the oxide layer 12 when a change in voltage potential occurs. The membrane has permanently assumed an actuated state. This may be caused by a combination of stiction and friction, often referred to as stiction, and is exacerbated by electrostatic forces between the conductive layer 12 and the conductive film 18.
Removal of the insulating layer can be accomplished in a number of different ways. Typically, a dry gas etch, such as a xenon difluoride (XeF2) etch, is used to remove the insulating layer. Although these are examples of etching processes, any etching process may be used. The potentially dry environment promotes the build up of static charge. However, it is preferable not to have to change the material or process basis used to fabricate the MEMS device, but rather to modify the process used to eliminate the build-up of electrostatic charge.
Certain advantages are also obtained by grounding the conductive layer during the wet etch process. There may be an effect on the electrochemical properties of the device, which may be achieved (if advantageous) or mitigated (if disadvantageous) by grounding. In one embodiment, the layers are grounded together, the insulating layer is removed and the grounding is left in place, thus allowing the device to be safely transported without fear of electrostatic discharge. This may be beneficial if the etching is a wet etch or a dry etch.
The grounding process may be external grounding by an apparatus or mechanism external to the device structure. Alternatively, the ground may be part of the internal structure of the device that is realized during the manufacturing process. First, the external ground will be discussed.
An apparatus for mitigating the build-up of electrostatic charge during an etching process is shown in fig. 3. An alternative embodiment is shown in figure 4. In fig. 3, a conductive wire 22 has been attached to the first and second conductive layers 14 and 18 to keep these conductive layers at the same potential. The same potential may include attaching the conductive layers to a ground plane, or simply attaching the conductive layers together. By keeping these conductive layers at the same potential, the static charge build-up will not create a potential difference between the two layers and will therefore avoid the problem of the membrane being actuated during the etching process. As will be described in further detail below, this will typically be done prior to the etching process, although the two layers may be electrically coupled together at any time prior to the etching process. It may be desirable to confine the electrical coupling to inactive areas in the substrate on which the device is fabricated.
The alternative embodiment shown in fig. 4 shows a device fabricated from three conductive layers and two insulating layers. In this embodiment of an interferometric modulator, what is equivalent to the second conductive layer 18 shown in FIGS. 1 and 3 is actually two conductive layers 18a and 18 b. The two conductive layers are typically deposited as two separate layers but are physically and electrically connected to each other. This will typically result in the flex layer and mirror layer requiring only one connection to connect to the other conductive layers. This particular formation may require two insulating layers as equivalent layers to the first insulating layer, since an insulating layer may be formed between layers 18a and 18b in addition to one formed between layer 18a and electrode layer 12. The connection between layers 18a and 18b may be formed through a via in the second portion of the first insulating layer. For the description herein, the insulating layer is not important, as the conductive layer deposited thereon generally does not require the use of a conductive wire to connect it to other conductive layers.
A second insulating layer 25 may be formed on the flexible layer 18b to provide isolation between the conductive layer 18b and a third conductive layer 26. The third conductive layer in this example is the bus layer that is used to form a signaling bus over the flex layer and mirror layer to help address the cells of the modulator. Regardless of the application or MEMS device in which embodiments of the invention may be employed, this is intended merely as an example of a plurality of conductive layers being electrically coupled to mitigate or eliminate the build-up of electrostatic charge during an etching process.
In fig. 4, an alternative to the connection between the two layers only is shown. In fig. 4, conductive line 22 is attached to a ground plane, in this example the frame of etch chamber 30. This may be preferable to electrically connecting two or more layers together, as it would be connected to a "known" potential, i.e., ground. Alternatively, conductive wires 22 and 24 may be attached to other structures. As long as the two or more layers remain at the same potential, the build-up of electrostatic charge should not cause the film to be attracted to the conductive layer on the substrate.
As previously mentioned, it may be preferable to use a method for avoiding or mitigating static charge build-up that does not interfere with the current process flow for manufacturing MEMS devices. An example of one fabrication of a MEMS device, in this case an interferometric modulator as previously described, is shown in flow chart form in fig. 5.
It must be noted that the process flow given as a specific example in this description is for an interferometric modulator. However, embodiments of the present invention are also applicable to any MEMS device fabrication flow where the insulating layer is removed by dry gas etching. As previously described, interferometric modulators are fabricated on a transparent substrate, such as glass. At 32, an electrode layer is deposited, patterned and etched to form electrodes for addressing the cells of the modulator. An optical layer is then deposited and etched at 34. A first insulating layer is deposited at 36 and subsequently a mirror layer is deposited at 38. In this example, the first conductive layer will be a mirror layer.
The first conductive layer is then patterned and etched at 40. A second insulating layer is deposited at 42. Again, this is the example specifically for fig. 4, where the second conductive layer is actually formed by two conductive layers (the flex layer and the mirror layer). The first and second insulating layers can be considered one insulating layer because the electrostatic charge accumulation between the conductive layers on both sides of the second insulating layer is insignificant. The flex layer is then deposited at 44 and patterned and etched at 46.
At 48, the general process flow is modified to include grounding the first and second conductive layers (in this example, the electrode layer and the mirror/flex layer). For a device having two conductive layers and one effective insulating layer, the process may end at 50, where the insulating layer is removed by etching at 50. This is just one embodiment and therefore the end of the process is in the form of a dashed box. For a device having more than two conductive layers, the process may instead continue at 52.
At 52, a third insulating layer is deposited at 52 in this particular example. As described above, this may actually be only a second effective insulating layer. A bus layer or third conductive layer is deposited at 54 and patterned and etched at 56. At 58, the conductive layers (in this example three conductive layers) are grounded or electrically coupled together (at 58), and the insulating layer is removed at 60. Depending on the function of the device and the electrical drive scheme, the conductive layers are decoupled in 62. For the example of an interferometric modulator in which the operation of the device relies on electrostatic attraction occurring between conductive layers held at different voltage potentials, the coupling would need to be undone.
Wire coupling is an example of an external process that couples conductive layers. Other external examples include the use of test probe structures to provide coupling between the various layers, and the use of ionized gases, where coupling is provided between the various layers by molecules of the gas itself.
It must be noted that the process of connecting the various layers together or all of them to the same potential is referred to as the coupling of the layers. This is intended to cover situations in which the layers are connected together only, connected together to a common potential (where the potential includes ground), or connected to a common potential or the same potential, respectively. The manner in which the various layers are electrically coupled together is not intended to be limiting.
An example of an internal grounding device is shown in fig. 6a and 6 b. As part of the fabrication of MEMS devices, a number of devices are typically fabricated on one substrate (a portion of which is shown at 70 in fig. 6 a). During device fabrication, leads may be provided from the different layers of the device, such as the electrode layer 12, the mechanical or mirror layer 18, and the bus layer 26, to the test pads and bumps, such as 76. As part of the conductive layer patterning and etching process in device fabrication, it is possible to couple all of the pads together, for example, by connecting lines 74 that connect them together. This couples the various conductive layers together for further processing.
As described above, for devices that cannot operate with the layers coupled together, such internal coupling would have to be removed. As shown in fig. 6b, the connection between the pads 76 and the coupling connection 74 may be broken. When the substrate is divided into its individual devices, it may be sawed, scribed, or otherwise separated. The line used to form the break, such as scribe line 78, will sever the coupling between the pad 76 and the coupling connection 74. This is an example of an internal coupling.
In this manner, MEMS devices having conductive layers and at least one insulating layer can be etched using current processes while avoiding the build up of static charge that can render the device inoperable. Prior to packaging, and typically once the device is removed from the etch chamber, the connections in the device are undone or otherwise eliminated.
Thus, while there has been described to this point a particular embodiment for a method and apparatus for mitigating or eliminating the effects of electrostatic charge during an etch process, it is not intended that such specific description be considered as limiting the scope of the invention except insofar as set forth in the following claims.
Claims (21)
1. A method of fabricating a micro-electromechanical device, comprising:
forming at least first and second conductive layers on a substrate;
forming an insulating layer between the first and second conductive layers;
electrically coupling the first and second conductive layers together; and
removing the insulating layer to form a gap between the first conductive layer and the second conductive layer.
2. The method of claim 1, further comprising forming a third conductive layer.
3. The method of claim 2, wherein forming an insulating layer further comprises forming two insulating layers.
4. The method of claim 1, wherein removing the insulating layer comprises performing an etch on the insulating layer.
5. The method of claim 4, wherein performing an etch comprises performing a dry gas etch.
6. The method of claim 5, wherein performing a dry gas etch comprises performing a xenon difluoride etch.
7. The method of claim 1, wherein electrically coupling the conductive layers together comprises externally coupling the conductive layers together.
8. The method of claim 7, wherein externally coupling the conductive layers together comprises removing the insulating layer using a conductive line, applying a probe structure, or using an ionized gas.
9. The method of claim 1, wherein electrically coupling the conductive layers together comprises internally coupling the conductive layers together.
10. The method of claim 1, wherein electrically coupling the conductive layers together comprises using a conductive wire to provide an electrical connection to the conductive layers.
11. The method of claim 1, wherein electrically coupling the conductive layers together comprises using a conductive line to provide an electrical connection to the conductive layers and then connecting the conductive line to a common voltage potential.
12. The method of claim 1, wherein electrically coupling the conductive layers together comprises using a conductive line for each conductive layer and electrically connecting the conductive lines all to the same potential.
13. The method of claim 1, wherein electrically coupling the conductive layers together comprises electrically coupling the conductive layers together in an inactive region of the substrate.
14. An apparatus for fabricating a microelectromechanical device, comprising:
a conductive line configured to electrically connect at least two conductive layers together prior to an etching process, wherein the at least two conductive layers form at least a portion of the micromechanical device.
15. The apparatus of claim 14, wherein the conductive wire comprises an external conductive wire configured to connect the conductive layers together.
16. The method of claim 14, wherein the conductive wire comprises an internal conductive connection configured to connect the conductive layers together.
17. The apparatus of claim 14, wherein the conductive line comprises a conductive line configured to connect the conductive layers together and to a common potential.
18. The apparatus of claim 14, wherein the conductive line comprises a conductive line configured to connect the conductive layers to a common potential, respectively.
19. The apparatus of claim 14, wherein the conductive line is provided in a gas etch chamber.
20. The apparatus of claim 14, wherein one of the at least two conductive layers comprises a metal layer.
21. The apparatus of claim 14, wherein one of the at least two conductive layers comprises an electrode.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/839,329 | 2004-05-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HK1099743A true HK1099743A (en) | 2007-08-24 |
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