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HK105495A - Phase comparator especially for a phase-locked loop - Google Patents

Phase comparator especially for a phase-locked loop

Info

Publication number
HK105495A
HK105495A HK105495A HK105495A HK105495A HK 105495 A HK105495 A HK 105495A HK 105495 A HK105495 A HK 105495A HK 105495 A HK105495 A HK 105495A HK 105495 A HK105495 A HK 105495A
Authority
HK
Hong Kong
Prior art keywords
phase
locked loop
comparator
phase comparator
dropouts
Prior art date
Application number
HK105495A
Inventor
Werner Dipl-Ing Scholz
Original Assignee
Thomson Brandt Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Brandt Gmbh filed Critical Thomson Brandt Gmbh
Publication of HK105495A publication Critical patent/HK105495A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Measuring Phase Differences (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

A device for generating the bit timing (C) used in the decoding or regeneration of a transmitted bit string (A). The slope of the discriminator characteristic (Fig. 3c) corresponds to the phase density distribution (Fig. 3b). This ensures that substantial phase deviations, such as those which frequently occur with dropouts, do not have an undesirably severe effect on the generated control voltage (UR). <IMAGE>
HK105495A 1986-10-11 1995-06-29 Phase comparator especially for a phase-locked loop HK105495A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19863634751 DE3634751A1 (en) 1986-10-11 1986-10-11 PHASE DISCRIMINATOR, ESPECIALLY FOR A PLL CIRCUIT

Publications (1)

Publication Number Publication Date
HK105495A true HK105495A (en) 1995-07-07

Family

ID=6311581

Family Applications (1)

Application Number Title Priority Date Filing Date
HK105495A HK105495A (en) 1986-10-11 1995-06-29 Phase comparator especially for a phase-locked loop

Country Status (7)

Country Link
EP (1) EP0264035B1 (en)
JP (1) JP2941276B2 (en)
KR (1) KR960012798B1 (en)
AT (1) ATE90819T1 (en)
DE (2) DE3634751A1 (en)
ES (1) ES2041666T3 (en)
HK (1) HK105495A (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07101847B2 (en) * 1988-10-21 1995-11-01 シャープ株式会社 Digital Phase Locked Loop Device
DE3928676A1 (en) * 1989-08-30 1991-03-07 Thomson Brandt Gmbh CIRCUIT FOR DETECTING A USE SIGNAL IN A BINARY SIGNAL
US5410557A (en) * 1989-08-30 1995-04-25 Deutsche Thomson-Brandt Gmbh Method and apparatus for recognizing valid components in a digital signal
DE4119452A1 (en) * 1991-06-13 1992-12-17 Thomson Brandt Gmbh Phase locked loop circuit with count phase discriminator - uses output pulse ratio to control regulating voltage for voltage-controlled oscillator
US5375148A (en) * 1993-03-01 1994-12-20 Motorola, Inc. VCO bias generator in a phase lock loop
DE19513080C1 (en) * 1995-04-07 1996-11-14 Bosch Gmbh Robert Demodulator for orthogonally modulated carrier signals
WO2006087782A1 (en) * 2005-02-17 2006-08-24 Kyocera Kinseki Corporation Device and method for evaluating waveform measuring device and method for measuring jitter
MD4067C1 (en) * 2008-08-26 2011-03-31 Институт Электронной Инженерии И Промышленных Технологий Академии Наук Молдовы Method of regulating the voltage with step-up and inverting pulse converters

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE324835B (en) * 1968-10-14 1970-06-15 Asea Ab
US3701039A (en) * 1968-10-28 1972-10-24 Ibm Random binary data signal frequency and phase compensation circuit
US3646455A (en) * 1970-10-08 1972-02-29 Mohawk Data Sciences Corp Phase-detecting circuit
US3902128A (en) * 1974-08-05 1975-08-26 Motorola Inc Frequency/phase comparator
GB1547360A (en) * 1975-12-01 1979-06-13 Gen Electric Co Ltd Apparatus for indicating the sequence of alternating current signals
DE2809315B2 (en) * 1978-03-03 1980-01-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Digital frequency discriminator
JPS5551100U (en) * 1978-10-02 1980-04-03
US4330759A (en) * 1980-03-05 1982-05-18 Bell Telephone Laboratories, Incorporated Apparatus for generating synchronized timing pulses from binary data signals
DE3138964A1 (en) * 1981-09-30 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Method for suppressing interference in the phase comparison between two alternating-voltage signals, particularly in the phase comparison in ultrasonic echo signal phase detector arrangements for space surveillance devices
JPS6047515A (en) * 1983-08-26 1985-03-14 Victor Co Of Japan Ltd Pull in-decision circuit
DE3520301A1 (en) * 1984-06-16 1985-12-19 ANT Nachrichtentechnik GmbH, 7150 Backnang Phase comparison procedure
JPS6130814A (en) * 1984-07-10 1986-02-13 ジヨン・フリユ−ク・マニフアクチヤリング．カムパニ−，インコ−ポレ−テツド Digital phase detector

Also Published As

Publication number Publication date
KR880005760A (en) 1988-06-30
JPS63114412A (en) 1988-05-19
JP2941276B2 (en) 1999-08-25
DE3786221D1 (en) 1993-07-22
KR960012798B1 (en) 1996-09-24
EP0264035A3 (en) 1989-07-26
EP0264035A2 (en) 1988-04-20
DE3634751A1 (en) 1988-04-14
EP0264035B1 (en) 1993-06-16
ES2041666T3 (en) 1993-12-01
ATE90819T1 (en) 1993-07-15

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)