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HK1027468B - Composite laminate circuit structure and method of forming the same - Google Patents

Composite laminate circuit structure and method of forming the same Download PDF

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Publication number
HK1027468B
HK1027468B HK00106448.5A HK00106448A HK1027468B HK 1027468 B HK1027468 B HK 1027468B HK 00106448 A HK00106448 A HK 00106448A HK 1027468 B HK1027468 B HK 1027468B
Authority
HK
Hong Kong
Prior art keywords
voltage plane
circuit board
plated
voltage
hole
Prior art date
Application number
HK00106448.5A
Other languages
Chinese (zh)
Other versions
HK1027468A1 (en
Inventor
罗斯‧W‧基斯勒
沃雅‧R‧马克维奇
吉姆‧鲍勒蒂
马里伯斯‧伯里诺
威廉‧E‧威尔逊
Original Assignee
国际商业机器公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/204,458 external-priority patent/US6175087B1/en
Application filed by 国际商业机器公司 filed Critical 国际商业机器公司
Publication of HK1027468A1 publication Critical patent/HK1027468A1/en
Publication of HK1027468B publication Critical patent/HK1027468B/en

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Description

Composite laminated circuit structure and manufacturing method thereof
Technical Field
The present invention relates generally to the fabrication of laminated circuit structures using photolithographic techniques, and more particularly to a method of fabricating a composite laminated structure using a plurality of preformed circuits having signal planes and voltage planes, and a laminated structure having a ground plane without a signal plane.
Background
This application relates to application No.09/203956 entitled "circuit board with two signal planes and one power plane" filed on 12/2 of 1998 and application No.09/203978 entitled "circuit board with multiple voltage planes and multiple signal planes" filed on 12/2 of 1998.
Conventional techniques for fabricating laminated circuit board structures include fabricating layers of dielectric material and layers of conductive material to provide multiple layers of circuitry and voltage planes. The voltage plane may be a ground plane or a power plane, sometimes collectively referred to as a power plane. In the prior art for making such structures, a layer of dielectric material and a layer of conductive material are applied sequentially, i.e. a dielectric material is applied, and then a voltage plane is provided thereon, and if necessary, vias are made by drilling or etching through holes or blind holes. This technique relies on each successive step of adding additional structures, while the circuit layers are made separately; that is, in each step of fabricating a signal plane, each plane is fabricated after a previous signal plane is fabricated, and a signal plane is fabricated on the fabricated power plane. This requires drilling to form plated through holes, all of which is time consuming, especially when a large number of drilled holes are required to form plated through holes.
Accordingly, it is desirable to provide a relatively inexpensive lithographic technique for fabricating composite laminate structures that enables the composite laminate structures to be obtained from individual discrete laminate structures.
Disclosure of Invention
A method of making a composite laminate structure includes providing first and second circuit board elements each having circuitry and plated through holes on at least one surface thereof. The voltage plane element is fabricated to have at least one voltage plane having opposing surfaces with a layer of partially cured photosensitive dielectric material on each surface. At least one hole is photopatterned and etched through the voltage plane element, but completely isolated from the voltage plane. Each through-hole in the voltage plane member is aligned with a plated through-hole in each circuit board member to provide a surface on the voltage plane member in communication with the plated through-hole. The voltage planes are laminated between the circuit board components and the photoimageable material on the voltage planes is fully cured. The surface of the voltage plane member in communication with the plated through holes in the circuit board members is plated with a conductive material to establish a connection between the circuits on the first and second circuit board members.
Drawings
FIG. 1 is a schematic plan view showing a composite laminate structure having a two-element card or board for use in a preferred embodiment;
FIG. 2 is a cross-sectional view taken substantially along the plane indicated by line 2-2 of FIG. 1;
FIGS. 3a-3c are schematic cross-sectional views illustrating fabrication of a voltage plane composite structure;
FIGS. 4a-4f illustrate sequential steps in laminating the two components shown in FIG. 2 with the components in FIG. 3c to form a final composite laminate structure; and
fig. 5 is a cross-sectional view of another embodiment of two elements of a voltage plane element to be used in the present invention, similar to fig. 4 a.
Detailed Description
The present invention provides a technique and results in a structure in which two or more substantially fully circuitized elements can be connected together with one or more power plane elements that are not circuitized when connected, but are circuitized after connection with the circuitized elements to form a composite laminate structure of multiple voltage planes and signal planes, wherein the circuitization of the signal plane elements is substantially completed before the elements are laminated to form the final structure.
The invention is described in its preferred embodiment using components fabricated in accordance with application No.09/203956 entitled "circuit board for two signal planes and one power plane" filed on 12/2 of 1998, which is hereby incorporated by reference. It is to be understood that other circuitized components, such as those made according to application No.09/203978 entitled "multi-voltage plane and multi-signal plane circuit board" filed on 12/2 of 1998, also incorporated herein by reference, and components made by other methods, or combinations of circuitized discrete components made using these or other techniques, may also be employed. This will become more apparent from the following detailed description of the invention.
Referring now to the drawings, and initially to FIG. 1, there is shown a schematic diagram of a plurality of circuit cards or boards or panels of circuit card or board regions used to make circuitized components forming the composite laminate structure of the present invention. As can be seen in fig. 1, panel 10 has a plurality of circuit cards or boards fabricated thereon as indicated by reference numeral 12, with individual cards or boards 12 separated by borders 14 extending completely around the individual cards or boards 12. A border 16 is also fabricated that provides electrical isolation inside the card. Circuitry 18 is fabricated on both sides of panel 10. As will be described, the terms "card" or "circuit card" are used herein to denote a circuitized substrate that may be used as a chip carrier or circuit board or circuit card for mounting chips and other electrical components, which itself becomes a circuitized component of a composite laminate structure formed by two or more such "cards" or "circuit cards" laminated to a voltage plane component.
Fig. 2 is a sectional view showing a partial structure of the "card" 12 for a composite structure. The fabrication of such a panel is described in application No.09/203956 entitled "circuit board with two signal planes and one power plane" filed on 2.12.1998. Each card 12 is composed of a thin copper foil 20 as a voltage plane. As used herein, voltage planes may be considered ground planes or power planes, and the various voltage planes are sometimes collectively referred to as power planes, regardless of whether they are ground planes or "voltage planes". The copper foil 20, which is the ground plane, has at least one and preferably a plurality of through holes 22 formed therethrough to allow plated through holes to extend from one surface of the part to the other. A first layer of photo-patterned dielectric material 24 is applied to one side of the copper foil 20 and a second layer of photo-patterned dielectric material 26 is applied to the opposite side of the copper foil 20 with the dielectric material filling the vias 22 as shown at 28.
The thickness of each layer of dielectric material is preferably between 2 and 4 mils. Particularly useful photopatterning materials are epoxy-based materials of the type described in commonly assigned U.S. patent No.5026624 entitled "photoimageable composition," which is hereby incorporated by reference. Such materials 24 and 26 are photoimaged or photopatterned and developed to reveal the desired pattern to provide a dielectric substrate (with vias) upon which a circuit board metal circuit pattern, such as plated copper, can be fabricated. The dielectric material may be curtain coated as described in U.S. patent No.5026624, may contain a thixotropic agent and be curtain coated as described in U.S. patent No.5300402, or may be provided as a dry film. The photopatterned dielectric materials 24 and 26 are photopatterned, developed and fully cured with circuitry and vias thereon as described in said application No. 09/203956. The final curing of the photoimageable material provides a toughened dielectric substrate on which the circuitry is fabricated. This circuit includes circuit pattern 44, blind vias 46 through dielectric material 24 or 26 to copper foil 20, plated through holes 48 through both dielectric materials 24 and 26, and through holes 22 made in copper foil 20 without contacting copper foil 20. The border 14 is also made as described in said application No. 09/203956. In this condition, fig. 2 shows the panel 10. The fabrication of the composite laminate can be completed with the panel 10 remaining in the assembly line with all of the panels still secured, or with the individual panels being cut and the lamination process being performed separately on the individual panels. The process carried out with the method of holding the panel 10 as a whole in the assembly line will be described below.
For ease of description, the process will be described as using two identically fabricated panels 10 that are joined together by electrically laminating the component panels together. It should be understood that a wide variety of different panel structures can be joined, as will become apparent in the ensuing description, and there is no requirement that the structures of the individual panels to be joined be identical. Also, the panels may be separated into individual panels and then joined.
As described above, two identical panels are used as circuit board elements, and for reference convenience, one panel will be denoted by a reference numeral without a subscript, while the other of the two panels being connected will use a reference numeral followed by a subscript "a".
The two panels 10 and 10a with cards 12 and 12a thereon are connected by a voltage plane panel 60, the fabrication of which is shown in fig. 3a-3 c. The voltage plane panel 60 is fabricated by first providing a metal layer 70 preferably of copper foil (half ounce or 1 ounce) having 1 ounce of a standard material conventionally used copper. The thickness of the metal layer should preferably be about 0.7-2.8 mils, as with the copper foil 20 of the panel 10.
Holes shown at 72 are made in the foil 70 by mechanical drilling or by etching. One etching technique is to use a photolithography process in which the locations of the individual holes are patterned and developed in a photoresist applied to both sides of the copper foil 70, and etched using a material such as copper chloride (CuCl)2) Such etchants etch holes through the copper. The photoresist is then stripped. This process is well known in the art.
The process is briefly as follows: referring to fig. 3a-3c, a first layer of photo-patterned dielectric material 74 is applied on one side of the copper foil 70, and a second layer of photo-patterned dielectric material 76 is applied on the opposite side of the copper foil 70, with the photo-patterned dielectric materials 74 and 76 filling the via 72, as indicated at 78. At this point, the thickness of the photo-patterned dielectric materials 74 and 76 is preferably the same as the thickness of the photo-imageable dielectric material layers 24 and 26 of the panel 10; i.e., preferably between about 2-4 mils thick. It is desired that the photo-patterned dielectric materials 74 and 76 be capable of being partially cured and adhered in their partially cured form to the dielectric materials 24 and 26, the circuitry 44 and 46, and the plated through-holes 48 of the panels 10 and 10a, and then fully cured to receive the circuitry.
Particularly useful photoimageable materials are epoxy-based materials of the type described in commonly assigned U.S. patent No.5026624 entitled "photoimageable component" which is hereby incorporated by reference. As shown in fig. 2b, this material is photoimaged, i.e., photopatterned, and developed to reveal the desired pattern, and then cured to provide a dielectric substrate on which a metallic circuit pattern, such as plated copper, forming a circuit board can be fabricated. The dielectric material may be curtain coated as described in said patent No.5026624, or may contain thixotropic agents and be applied by masking as described in us patent No.5300402, and the material may also be applied as a dry film. The technique for making the dry film is as follows:
preparing a photoimageable media composition having a solids content of from about 86.5% to about 89%, the solids comprising: about 27.44% PKHC phenoxy resin; 41.16% Epirez 5183 tetrabromobisphenol A; 22.88 percent of Epirez SU-8 eight-functional epoxy bisphenol A formaldehyde synthetic phenolic resin; 4.85% of UVE1014 photoinitiator; 0.07% of ethyl violet dye; 0.03% Fc430 fluorinated polyester nonionic surfactant from 3M company; 3.85% Aerosil380 amorphous silica from Degussa; in order to provide the solid component. The solvent is about 11-13.5% of the total photoimaging medium components. The photoimageable dielectric composition was coated on a 1.42 mil thick layer of polyethylene terephthalate polyester known as MylarD from DuPont. The photoimageable dielectric composition may be dried to provide a 2.8 mil thick photoimageable dielectric film on the back of the polyethylene terephthalate.
The specific materials 74 and 76 described in said patent nos. 5026624 and 5300402 are negative photosensitive media. Thus, when the material is developed in a developer, the areas exposed to actinic radiation (in this case ultraviolet light) will not be developed (i.e., remain), while the unexposed areas will be removed, i.e., developed out.
The purpose of the voltage plane panel planar element is to provide an additional voltage plane in the panels 10 and 10a or cards 12 and 12a to form a composite laminate structure consisting of two panels 10a or two cards 12a, a voltage plane panel 60 or a voltage plane unit, the voltage plane panel 60 or voltage plane unit providing the additional voltage plane and structure for laminating the panels 10 and 10a together into a single laminate structure that can later be cut into two cards 12 and 12a, as previously noted, may consist of cards 12 and 12a and voltage plane panel 60. To this end, photo-patterned dielectric materials 74 and 76 and hole fill material 78 are provided along with vias 84 that enable the circuit 44 to communicate with circuit 44a, and the blind vias 82 and 82a of circuits 44-44a to communicate with copper foil 70 to form additional voltage planes.
To this end, the panel 60 having the light patterned dielectric materials 74, 76 and 78 thereon is light patterned and developed to form the necessary windows. The structure shown in fig. 3b is masked and exposed to ultraviolet light in a conventional manner to provide vias 80 extending into photo-patterned dielectric material 74 of foil 70 and vias 82 extending into photo-patterned dielectric material 76 of foil 70. A through hole 84 is also made through the hole 72, the edge of the through hole 84 being spaced from the foil 20. As described in said application No.09/203956, a suitable agent for developing epoxy resin materials is acrylic carbonate, and the exposure is done with ultraviolet light.
At this point in the process, the photo-imageable dielectric materials 74, 76 and 78 are B-stage cured, i.e., cured in a controlled and repeatable manner, to the extent that the materials are able to flow so as to mechanically bond to the opposing surfaces of the panels 10 and 10a to form a composite structure, and then the photo-patterned dielectric materials 74, 76 and 78 are fully cured as described.
Boundaries 88 around each voltage plane panel 60 are also formed corresponding to boundaries 14 and 14a around cards 12 and 12 a. In a manner similar to the manner in which panels 10 and 10a and cards 12 and 12a are made, these boundaries are made to remain integral by photoimaging only dielectric material 74, not dielectric material 76, and also by copper foil 70, and the chips are then diced.
Fig. 4a-4f illustrate the fabrication of the final composite structure. Since the purpose of the voltage plane panel 60 is to provide electrical connection between two cards 12 and 12a or between one of the cards 12 and 12a and the voltage plane defined by the copper foil 70, the necessary circuitry in the voltage plane 60 or each voltage plane cell must be provided. The voltage plane panel 60 or cell must also connect the two panels 10 and 10a or the two cells 12 and 12a together to form a composite structure. As will be seen, the only way to provide access to the voltage plane panel 60 or cell 62 after lamination is to utilize plated through holes 48 in the panels 10 and 10 a. The plated through holes 22 in the panels 10 and 10a must then be aligned with any location on the panel 60 where an electrical connection is to be made to or through the respective panel 60. Also, as will be seen, the diameter of the through-hole 84 in the voltage panel 60 must be smaller than the diameter of the plated through-hole 48, and the window diameter of the vias 80 and 82 must be smaller than the inner diameter of the plated through-hole 48.
It is also required that the plated through holes 48 in the panel 10 or 10a must be aligned with the windows of the vias 80 or 82 in the dielectric 74 or 76, respectively, where the respective panel is to be connected to the copper foil 70 defining the voltage plane. The plated through holes 48 in each panel 10 and 10a must also be aligned with the through holes 84 in the voltage plane 60.
As shown in fig. 4a, the partial panels 10 and 10a are shown positioned and aligned in a stack, with all of the voltage panels 60 to be connected to form a composite structure. As noted earlier, the photo-patterned dielectric materials 74, 76 and 78 of panel 60 are B-stage cured and thus are sufficiently viscous to provide an adhesive interface to both panels 10 and 10a when the photo-patterned dielectric materials 24 and 26 on panels 10 and 10a are fully cured. As shown in fig. 4a, through holes 48 and 48a are aligned with the windows of vias 80 or 82 or with through hole 84. The panels 10 and 10a are brought into contact with opposite sides of the voltage panel 60 and the photoimageable dielectric materials 74, 76 and 78 are cured to a final cured state. This process is preferably performed by heating the composite panel structure to a temperature of about 190 c at about 500psi for about 2 hours, which will result in at least about 95% cure, and the laminate structure of fig. 4 b.
With the composite structure of a pair of panels 10 and 10a laminated to opposite sides of voltage panel 60 as shown in fig. 4b, curing of photo-patterned dielectric materials 74 and 76 provides a suitable surface for receiving a copper plating. For this purpose, the required interconnections between the panels 10 and 10a and the voltage panel 60 are plated with photolithographic techniques.
The exposed surfaces of the panels 10 and 10a, open vias 48 or 48a and rim 108 are seeded with a layer of palladium or other seeding layer as shown in fig. 4c and coated with a photoresist material as shown in fig. 4 d. Either a negative or positive photoresist. As shown in fig. 4d, the photoresist is patterned and developed to provide windows 102 and 102a at all locations aligned with one of the vias 48 or 48a to be used to provide interconnections to the panel 60 or through the panel 60. (recall that the only path that can form the connection to the panel 60 is through the plated holes 48 and 48 a). This layout then provides a through hole 84 through the voltage panel 60, a boundary 106 around the hole 84 where a connection is to be made through the plated through hole 48, and a boundary 108 around the windows of the vias 80 and 82.
The composite panel is then electroless plated or electroplated with copper 110, preferably using conventional additive plating techniques, to provide the necessary interconnections. The plated structure is shown in fig. 4e and includes plated connection 112 in hole 84 and plated connection 114 in holes 80 and 82.
Next, the photoresist 100 is stripped and the seeding layer 99 is rapidly etched to provide the desired composite structure shown in fig. 4f consisting of panels 10 and 10a physically and electrically connected by voltage panel 60. The individual plates are cut from a panel having a composite structure of individual cards consisting of a pair of cards 12 and 12a and a voltage plane panel 60.
As described earlier, the preferred embodiment utilizes two plates 12 and 12a and a voltage plane panel 60. It is to be understood that a composite of three or more cards 12, 12a, …, 12n can be made using additional cards 12 and 12a and additional voltage plane panels 60, and that two or more voltage plane panels 60 can be used. Also, as noted earlier, cards 12 and 12a need not be identical, but may be pre-designed and plated to perform the desired electrical functions. Also, as noted earlier, the present invention is not limited to the technique of making the panels described in application No. 09/203956. For example, in combination with the board of application No.09/203956 or with other boards of the same type or of different types, it is also possible to use a board consisting of two power planes as described in application No. 09/203978. The situation according to application No.09/203978 is shown in fig. 5.
Thus, the preferred embodiments of the present invention have been described. With the foregoing description in mind, it is to be understood that the description is by way of example only and that the invention is not limited to the particular embodiments described herein, but is capable of numerous rearrangements, modifications and substitutions without departing from the true spirit of the invention as set forth and defined by the following claims.

Claims (17)

1. A method of making a composite laminate structure comprising the steps of:
providing first and second circuit board elements each having circuitry on at least one surface thereof and having plated through holes,
providing a voltage plane element having at least one voltage plane, having opposing surfaces, with a partially cured photo-patterned dielectric material on each of the surfaces,
photopatterning and etching at least one aperture through the voltage plane element and at least one window through each photopatterned dielectric material layer terminating at the voltage plane,
aligning each through-hole and each window in said voltage plane member with a plated through-hole in at least one of said circuit board members to provide a surface on said voltage plane member in communication with said plated through-hole, said at least one surface of each of said circuit board members being spaced apart from said voltage plane member,
laminating said voltage plane element between said circuit board elements and fully curing said photo-patterned dielectric material of said voltage plane element, and
plating a surface of the voltage plane component in communication with the plated through hole in the circuit board component.
2. The method of claim 1, wherein the circuit board components are at least partially composed of a fully cured photo-patternable material.
3. The method of claim 1, wherein there are circuits on respective surfaces of said circuit board elements.
4. The method of claim 1, wherein the surface of the voltage plane element is plated using photolithography.
5. The method of claim 1, wherein the plating is copper plating.
6. The method of claim 1, wherein the voltage plane element has a single voltage plane.
7. The method of claim 1, wherein each circuit board component has at least one voltage plane.
8. The method of claim 7, wherein each circuit board component has a plated through hole through the at least one voltage plane.
9. The method of claim 1, wherein at least one circuit board element has a plurality of voltage planes.
10. The method of claim 1, wherein the photo-patterned dielectric material is an epoxy.
11. A composite laminate structure comprising:
first and second circuit board elements each having circuitry on at least one surface thereof and plated through holes,
a voltage plane element having at least one voltage plane, laminated between said first and second circuit board elements, having opposite surfaces, with a fully cured photo-patterned dielectric material layer on each surface thereof, at least one surface of each circuit board element being spaced from said voltage plane element,
etching at least one hole through the voltage plane element and at least one window through each layer of photo-patterned dielectric material terminating at the voltage plane,
each through-hole and each window in said voltage plane element being aligned with a plated through-hole in at least one of said circuit board elements so as to provide a surface on said voltage plane element in communication with said plated through-hole, each said surface comprising a ring-hole or said photo-patternable material of said voltage plane element,
a conductive material on a surface of said voltage plane element in communication with said plated through hole in said circuit board element establishing electrical communication between said circuit and said voltage plane in said voltage plane element.
12. The composite laminate structure of claim 11, wherein there is an electrical circuit on each surface of said circuit board elements.
13. The composite laminate structure of claim 11 wherein said voltage plane element has a single voltage plane.
14. The composite laminate structure of claim 11 wherein each circuit board element has at least one voltage plane.
15. The composite laminate structure of claim 14 wherein each circuit board element has a plated through hole through the at least one voltage plane.
16. The composite laminate structure of claim 11 wherein at least one circuit board element has a plurality of voltage planes.
17. The composite laminate structure of claim 11 wherein the photopattemed dielectric material is an epoxy.
HK00106448.5A 1998-12-02 2000-10-11 Composite laminate circuit structure and method of forming the same HK1027468B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/204458 1998-12-02
US09/204,458 US6175087B1 (en) 1998-12-02 1998-12-02 Composite laminate circuit structure and method of forming the same

Publications (2)

Publication Number Publication Date
HK1027468A1 HK1027468A1 (en) 2001-01-12
HK1027468B true HK1027468B (en) 2005-04-08

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