GB9721488D0 - Method and system for refreshing memory - Google Patents

Method and system for refreshing memory

Info

Publication number: GB9721488D0
Authority: GB; United Kingdom
Prior art keywords: refreshing memory; refreshing; memory
Prior art date: 1996-10-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

GBGB9721488.6A

Other versions

GB2320774B (en

GB2320774A (en

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

HP Inc

Original Assignee

Hewlett Packard Co

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1996-10-10

Filing date

1997-10-09

Publication date

1997-12-10

1997-10-09 Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co

1997-12-10 Publication of GB9721488D0 publication Critical patent/GB9721488D0/en

1998-07-01 Publication of GB2320774A publication Critical patent/GB2320774A/en

2000-12-27 Application granted granted Critical

2000-12-27 Publication of GB2320774B publication Critical patent/GB2320774B/en

2017-10-09 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Dram (AREA)
Techniques For Improving Reliability Of Storages (AREA)

GB9721488A 1996-10-10 1997-10-09 Method and system for refreshing memory Expired - Fee Related GB2320774B (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US08/720,960 US5754557A (en)	1996-10-10	1996-10-10	Method for refreshing a memory, controlled by a memory controller in a computer system, in a self-refresh mode while scanning the memory controller

Publications (3)

Publication Number	Publication Date
GB9721488D0 true GB9721488D0 (en)	1997-12-10
GB2320774A GB2320774A (en)	1998-07-01
GB2320774B GB2320774B (en)	2000-12-27

Family

ID=24895954

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
GB9721488A Expired - Fee Related GB2320774B (en)	1996-10-10	1997-10-09	Method and system for refreshing memory

Country Status (4)

Country	Link
US (1)	US5754557A (en)
JP (1)	JP4083847B2 (en)
DE (1)	DE19740223C2 (en)
GB (1)	GB2320774B (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5999481A (en)	1997-08-22	1999-12-07	Micron Technology, Inc.	Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
US6295618B1 (en) *	1998-08-25	2001-09-25	Micron Technology, Inc.	Method and apparatus for data compression in memory devices
JP2001290696A (en) *	2000-04-07	2001-10-19	Minolta Co Ltd	Memory board
JP4689087B2 (en) *	2000-08-22	2011-05-25	キヤノン株式会社	Information processing apparatus and power saving transition control method
US6901359B1 (en) *	2000-09-06	2005-05-31	Quickturn Design Systems, Inc.	High speed software driven emulator comprised of a plurality of emulation processors with a method to allow high speed bulk read/write operation synchronous DRAM while refreshing the memory
US7236987B1 (en)	2003-02-28	2007-06-26	Sun Microsystems Inc.	Systems and methods for providing a storage virtualization environment
US7383381B1 (en)	2003-02-28	2008-06-03	Sun Microsystems, Inc.	Systems and methods for configuring a storage virtualization environment
US7447939B1 (en) *	2003-02-28	2008-11-04	Sun Microsystems, Inc.	Systems and methods for performing quiescence in a storage virtualization environment
US7290168B1 (en)	2003-02-28	2007-10-30	Sun Microsystems, Inc.	Systems and methods for providing a multi-path network switch system
US7107394B2 (en) *	2003-03-28	2006-09-12	Hewlett-Packard Development Company, L.P.	Apparatus for capturing data on a debug bus
JP3811143B2 (en) *	2003-07-09	2006-08-16	株式会社東芝	Memory control circuit
JP5082727B2 (en) *	2007-09-28	2012-11-28	ソニー株式会社	Storage control device, storage control method, and computer program
US8495287B2 (en)	2010-06-24	2013-07-23	International Business Machines Corporation	Clock-based debugging for embedded dynamic random access memory element in a processor core
US20150178102A1 (en) *	2011-11-23	2015-06-25	Freescale Semiconductor, Inc.	System-on-chip, method of manufacture thereof and method of controlling a system-on-chip
US11586383B2 (en)	2018-10-16	2023-02-21	Micron Technology, Inc.	Command block management
US11543996B2 (en)	2020-05-20	2023-01-03	Western Digital Technologies, Inc.	Systems and methods for power management in a data storage device
US11137823B1 (en) *	2020-05-20	2021-10-05	Western Digital Technologies, Inc.	Systems and methods for power management in a data storage device
CN112328305B (en) *	2020-10-30	2022-10-18	歌尔光学科技有限公司	An eye diagram testing method, device, electronic device and readable storage medium

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4827476A (en) *	1987-04-16	1989-05-02	Tandem Computers Incorporated	Scan test apparatus for digital systems having dynamic random access memory
JPH02255925A (en) *	1988-11-30	1990-10-16	Hitachi Ltd	Memory test method and device
US5255381A (en) *	1990-07-03	1993-10-19	Digital Equipment Corporation	Mode switching for a memory system with diagnostic scan
CA2157595A1 (en) *	1994-01-05	1995-07-13	William H. Keehn	Safe-stop mode for a microprocessor operating in a pseudo-static random access memory environment
JP3260583B2 (en) *	1995-04-04	2002-02-25	株式会社東芝	Dynamic semiconductor memory and test method thereof

1996
- 1996-10-10 US US08/720,960 patent/US5754557A/en not_active Expired - Lifetime
1997
- 1997-09-12 DE DE19740223A patent/DE19740223C2/en not_active Expired - Fee Related
- 1997-10-08 JP JP27554597A patent/JP4083847B2/en not_active Expired - Fee Related
- 1997-10-09 GB GB9721488A patent/GB2320774B/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
JP4083847B2 (en)	2008-04-30
GB2320774B (en)	2000-12-27
US5754557A (en)	1998-05-19
DE19740223C2 (en)	2003-11-13
JPH10133960A (en)	1998-05-22
GB2320774A (en)	1998-07-01
DE19740223A1 (en)	1998-04-16

Publication	Publication Date	Title
GB2368415B (en)	2002-10-30	Improved memory system apparatus and method
GB2317258B (en)	2000-11-22	Ticketless system and processing method and memory medium storing its processing program
EP0760975A4 (en)	1997-09-03	Guarded memory system and method
SG77144A1 (en)	2000-12-19	Memory system and data transfer method
GB9614551D0 (en)	1996-09-04	Memory system
IL126441A0 (en)	1999-08-17	Positioning system and method
PL339268A1 (en)	2000-12-04	Rapid marking-out method and system
EP0973097A4 (en)	2000-04-12	Memory and access method
IL119317A (en)	2003-05-29	Dram system and operation thereof
GB2317034B (en)	1998-12-30	Data storage system and data storage control method
GB2320774B (en)	2000-12-27	Method and system for refreshing memory
EP0864070A4 (en)	2001-01-24	Thermal storage system controller and method
GB2311153B (en)	2000-11-22	Random access memories and method of operation
SG63746A1 (en)	1999-03-30	Method and system for testing memory
SG48487A1 (en)	1998-04-17	Multiple zone data storage system and method
EP0883853A4 (en)	1999-09-15	Control system and method
GB2306235B (en)	1998-07-15	Method for accessing memory device and memory accessing device
GB9417269D0 (en)	1994-10-19	Memory and test method therefor
ZA962721B (en)	1996-10-09	Accumulation system and method
AU2020795A (en)	1995-11-30	Memory collation method and memory collation system
GB2306238B (en)	1998-04-08	Device and method for memory access
SG42802A1 (en)	1997-10-17	Storing system and method
GB2314668B (en)	1998-06-17	Device and method for controlling multidomain memory
GB9608099D0 (en)	1996-06-26	Beverage conservation system and method
GB2328765B (en)	2003-03-26	Memory addressing method and system

Legal Events

Date	Code	Title	Description
2001-04-11	732E	Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
2009-06-24	PCNP	Patent ceased through non-payment of renewal fee	Effective date: 20081009