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GB956018A - Improvements in or relating to gating circuit arrangements - Google Patents

Improvements in or relating to gating circuit arrangements

Info

Publication number
GB956018A
GB956018A GB3465261A GB3465261A GB956018A GB 956018 A GB956018 A GB 956018A GB 3465261 A GB3465261 A GB 3465261A GB 3465261 A GB3465261 A GB 3465261A GB 956018 A GB956018 A GB 956018A
Authority
GB
United Kingdom
Prior art keywords
gates
gate
output
input
trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3465261A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens and Halske AG
Siemens Corp
Original Assignee
Siemens and Halske AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens and Halske AG, Siemens Corp filed Critical Siemens and Halske AG
Publication of GB956018A publication Critical patent/GB956018A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/084—Diode-transistor logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/64—Generators producing trains of pulses, i.e. finite sequences of pulses
    • H03K3/66—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator
    • H03K3/70—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator time intervals between all adjacent pulses of one train being equal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Abstract

956,018. Transistor switching circuits. SIEMENS & HALSKE A.G. Sept. 27, 1961 [Sept. 28, 1960], No. 34652/61. Heading H3T. A circuit for applying any of a number of input signals to an output in response to command signals comprises a number of AND gates each having a first input terminal to which a respective one of the input signals is applied, and two further input terminals connected to control voltage sources which are controlled by the command signals and one of the input signals. As shown in Fig. 1, a bi-stable trigger circuit BK1 controlled by an input E1 produces outputs a1, a2 which are connected to inputs 1, 2 of AND gates KG1, KG2, respectively, the outputs of the AND gates being connected to a common output terminal A via OR gate MG. The output a2 is also fed to four further gates KG3 . . . KG6 which may be inhibited by application of a positive potential via either switch contact b1 or b2. The outputs from KG3, KG4 are used to control the state of bistable trigger BK2, and those from KG5, KG6 to control BK3. In the first condition of the circuit, with the switching b1, b2 as shown, gates KG4, KG5 are inhibited, and when output a2 is in its " one " state it passes through gate KG6 and switches trigger BK3 to apply a " zero " to inputs 5, 6 of gates KG1, KG2. These gates are thus inhibited and neither a1 nor a2 are passed to output A. If switch b2 is changed to inhibit gate KG6, the " one " from a2 passes through KG5, and changes the state of trigger BK3 to apply a " one " to inputs 5, 6. Trigger BK2 is set, by the " one " from a2 passing via gate KG3, to apply a " one " to input 3 of gate KG1 and a " zero " to input 4 of gate KG3, and thus KG1 is enabled to pass output a1 to the terminal A. If switch b1 is changed, gate KG3 is inhibited, and the next " one " from a2 passes through KG4 changing the state of trigger BK2 to enable KG2 and inhibit KG1, thus passing output a2 to the terminal A. The gates KG1, KG2 may comprise a pair of transistors TS1, TS2, Fig. 2, having their emitter collector paths connected in parallel and having a common load R2. Inputs 1, 3, 5 are fed via diodes D1, D3, D5, to the base of TS1 and the inputs 2, 4, 6 similarly connected to the base of TS2.
GB3465261A 1960-09-28 1961-09-27 Improvements in or relating to gating circuit arrangements Expired GB956018A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES70578A DE1130852B (en) 1960-09-28 1960-09-28 Electronic circuit arrangement for selective and phase-correct connection of one of several pulse sources to a common output

Publications (1)

Publication Number Publication Date
GB956018A true GB956018A (en) 1964-04-22

Family

ID=7501836

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3465261A Expired GB956018A (en) 1960-09-28 1961-09-27 Improvements in or relating to gating circuit arrangements

Country Status (4)

Country Link
BE (1) BE608313A (en)
CH (1) CH392616A (en)
DE (1) DE1130852B (en)
GB (1) GB956018A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1281697C2 (en) * 1966-07-16 1969-07-03 Espera Werke Ag Control circuitry for bar scale scanning

Also Published As

Publication number Publication date
DE1130852B (en) 1962-06-07
CH392616A (en) 1965-05-31
BE608313A (en) 1962-01-14

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