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GB9516877D0 - Re-configurable application specific device - Google Patents

Re-configurable application specific device

Info

Publication number
GB9516877D0
GB9516877D0 GBGB9516877.9A GB9516877A GB9516877D0 GB 9516877 D0 GB9516877 D0 GB 9516877D0 GB 9516877 A GB9516877 A GB 9516877A GB 9516877 D0 GB9516877 D0 GB 9516877D0
Authority
GB
United Kingdom
Prior art keywords
application specific
specific device
configurable application
configurable
specific
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9516877.9A
Other versions
GB2304438A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to GB9516877A priority Critical patent/GB2304438A/en
Publication of GB9516877D0 publication Critical patent/GB9516877D0/en
Priority to AU67504/96A priority patent/AU6750496A/en
Priority to PCT/GB1996/002013 priority patent/WO1997007466A1/en
Publication of GB2304438A publication Critical patent/GB2304438A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
GB9516877A 1995-08-17 1995-08-17 Re-configurable application specific device Withdrawn GB2304438A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB9516877A GB2304438A (en) 1995-08-17 1995-08-17 Re-configurable application specific device
AU67504/96A AU6750496A (en) 1995-08-17 1996-08-19 Re-configurable application specific device
PCT/GB1996/002013 WO1997007466A1 (en) 1995-08-17 1996-08-19 Re-configurable application specific device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9516877A GB2304438A (en) 1995-08-17 1995-08-17 Re-configurable application specific device

Publications (2)

Publication Number Publication Date
GB9516877D0 true GB9516877D0 (en) 1995-10-18
GB2304438A GB2304438A (en) 1997-03-19

Family

ID=10779383

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9516877A Withdrawn GB2304438A (en) 1995-08-17 1995-08-17 Re-configurable application specific device

Country Status (3)

Country Link
AU (1) AU6750496A (en)
GB (1) GB2304438A (en)
WO (1) WO1997007466A1 (en)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
US6724833B1 (en) 1996-06-10 2004-04-20 Infineon Technologies Ag Method and apparatus for communicating information
DE19651075A1 (en) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Unit for processing numerical and logical operations, for use in processors (CPU's), multi-computer systems, data flow processors (DFP's), digital signal processors (DSP's) or the like
DE19654595A1 (en) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0 and memory bus system for DFPs as well as building blocks with two- or multi-dimensional programmable cell structures
ATE243390T1 (en) 1996-12-27 2003-07-15 Pact Inf Tech Gmbh METHOD FOR INDEPENDENT DYNAMIC LOADING OF DATA FLOW PROCESSORS (DFPS) AND COMPONENTS WITH TWO- OR MULTI-DIMENSIONAL PROGRAMMABLE CELL STRUCTURES (FPGAS, DPGAS, O.L.)
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (en) 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Repairing integrated circuits by replacing subassemblies with substitutes
US6034538A (en) * 1998-01-21 2000-03-07 Lucent Technologies Inc. Virtual logic system for reconfigurable hardware
DE19843663A1 (en) * 1998-09-23 2000-03-30 Siemens Ag Configurable hardware block
US6292916B1 (en) 1998-12-10 2001-09-18 Lucent Technologies Inc. Parallel backtracing for satisfiability on reconfigurable hardware
SE9804529L (en) * 1998-12-23 2000-06-24 Axis Ab Flexible memory channel
JP3444216B2 (en) * 1999-01-28 2003-09-08 日本電気株式会社 Programmable device
US7003660B2 (en) 2000-06-13 2006-02-21 Pact Xpp Technologies Ag Pipeline configuration unit protocols and communication
US6442732B1 (en) 1999-04-21 2002-08-27 Lucent Technologies, Inc. Virtual logic system for solving satisfiability problems using reconfigurable hardware
GB2350456A (en) * 1999-05-13 2000-11-29 Jpc Technology Ltd Data processing
WO2000077652A2 (en) 1999-06-10 2000-12-21 Pact Informationstechnologie Gmbh Sequence partitioning in cell structures
GB2391671B (en) * 1999-07-02 2004-04-28 Altera Corp Embedded memory blocks for programmable logic
GB2352548B (en) * 1999-07-26 2001-06-06 Sun Microsystems Inc Method and apparatus for executing standard functions in a computer system
JP2004517386A (en) 2000-10-06 2004-06-10 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト Method and apparatus
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
WO2005045692A2 (en) 2003-08-28 2005-05-19 Pact Xpp Technologies Ag Data processing device and method
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US7657877B2 (en) 2001-06-20 2010-02-02 Pact Xpp Technologies Ag Method for processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
AU2003208266A1 (en) 2002-01-19 2003-07-30 Pact Xpp Technologies Ag Reconfigurable processor
DE50310198D1 (en) 2002-02-18 2008-09-04 Pact Xpp Technologies Ag BUS SYSTEMS AND RECONFIGURATION PROCEDURES
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003286131A1 (en) 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
WO2004038599A1 (en) 2002-09-06 2004-05-06 Pact Xpp Technologies Ag Reconfigurable sequencer structure
JP2006011705A (en) * 2004-06-24 2006-01-12 Fujitsu Ltd Processor and semiconductor device
WO2007082730A1 (en) 2006-01-18 2007-07-26 Pact Xpp Technologies Ag Hardware definition method
US9946667B2 (en) * 2008-11-12 2018-04-17 Microchip Technology Incorporated Microcontroller with configurable logic array
WO2011150392A1 (en) 2010-05-28 2011-12-01 Purdue Research Foundation Delivery of therapeutic agents to inflamed tissues using folate-targeted agents

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791603A (en) * 1986-07-18 1988-12-13 Honeywell Inc. Dynamically reconfigurable array logic
US5301344A (en) * 1991-01-29 1994-04-05 Analogic Corporation Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets
JPH0736858A (en) * 1993-07-21 1995-02-07 Hitachi Ltd Signal processor
GB9403030D0 (en) * 1994-02-17 1994-04-06 Austin Kenneth Re-configurable application specific device

Also Published As

Publication number Publication date
GB2304438A (en) 1997-03-19
WO1997007466A1 (en) 1997-02-27
AU6750496A (en) 1997-03-12

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)