GB950133A - Improvements in or relating to high density recording systems - Google Patents
Improvements in or relating to high density recording systemsInfo
- Publication number
- GB950133A GB950133A GB4606661A GB4606661A GB950133A GB 950133 A GB950133 A GB 950133A GB 4606661 A GB4606661 A GB 4606661A GB 4606661 A GB4606661 A GB 4606661A GB 950133 A GB950133 A GB 950133A
- Authority
- GB
- United Kingdom
- Prior art keywords
- waveform
- playback
- recording
- produce
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
950,133. Magnetic data storage apparatus. POTTER INSTRUMENT CO. Inc. Dec. 22, 1961, No. 46066/61. Heading G4C. A magnetic recording and playback system comprises means for recording the same data on two parallel tracks, the record being such that there are regularly recurring transitions in the magnetic condition of each track with an interval representing a data cell, there being further transitions in at least some of the cells representing recorded data playback means being provided to combine the playback signals from the two tracks. The system is applied to a magnetic tape. Recording circuit, Fig. 1. Clock pulses A(E, Fig. 2) are mixed at 3 with data pulses B delayed at 4 by one-half a cell period (F, Fig. 2), the output of the mixer 3 (G, Fig. 2) triggering a flip-flop 7 to produce a record current waveform C (H, Fig. 2). Playback circuit, Fig. 3. The playback waveform I, Fig. 2, is shaped and squared at 11, 13, 15 to produce waveform K. Waveform K is integrated at 18 and inverted and integrated at 17, 19, the resulting waveforms being combined at 21 and applied to an RC coupling 24 to produce waveform P which is applied to "and" gates 27, 38. The output of the "and" gate 27 is applied to monostable multivibrators 30, 32 to produce onehalf period pulses delayed by one-quarter period as at Q, Fig. 2. The waveform Q is applied directly and after inversion at 35 to the gates 38, 27. The outputs at 40, 41 of the gates 27, 38 are the clock waveform R and the data waveform S respectively. Storage arrangements. The recording waveform is applied from an input 49, Fig. 6, to two recording heads 56, 57. In playback, the output of the heads is applied to amplifiers 60, 61 whose outputs are combined in an "or" gate 64 to produce an error free waveform at 65. The two parallel tracks are each 20 mils wide and their centres are 60 mils apart (Fig. 11, not shown). The pairs of recording and playback amplifiers may be replaced by a single recording amplifier and a single playback amplifier for each track (Figs. 7-9,not shown). U.S.A. Specification 2,853,357 is referred to.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR879464A FR1315075A (en) | 1961-11-20 | 1961-11-20 | Magnetic recording device |
GB4606661A GB950133A (en) | 1961-12-22 | 1961-12-22 | Improvements in or relating to high density recording systems |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4606661A GB950133A (en) | 1961-12-22 | 1961-12-22 | Improvements in or relating to high density recording systems |
Publications (1)
Publication Number | Publication Date |
---|---|
GB950133A true GB950133A (en) | 1964-02-19 |
Family
ID=10439708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4606661A Expired GB950133A (en) | 1961-11-20 | 1961-12-22 | Improvements in or relating to high density recording systems |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB950133A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1549004B1 (en) * | 1966-08-30 | 1970-09-24 | Rca Corp | Circuit arrangement for converting a self-clocking information signal into a static signal |
JPS5113007B1 (en) * | 1965-06-29 | 1976-04-24 |
-
1961
- 1961-12-22 GB GB4606661A patent/GB950133A/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5113007B1 (en) * | 1965-06-29 | 1976-04-24 | ||
DE1549004B1 (en) * | 1966-08-30 | 1970-09-24 | Rca Corp | Circuit arrangement for converting a self-clocking information signal into a static signal |
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