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GB9321970D0 - Zero wait state cache using non-interleaved banks of asynchronous static random access memories - Google Patents

Zero wait state cache using non-interleaved banks of asynchronous static random access memories

Info

Publication number
GB9321970D0
GB9321970D0 GB939321970A GB9321970A GB9321970D0 GB 9321970 D0 GB9321970 D0 GB 9321970D0 GB 939321970 A GB939321970 A GB 939321970A GB 9321970 A GB9321970 A GB 9321970A GB 9321970 D0 GB9321970 D0 GB 9321970D0
Authority
GB
United Kingdom
Prior art keywords
random access
static random
access memories
wait state
state cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB939321970A
Other versions
GB2272548A (en
GB2272548B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB9321970D0 publication Critical patent/GB9321970D0/en
Publication of GB2272548A publication Critical patent/GB2272548A/en
Application granted granted Critical
Publication of GB2272548B publication Critical patent/GB2272548B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
GB9321970A 1992-11-16 1993-10-25 Zero wait state cache using non-interleaved banks of asynchronous static random access memories Expired - Lifetime GB2272548B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US97689192A 1992-11-16 1992-11-16

Publications (3)

Publication Number Publication Date
GB9321970D0 true GB9321970D0 (en) 1993-12-15
GB2272548A GB2272548A (en) 1994-05-18
GB2272548B GB2272548B (en) 1996-08-14

Family

ID=25524598

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9321970A Expired - Lifetime GB2272548B (en) 1992-11-16 1993-10-25 Zero wait state cache using non-interleaved banks of asynchronous static random access memories

Country Status (4)

Country Link
DE (1) DE4339185A1 (en)
FR (1) FR2698188B1 (en)
GB (1) GB2272548B (en)
SG (1) SG47085A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2127594B (en) * 1982-09-18 1985-11-13 Int Computers Ltd Distribution of clock pulses
US4884198A (en) * 1986-12-18 1989-11-28 Sun Microsystems, Inc. Single cycle processor/cache interface
GB2217062A (en) * 1988-03-23 1989-10-18 Benchmark Technologies Numeric processor with smart clock
US5210858A (en) * 1989-10-17 1993-05-11 Jensen Jan E B Clock division chip for computer system which interfaces a slower cache memory controller to be used with a faster processor
US5426771A (en) * 1992-07-14 1995-06-20 Hewlett-Packard Company System and method for performing high-sped cache memory writes

Also Published As

Publication number Publication date
DE4339185A1 (en) 1994-05-19
FR2698188A1 (en) 1994-05-20
FR2698188B1 (en) 1997-12-12
GB2272548A (en) 1994-05-18
SG47085A1 (en) 1998-03-20
GB2272548B (en) 1996-08-14

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